DE69911026D1 - Synchronisation von prozessoren in einem fehlertoleranten multi-prozessor-system - Google Patents

Synchronisation von prozessoren in einem fehlertoleranten multi-prozessor-system

Info

Publication number
DE69911026D1
DE69911026D1 DE69911026T DE69911026T DE69911026D1 DE 69911026 D1 DE69911026 D1 DE 69911026D1 DE 69911026 T DE69911026 T DE 69911026T DE 69911026 T DE69911026 T DE 69911026T DE 69911026 D1 DE69911026 D1 DE 69911026D1
Authority
DE
Germany
Prior art keywords
fault
synchronization
processors
processor system
tolerant multi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69911026T
Other languages
English (en)
Other versions
DE69911026T2 (de
Inventor
Lars-Oerjan Kling
Edvard Johnsson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Application granted granted Critical
Publication of DE69911026D1 publication Critical patent/DE69911026D1/de
Publication of DE69911026T2 publication Critical patent/DE69911026T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
DE69911026T 1998-06-18 1999-06-18 Synchronisation von prozessoren in einem fehlertoleranten multi-prozessor-system Expired - Lifetime DE69911026T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/100,145 US6223304B1 (en) 1998-06-18 1998-06-18 Synchronization of processors in a fault tolerant multi-processor system
US100145 1998-06-18
PCT/SE1999/001110 WO1999066408A1 (en) 1998-06-18 1999-06-18 Synchronization of processors in a fault tolerant multi-processor system

Publications (2)

Publication Number Publication Date
DE69911026D1 true DE69911026D1 (de) 2003-10-09
DE69911026T2 DE69911026T2 (de) 2004-06-03

Family

ID=22278305

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69911026T Expired - Lifetime DE69911026T2 (de) 1998-06-18 1999-06-18 Synchronisation von prozessoren in einem fehlertoleranten multi-prozessor-system

Country Status (10)

Country Link
US (1) US6223304B1 (de)
EP (1) EP1095332B1 (de)
JP (1) JP2002518740A (de)
KR (1) KR100618275B1 (de)
CN (1) CN1313969A (de)
AU (1) AU5073699A (de)
BR (1) BR9911333A (de)
CA (1) CA2335709C (de)
DE (1) DE69911026T2 (de)
WO (1) WO1999066408A1 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6625756B1 (en) * 1997-12-19 2003-09-23 Intel Corporation Replay mechanism for soft error recovery
DE19831720A1 (de) * 1998-07-15 2000-01-20 Alcatel Sa Verfahren zur Ermittlung einer einheitlichen globalen Sicht vom Systemzustand eines verteilten Rechnernetzwerks
US6470462B1 (en) * 1999-02-25 2002-10-22 Telefonaktiebolaget Lm Ericsson (Publ) Simultaneous resynchronization by command for state machines in redundant systems
US6865591B1 (en) * 2000-06-30 2005-03-08 Intel Corporation Apparatus and method for building distributed fault-tolerant/high-availability computed applications
US6694447B1 (en) * 2000-09-29 2004-02-17 Sun Microsystems, Inc. Apparatus and method for increasing application availability during a disaster fail-back
US6928583B2 (en) * 2001-04-11 2005-08-09 Stratus Technologies Bermuda Ltd. Apparatus and method for two computing elements in a fault-tolerant server to execute instructions in lockstep
US8061006B2 (en) * 2001-07-26 2011-11-22 Powderject Research Limited Particle cassette, method and kit therefor
KR100441712B1 (ko) * 2001-12-29 2004-07-27 엘지전자 주식회사 확장 가능형 다중 처리 시스템 및 그의 메모리 복제 방법
ITSV20020018A1 (it) * 2002-05-03 2003-11-03 Alstom Transp Spa Dispositivo di elaborazione o comando operante in sicurezza intrinseca
JP3606281B2 (ja) * 2002-06-07 2005-01-05 オムロン株式会社 プログラマブルコントローラ及びｃｐｕユニット並びに特殊機能モジュール及び二重化処理方法
US20050010105A1 (en) * 2003-07-01 2005-01-13 Sra Jasbir S. Method and system for Coronary arterial intervention
US7344543B2 (en) * 2003-07-01 2008-03-18 Medtronic, Inc. Method and apparatus for epicardial left atrial appendage isolation in patients with atrial fibrillation
US7813785B2 (en) * 2003-07-01 2010-10-12 General Electric Company Cardiac imaging system and method for planning minimally invasive direct coronary artery bypass surgery
US20050054918A1 (en) * 2003-09-04 2005-03-10 Sra Jasbir S. Method and system for treatment of atrial fibrillation and other cardiac arrhythmias
US20060009755A1 (en) * 2003-09-04 2006-01-12 Sra Jasbir S Method and system for ablation of atrial fibrillation and other cardiac arrhythmias
US20050137661A1 (en) * 2003-12-19 2005-06-23 Sra Jasbir S. Method and system of treatment of cardiac arrhythmias using 4D imaging
US20050143777A1 (en) * 2003-12-19 2005-06-30 Sra Jasbir S. Method and system of treatment of heart failure using 4D imaging
JP3808874B2 (ja) * 2004-03-12 2006-08-16 東芝ソリューション株式会社 分散システム及び多重化制御方法
US7426656B2 (en) * 2004-03-30 2008-09-16 Hewlett-Packard Development Company, L.P. Method and system executing user programs on non-deterministic processors
US20060020852A1 (en) * 2004-03-30 2006-01-26 Bernick David L Method and system of servicing asynchronous interrupts in multiple processors executing a user program
US20050240806A1 (en) * 2004-03-30 2005-10-27 Hewlett-Packard Development Company, L.P. Diagnostic memory dump method in a redundant processor
US7788223B2 (en) 2005-12-05 2010-08-31 Microsoft Corporation Resource freshness and replication
FR2912526B1 (fr) * 2007-02-13 2009-04-17 Thales Sa Procede de maintien du synchronisme d'execution entre plusieurs processeurs asynchrones fonctionnant en parallele de maniere redondante.
US7673188B2 (en) * 2007-08-09 2010-03-02 Globalfoundries Inc. System and method for controlling synchronous functional microprocessor redundancy during test and method for determining results
US7873874B2 (en) * 2007-08-09 2011-01-18 Advanced Micro Devices, Inc. System and method for controlling synchronous functional microprocessor redundancy during test and analysis
US8010846B1 (en) 2008-04-30 2011-08-30 Honeywell International Inc. Scalable self-checking processing platform including processors executing both coupled and uncoupled applications within a frame
US9317359B2 (en) * 2013-12-16 2016-04-19 Artesyn Embedded Computing, Inc. Reliable, low latency hardware and software inter-process communication channel for safety critical system
CN112152224B (zh) * 2020-11-24 2021-02-09 国网四川省电力公司电力科学研究院 一种电压暂降治理优化方法及系统

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3227747A1 (de) 1982-07-24 1984-01-26 Basf Ag, 6700 Ludwigshafen Kolbenpumpenkopf einer hochdruckkolbenpumpe
US4590554A (en) * 1982-11-23 1986-05-20 Parallel Computers Systems, Inc. Backup fault tolerant computer system
US4757442A (en) 1985-06-17 1988-07-12 Nec Corporation Re-synchronization system using common memory bus to transfer restart data from non-faulty processor to failed processor
US5155678A (en) 1985-10-29 1992-10-13 International Business Machines Corporation Data availability in restartable data base system
CA1320276C (en) 1987-09-04 1993-07-13 William F. Bruckert Dual rail processors with error checking on i/o reads
US5202980A (en) 1989-06-30 1993-04-13 Nec Corporation Information processing system capable of readily taking over processing of a faulty processor
US5153881A (en) 1989-08-01 1992-10-06 Digital Equipment Corporation Method of handling errors in software
CA2032067A1 (en) 1989-12-22 1991-06-23 Douglas E. Jewett Fault-tolerant computer system with online reintegration and shutdown/restart
US5295258A (en) 1989-12-22 1994-03-15 Tandem Computers Incorporated Fault-tolerant computer system with online recovery and reintegration of redundant components
DE69021712T2 (de) 1990-02-08 1996-04-18 Ibm Wiederanlaufkennzeichnungsmechanismus für fehlertolerierende Systeme.
US5404508A (en) * 1992-12-03 1995-04-04 Unisys Corporation Data base backup and recovery system and method
US5555371A (en) * 1992-12-17 1996-09-10 International Business Machines Corporation Data backup copying with delayed directory updating and reduced numbers of DASD accesses at a back up site using a log structured array data storage
JP2500447B2 (ja) 1993-05-19 1996-05-29 日本電気株式会社 メモリコピ―方式
JP3085899B2 (ja) * 1995-06-19 2000-09-11 株式会社東芝 マルチプロセッサシステム
US5737514A (en) 1995-11-29 1998-04-07 Texas Micro, Inc. Remote checkpoint memory system and protocol for fault-tolerant computer system
US5802265A (en) * 1995-12-01 1998-09-01 Stratus Computer, Inc. Transparent fault tolerant computer system
GB9601585D0 (en) * 1996-01-26 1996-03-27 Hewlett Packard Co Fault-tolerant processing method
SE513480C2 (sv) 1998-01-27 2000-09-18 Sandvik Ab Skärverktyg

Also Published As

Publication number Publication date
DE69911026T2 (de) 2004-06-03
EP1095332B1 (de) 2003-09-03
JP2002518740A (ja) 2002-06-25
CA2335709C (en) 2009-10-06
BR9911333A (pt) 2001-04-03
US6223304B1 (en) 2001-04-24
EP1095332A1 (de) 2001-05-02
CA2335709A1 (en) 1999-12-23
WO1999066408A1 (en) 1999-12-23
AU5073699A (en) 2000-01-05
KR100618275B1 (ko) 2006-08-31
KR20010052972A (ko) 2001-06-25
CN1313969A (zh) 2001-09-19

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