DE69910726D1 - Verfahren zum optimieren der topologie des ieee 1394 serienbusses - Google Patents

Verfahren zum optimieren der topologie des ieee 1394 serienbusses

Info

Publication number
DE69910726D1
DE69910726D1 DE69910726T DE69910726T DE69910726D1 DE 69910726 D1 DE69910726 D1 DE 69910726D1 DE 69910726 T DE69910726 T DE 69910726T DE 69910726 T DE69910726 T DE 69910726T DE 69910726 D1 DE69910726 D1 DE 69910726D1
Authority
DE
Germany
Prior art keywords
topology
ieee
optimizing
serial bus
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69910726T
Other languages
English (en)
Other versions
DE69910726T2 (de
Inventor
Wei Chen
Gik Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of DE69910726D1 publication Critical patent/DE69910726D1/de
Publication of DE69910726T2 publication Critical patent/DE69910726T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
DE69910726T 1998-06-12 1999-06-12 Verfahren zum optimieren der topologie des ieee 1394 serienbusses Expired - Fee Related DE69910726T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR1019980021903A KR100298979B1 (ko) 1998-06-12 1998-06-12 아이 트리플 이 1394 시리얼 버스 토폴로지 최적화방법
KR9821903 1998-06-12
PCT/KR1999/000291 WO1999064943A2 (en) 1998-06-12 1999-06-12 Method of optimizing the topology of the ieee 1394 serial bus

Publications (2)

Publication Number Publication Date
DE69910726D1 true DE69910726D1 (de) 2003-10-02
DE69910726T2 DE69910726T2 (de) 2004-02-26

Family

ID=19539159

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69910726T Expired - Fee Related DE69910726T2 (de) 1998-06-12 1999-06-12 Verfahren zum optimieren der topologie des ieee 1394 serienbusses

Country Status (7)

Country Link
US (1) US6985978B1 (de)
EP (1) EP1027640B1 (de)
JP (1) JP3295074B2 (de)
KR (1) KR100298979B1 (de)
CN (1) CN1155204C (de)
DE (1) DE69910726T2 (de)
WO (1) WO1999064943A2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001203727A (ja) * 2000-01-18 2001-07-27 Sony Corp 通信方法及び通信装置
US6880025B2 (en) * 2001-12-27 2005-04-12 Koninklijke Philips Electronics N.V. Efficient timeout message management in IEEE 1394 bridged serial bus network
KR100737740B1 (ko) * 2004-12-24 2007-07-10 전자부품연구원 Ｉｅｅｅ 1394 인터페이스를 이용한 영상 감시 시스템 및이를 이용한 대역폭 확보 방법
KR100730613B1 (ko) 2005-10-04 2007-06-21 삼성전자주식회사 홈네트워크 시스템을 제어하는 홈서버 및 그 제어방법

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5020059A (en) * 1989-03-31 1991-05-28 At&T Bell Laboratories Reconfigurable signal processor
US5533198A (en) * 1992-11-30 1996-07-02 Cray Research, Inc. Direction order priority routing of packets between nodes in a networked system
US5687388A (en) * 1992-12-08 1997-11-11 Compaq Computer Corporation Scalable tree structured high speed input/output subsystem architecture
US5559967A (en) * 1993-03-18 1996-09-24 Apple Computer, Inc. Method and apparatus for a dynamic, multi-speed bus architecture in which an exchange of speed messages occurs independent of the data signal transfers
US5724517A (en) * 1994-09-27 1998-03-03 International Business Machines Corporation Method for generating a topology map for a serial bus
JPH09275402A (ja) * 1996-04-04 1997-10-21 Sony Corp 通信制御システムおよび通信制御装置並びにデータ送受信装置および通信制御方法
US5832300A (en) * 1996-06-20 1998-11-03 Intel Corporation System for maintaining a minimum level of digitized data signal quality while allowing bandwidth dependent quality enhancement with additional enhancement data packets
JP3601205B2 (ja) * 1996-08-26 2004-12-15 ソニー株式会社 電子機器及びその動作モード制御方法
US5973722A (en) * 1996-09-16 1999-10-26 Sony Corporation Combined digital audio/video on demand and broadcast distribution system
US5945631A (en) * 1996-09-16 1999-08-31 Sony Corporation IEEE 1394 active wall disconnect and aircraft qualified cable
JPH10126419A (ja) * 1996-10-23 1998-05-15 Nec Corp Ａｔｍ交換機システム
US6243395B1 (en) * 1996-11-06 2001-06-05 Sony Corporation Method and apparatus for transferring ATM cells via 1394-serial data bus
US5878232A (en) * 1996-12-27 1999-03-02 Compaq Computer Corporation Dynamic reconfiguration of network device's virtual LANs using the root identifiers and root ports determined by a spanning tree procedure
US6324165B1 (en) * 1997-09-05 2001-11-27 Nec Usa, Inc. Large capacity, multiclass core ATM switch architecture
US6094700A (en) * 1998-03-13 2000-07-25 Compaq Computer Corporation Serial bus system for sending multiple frames of unique data
US6311245B1 (en) * 1998-06-05 2001-10-30 Micron Technology, Inc. Method for time multiplexing a low-speed and a high-speed bus over shared signal lines of a physical bus
US6247061B1 (en) * 1998-06-09 2001-06-12 Microsoft Corporation Method and computer program product for scheduling network communication packets originating from different flows having unique service requirements
US6256698B1 (en) * 1999-01-11 2001-07-03 Sony Corporation Method of and apparatus for providing self-sustained even arbitration within an IEEE 1394 serial bus network of devices

Also Published As

Publication number Publication date
JP2002517967A (ja) 2002-06-18
CN1155204C (zh) 2004-06-23
US6985978B1 (en) 2006-01-10
KR100298979B1 (ko) 2001-09-06
DE69910726T2 (de) 2004-02-26
EP1027640B1 (de) 2003-08-27
WO1999064943A2 (en) 1999-12-16
EP1027640A2 (de) 2000-08-16
WO1999064943A3 (en) 2000-06-22
CN1273652A (zh) 2000-11-15
KR20000001563A (ko) 2000-01-15
JP3295074B2 (ja) 2002-06-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee