DE69903707T2 - Optimierte Hardware-Reinigungsfunktion für einen Daten-Cache-Speicher mit virtuellen Indizes und Tags - Google Patents
Optimierte Hardware-Reinigungsfunktion für einen Daten-Cache-Speicher mit virtuellen Indizes und TagsInfo
- Publication number
- DE69903707T2 DE69903707T2 DE69903707T DE69903707T DE69903707T2 DE 69903707 T2 DE69903707 T2 DE 69903707T2 DE 69903707 T DE69903707 T DE 69903707T DE 69903707 T DE69903707 T DE 69903707T DE 69903707 T2 DE69903707 T2 DE 69903707T2
- Authority
- DE
- Germany
- Prior art keywords
- tags
- data cache
- cleaning function
- optimized hardware
- hardware cleaning
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP99400396A EP1030243B1 (de) | 1999-02-18 | 1999-02-18 | Optimierte Hardware-Reinigungsfunktion für einen Daten-Cache-Speicher mit virtuellen Indizes und Tags |
US09/447,194 US6606687B1 (en) | 1999-02-18 | 1999-11-22 | Optimized hardware cleaning function for VIVT data cache |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69903707D1 DE69903707D1 (de) | 2002-12-05 |
DE69903707T2 true DE69903707T2 (de) | 2003-07-10 |
Family
ID=29271938
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69903707T Expired - Lifetime DE69903707T2 (de) | 1999-02-18 | 1999-02-18 | Optimierte Hardware-Reinigungsfunktion für einen Daten-Cache-Speicher mit virtuellen Indizes und Tags |
Country Status (4)
Country | Link |
---|---|
US (1) | US6606687B1 (de) |
EP (1) | EP1030243B1 (de) |
JP (1) | JP2000242556A (de) |
DE (1) | DE69903707T2 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7472230B2 (en) | 2001-09-14 | 2008-12-30 | Hewlett-Packard Development Company, L.P. | Preemptive write back controller |
EP1313014B1 (de) * | 2001-11-15 | 2010-03-03 | Texas Instruments France | Unterbrechbare und wiederaufnehmbare Instruktion zum Säubern eines Segments eines Cache-Speichers |
GB0207296D0 (en) * | 2002-03-28 | 2002-05-08 | Koninkl Philips Electronics Nv | Method and appartus for context switching in computer operating systems |
DE602004025556D1 (de) * | 2004-06-08 | 2010-04-01 | Freescale Semiconductor Inc | Aufrechterhaltung der Cachespeicherkoherenz zum direkten Zugriff (DMA), Abschluss einer Aufgabe, zur Synchronisierung |
US7606363B1 (en) | 2005-07-26 | 2009-10-20 | Rockwell Collins, Inc. | System and method for context switching of a cryptographic engine |
GB0516474D0 (en) * | 2005-08-10 | 2005-09-14 | Symbian Software Ltd | Pre-emptible context switching in a computing device |
US7802055B2 (en) * | 2006-04-19 | 2010-09-21 | Qualcomm Incorporated | Virtually-tagged instruction cache with physically-tagged behavior |
CN102197381A (zh) * | 2008-10-28 | 2011-09-21 | Nxp股份有限公司 | 用于可拆卸装置的具有高速缓存和接口的数据处理电路 |
FR2956913B1 (fr) * | 2010-03-01 | 2012-04-20 | Sagem Defense Securite | Procede de sequencement deterministe multitache |
US9195598B2 (en) | 2012-06-08 | 2015-11-24 | International Business Machines Corporation | Synchronous and asynchronous discard scans based on the type of cache memory |
US9336150B2 (en) | 2012-06-08 | 2016-05-10 | International Business Machines Corporation | Performing asynchronous discard scans with staging and destaging operations |
US9208099B2 (en) | 2012-08-08 | 2015-12-08 | International Business Machines Corporation | Adjustment of the number of task control blocks allocated for discard scans |
US9176892B2 (en) | 2013-01-22 | 2015-11-03 | International Business Machines Corporation | Performing staging or destaging based on the number of waiting discard scans |
US10318436B2 (en) * | 2017-07-25 | 2019-06-11 | Qualcomm Incorporated | Precise invalidation of virtually tagged caches |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5307477A (en) * | 1989-12-01 | 1994-04-26 | Mips Computer Systems, Inc. | Two-level cache memory system |
JP2839060B2 (ja) * | 1992-03-02 | 1998-12-16 | インターナショナル・ビジネス・マシーンズ・コーポレイション | データ処理システムおよびデータ処理方法 |
US5515522A (en) * | 1994-02-24 | 1996-05-07 | Hewlett-Packard Company | Coherence index generation for use by an input/output adapter located outside of the processor to detect whether the updated version of data resides within the cache |
US5664150A (en) * | 1995-03-21 | 1997-09-02 | International Business Machines Corporation | Computer system with a device for selectively blocking writebacks of data from a writeback cache to memory |
EP0784819A1 (de) * | 1995-06-08 | 1997-07-23 | International Business Machines Corporation | Cachespeicherflushmechanismus für einen cachespeicher auf zweiter stufe |
US6341324B1 (en) * | 1995-10-06 | 2002-01-22 | Lsi Logic Corporation | Exception processing in superscalar microprocessor |
US5809560A (en) * | 1995-10-13 | 1998-09-15 | Compaq Computer Corporation | Adaptive read-ahead disk cache |
JPH09223118A (ja) * | 1996-02-14 | 1997-08-26 | Oki Electric Ind Co Ltd | スヌープキャッシュメモリ制御システム |
US5915262A (en) * | 1996-07-22 | 1999-06-22 | Advanced Micro Devices, Inc. | Cache system and method using tagged cache lines for matching cache strategy to I/O application |
FR2778254B1 (fr) * | 1998-04-29 | 2002-02-15 | Texas Instruments France | Circuits,systemes et procedes d'ordinateur utilisant un nettoyage partiel d'une memoire cache |
US6115777A (en) * | 1998-04-21 | 2000-09-05 | Idea Corporation | LOADRS instruction and asynchronous context switch |
US6397302B1 (en) * | 1998-06-18 | 2002-05-28 | Compaq Information Technologies Group, L.P. | Method and apparatus for developing multiprocessor cache control protocols by presenting a clean victim signal to an external system |
US6412043B1 (en) * | 1999-10-01 | 2002-06-25 | Hitachi, Ltd. | Microprocessor having improved memory management unit and cache memory |
-
1999
- 1999-02-18 DE DE69903707T patent/DE69903707T2/de not_active Expired - Lifetime
- 1999-02-18 EP EP99400396A patent/EP1030243B1/de not_active Expired - Lifetime
- 1999-11-22 US US09/447,194 patent/US6606687B1/en not_active Expired - Lifetime
-
2000
- 2000-02-18 JP JP2000040479A patent/JP2000242556A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP1030243A1 (de) | 2000-08-23 |
EP1030243B1 (de) | 2002-10-30 |
JP2000242556A (ja) | 2000-09-08 |
US6606687B1 (en) | 2003-08-12 |
DE69903707D1 (de) | 2002-12-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |