DE69836606D1 - Sicherheitsmerkmal für gedruckte Leiterplatten - Google Patents

Sicherheitsmerkmal für gedruckte Leiterplatten

Info

Publication number
DE69836606D1
DE69836606D1 DE69836606T DE69836606T DE69836606D1 DE 69836606 D1 DE69836606 D1 DE 69836606D1 DE 69836606 T DE69836606 T DE 69836606T DE 69836606 T DE69836606 T DE 69836606T DE 69836606 D1 DE69836606 D1 DE 69836606D1
Authority
DE
Germany
Prior art keywords
printed circuit
circuit boards
security feature
security
feature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69836606T
Other languages
English (en)
Other versions
DE69836606T2 (de
Inventor
Brian G Hutchison
Eric G Lyons
Jan Durajczyk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR International Inc
Original Assignee
NCR International Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR International Inc filed Critical NCR International Inc
Publication of DE69836606D1 publication Critical patent/DE69836606D1/de
Application granted granted Critical
Publication of DE69836606T2 publication Critical patent/DE69836606T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0275—Security details, e.g. tampering prevention or detection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10151—Sensor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/922—Active solid-state devices, e.g. transistors, solid-state diodes with means to prevent inspection of or tampering with an integrated circuit, e.g. "smart card", anti-tamper

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
DE69836606T 1997-09-10 1998-08-28 Sicherheitsmerkmal für gedruckte Leiterplatten Expired - Lifetime DE69836606T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9719118 1997-09-10
GBGB9719118.3A GB9719118D0 (en) 1997-09-10 1997-09-10 Security feature for printed circuit boards

Publications (2)

Publication Number Publication Date
DE69836606D1 true DE69836606D1 (de) 2007-01-25
DE69836606T2 DE69836606T2 (de) 2007-09-20

Family

ID=10818772

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69836606T Expired - Lifetime DE69836606T2 (de) 1997-09-10 1998-08-28 Sicherheitsmerkmal für gedruckte Leiterplatten

Country Status (7)

Country Link
US (1) US5905640A (de)
EP (1) EP0902607B1 (de)
JP (1) JPH11161550A (de)
DE (1) DE69836606T2 (de)
ES (1) ES2275295T3 (de)
GB (1) GB9719118D0 (de)
ZA (1) ZA987923B (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6663442B1 (en) 2000-01-27 2003-12-16 Tyco Electronics Corporation High speed interconnect using printed circuit board with plated bores
US6901343B2 (en) 2001-01-10 2005-05-31 Matsushita Electric Industrial Co., Ltd. Multilayer board in which wiring of signal line that requires tamper-resistance is covered by component or foil, design apparatus, method, and program for the multilayer board, and medium recording the program
JP4669338B2 (ja) * 2005-07-22 2011-04-13 富士通コンポーネント株式会社 プリント配線板及びその製造方法
ITFI20060077A1 (it) 2006-03-23 2007-09-24 Gilbarco S P A Dispositivo per la verifica della regolarita' del funzionamento di terminali automatici di pagamento
KR20210144302A (ko) 2020-05-22 2021-11-30 삼성전자주식회사 반도체 패키지 및 그의 제조 방법
CN111970827B (zh) * 2020-08-05 2021-10-01 金禄电子科技股份有限公司 钻孔机钻孔方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4513389A (en) * 1981-11-12 1985-04-23 Ncr Corporation ROM security circuit
US4504821A (en) * 1982-01-15 1985-03-12 General Electric Company Integrated circuit board system and an integrated circuit board assembly for application thereto
JPS59185095A (ja) * 1983-02-28 1984-10-20 Toppan Printing Co Ltd 半導体メモリの記憶内容コピ−防止装置
JPS63289890A (ja) * 1987-05-20 1988-11-28 Nec Corp 印刷配線板識別方式
US5113518A (en) * 1988-06-03 1992-05-12 Durst Jr Robert T Method and system for preventing unauthorized use of software
US5203004A (en) * 1990-01-08 1993-04-13 Tandem Computers Incorporated Multi-board system having electronic keying and preventing power to improperly connected plug-in board with improperly configured diode connections
JP2805538B2 (ja) * 1990-08-23 1998-09-30 沖電気工業株式会社 印刷配線板の接続検証装置
US5360948A (en) * 1992-08-14 1994-11-01 Ncr Corporation Via programming for multichip modules
US5459355A (en) * 1992-12-09 1995-10-17 Intel Corporation Multiple layer programmable layout for version identification
ATE208918T1 (de) * 1993-04-28 2001-11-15 Fujitsu Siemens Computers Gmbh Schutzvorrichtung für schaltungsteile und/oder daten eines elektrotechnischen geräts
DE4413910A1 (de) * 1994-04-21 1995-10-26 Telefunken Microelectron Verfahren zur Codierung von Leiterplatten
US5734819A (en) * 1994-10-12 1998-03-31 International Business Machines Corporation Method and apparatus for validating system operation
US5814847A (en) * 1996-02-02 1998-09-29 National Semiconductor Corp. General purpose assembly programmable multi-chip package substrate

Also Published As

Publication number Publication date
ES2275295T3 (es) 2007-06-01
US5905640A (en) 1999-05-18
EP0902607A3 (de) 2000-08-30
JPH11161550A (ja) 1999-06-18
DE69836606T2 (de) 2007-09-20
ZA987923B (en) 2000-03-22
EP0902607A2 (de) 1999-03-17
GB9719118D0 (en) 1997-11-12
EP0902607B1 (de) 2006-12-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)