DE69800989T2 - Phasenregelkreisschaltung, Wiedergabegerät und Phasenregelverfahren - Google Patents

Phasenregelkreisschaltung, Wiedergabegerät und Phasenregelverfahren

Info

Publication number
DE69800989T2
DE69800989T2 DE69800989T DE69800989T DE69800989T2 DE 69800989 T2 DE69800989 T2 DE 69800989T2 DE 69800989 T DE69800989 T DE 69800989T DE 69800989 T DE69800989 T DE 69800989T DE 69800989 T2 DE69800989 T2 DE 69800989T2
Authority
DE
Germany
Prior art keywords
phase locked
playback device
loop circuit
locked loop
locked method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69800989T
Other languages
English (en)
Other versions
DE69800989D1 (de
Inventor
Tetsuji Nakazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE69800989D1 publication Critical patent/DE69800989D1/de
Publication of DE69800989T2 publication Critical patent/DE69800989T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B19/00Driving, starting, stopping record carriers not specifically of filamentary or web form, or of supports therefor; Control thereof; Control of operating function ; Driving both disc and head
    • G11B19/20Driving; Starting; Stopping; Control thereof
    • G11B19/24Arrangements for providing constant relative speed between record carrier and head
    • G11B19/247Arrangements for providing constant relative speed between record carrier and head using electrical means
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10037A/D conversion, D/A conversion, sampling, slicing and digital quantisation or adjusting parameters thereof
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10222Improvement or modification of read or write signals clock-related aspects, e.g. phase or frequency adjustment or bit synchronisation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/113Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
    • EFIXED CONSTRUCTIONS
    • E05LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
    • E05YINDEXING SCHEME RELATING TO HINGES OR OTHER SUSPENSION DEVICES FOR DOORS, WINDOWS OR WINGS AND DEVICES FOR MOVING WINGS INTO OPEN OR CLOSED POSITION, CHECKS FOR WINGS AND WING FITTINGS NOT OTHERWISE PROVIDED FOR, CONCERNED WITH THE FUNCTIONING OF THE WING
    • E05Y2400/00Electronic control; Power supply; Power or signal transmission; User interfaces
    • E05Y2400/10Electronic control
    • E05Y2400/30Electronic control of motors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • G11B2020/14618 to 14 modulation, e.g. the EFM code used on CDs or mini-discs
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B7/00Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
    • G11B7/004Recording, reproducing or erasing methods; Read, write or erase circuits therefor
    • G11B7/005Reproducing
DE69800989T 1997-11-19 1998-11-18 Phasenregelkreisschaltung, Wiedergabegerät und Phasenregelverfahren Expired - Fee Related DE69800989T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9318491A JPH11149704A (ja) 1997-11-19 1997-11-19 フェーズロックドループ回路、再生装置、及びフェーズロックドループ回路の引き込み制御方法

Publications (2)

Publication Number Publication Date
DE69800989D1 DE69800989D1 (de) 2001-08-02
DE69800989T2 true DE69800989T2 (de) 2001-10-18

Family

ID=18099717

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69800989T Expired - Fee Related DE69800989T2 (de) 1997-11-19 1998-11-18 Phasenregelkreisschaltung, Wiedergabegerät und Phasenregelverfahren

Country Status (6)

Country Link
US (1) US6150888A (de)
EP (1) EP0918396B1 (de)
JP (1) JPH11149704A (de)
KR (1) KR19990045420A (de)
CN (1) CN1217610A (de)
DE (1) DE69800989T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6173442B1 (en) * 1999-02-05 2001-01-09 Sun Microsystems, Inc. Busy-wait-free synchronization
JP4538907B2 (ja) * 1999-06-29 2010-09-08 ソニー株式会社 記録装置および再生装置
FR2799852B1 (fr) * 1999-09-30 2002-01-11 St Microelectronics Sa Procede et dispositif d'extraction de donnees binaires vehiculees par un signal incident, en particulier un signal issu d'un disque numerique
US7054403B2 (en) * 2000-03-21 2006-05-30 Nippon Telegraph And Telephone Corporation Phase-Locked Loop
JP2001351331A (ja) * 2000-06-06 2001-12-21 Sony Corp メモリ制御装置
TW519624B (en) * 2001-05-15 2003-02-01 Media Tek Inc Circuit for protecting synchronizing pattern
JP3542978B2 (ja) * 2001-05-29 2004-07-14 埼玉日本電気株式会社 周波数同期装置および周波数同期制御方法
US6621353B2 (en) 2001-11-07 2003-09-16 International Business Machines Corporation Phase locked loop reconfiguration
CN1698102A (zh) * 2003-01-23 2005-11-16 Lg电子株式会社 带有可选信息的记录介质及用于该记录介质的形成、记录、再现和再现控制的装置和方法
TWI343049B (en) * 2003-01-23 2011-06-01 Lg Electronics Inc Recording medium with an intermittent or alternate wobbled pits and apparatus and methods for forming, recording, and reproducing the recording medium
KR100952949B1 (ko) * 2003-01-24 2010-04-15 엘지전자 주식회사 고밀도 광디스크의 복사 방지 정보 관리방법
TWI239718B (en) * 2004-01-29 2005-09-11 Mediatek Inc Phase lock loop with higher resolution
JP4366650B2 (ja) 2004-03-19 2009-11-18 ソニー株式会社 情報再生装置及びリードクロック監視方法
JP4572742B2 (ja) 2005-05-26 2010-11-04 ソニー株式会社 周波数制御装置および情報再生装置
KR100694125B1 (ko) * 2005-06-10 2007-03-12 삼성전자주식회사 위상 동기 루프 회로에서의 주파수 검출기 및 주파수 에러검출 방법
US7369002B2 (en) * 2005-07-28 2008-05-06 Zarlink Semiconductor, Inc. Phase locked loop fast lock method
US7792652B1 (en) * 2007-05-30 2010-09-07 Marvell International Ltd. Oscillator calibration for motor controller
JP2010212929A (ja) * 2009-03-10 2010-09-24 Sony Corp 測定装置、再生装置、測定方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62259263A (ja) * 1986-05-06 1987-11-11 Pioneer Electronic Corp スピンドルサ−ボ引込み方法及びその装置
US5223772A (en) * 1992-02-28 1993-06-29 Sgs-Thomson Microelectronics, Inc. Method and apparatus for providing the lock of a phase-locked loop system from frequency sweep
JP3971462B2 (ja) * 1994-11-25 2007-09-05 ソニー株式会社 ディスク再生装置
US5946279A (en) * 1996-04-30 1999-08-31 Mitsumi Electric Co., Ltd. Servo circuit, digital PLL circuit and optical disk device

Also Published As

Publication number Publication date
EP0918396A1 (de) 1999-05-26
DE69800989D1 (de) 2001-08-02
US6150888A (en) 2000-11-21
CN1217610A (zh) 1999-05-26
JPH11149704A (ja) 1999-06-02
EP0918396B1 (de) 2001-06-27
KR19990045420A (ko) 1999-06-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee