DE69734492D1 - System für plesioasynchronen paketbasierten kreuzschienenschalterchip mit hoher taktfrequenz und niedriger latenzzeit, sowie verfahren - Google Patents

System für plesioasynchronen paketbasierten kreuzschienenschalterchip mit hoher taktfrequenz und niedriger latenzzeit, sowie verfahren

Info

Publication number
DE69734492D1
DE69734492D1 DE69734492T DE69734492T DE69734492D1 DE 69734492 D1 DE69734492 D1 DE 69734492D1 DE 69734492 T DE69734492 T DE 69734492T DE 69734492 T DE69734492 T DE 69734492T DE 69734492 D1 DE69734492 D1 DE 69734492D1
Authority
DE
Germany
Prior art keywords
plesio
laten
low
clock frequency
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69734492T
Other languages
English (en)
Other versions
DE69734492T2 (de
Inventor
Martin Wicki
D Larson
Albert Mu
Raghu Sastry
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69734492D1 publication Critical patent/DE69734492D1/de
Application granted granted Critical
Publication of DE69734492T2 publication Critical patent/DE69734492T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/101—Packet switching elements characterised by the switching fabric construction using crossbar or matrix
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1515—Non-blocking multistage, e.g. Clos
    • H04L49/1546—Non-blocking multistage, e.g. Clos using pipelined operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H04L49/254—Centralised controller, i.e. arbitration or scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3018—Input queuing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
DE69734492T 1996-02-22 1997-02-19 System für plesioasynchronen paketbasierten kreuzschienenschalterchip mit hoher taktfrequenz und niedriger latenzzeit, sowie verfahren Expired - Lifetime DE69734492T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/603,926 US5838684A (en) 1996-02-22 1996-02-22 Low latency, high clock frequency plesioasynchronous packet-based crossbar switching chip system and method
US603926 1996-02-22
PCT/US1997/002938 WO1997031462A1 (en) 1996-02-22 1997-02-19 Low latency, high clock frequency plesioasynchronous packet-based crossbar switching chip system and method

Publications (2)

Publication Number Publication Date
DE69734492D1 true DE69734492D1 (de) 2005-12-08
DE69734492T2 DE69734492T2 (de) 2006-06-22

Family

ID=24417470

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69734492T Expired - Lifetime DE69734492T2 (de) 1996-02-22 1997-02-19 System für plesioasynchronen paketbasierten kreuzschienenschalterchip mit hoher taktfrequenz und niedriger latenzzeit, sowie verfahren

Country Status (5)

Country Link
US (1) US5838684A (de)
EP (1) EP0823168B1 (de)
JP (1) JP3816530B2 (de)
DE (1) DE69734492T2 (de)
WO (1) WO1997031462A1 (de)

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Also Published As

Publication number Publication date
EP0823168B1 (de) 2005-11-02
EP0823168A1 (de) 1998-02-11
JPH11504496A (ja) 1999-04-20
US5838684A (en) 1998-11-17
DE69734492T2 (de) 2006-06-22
JP3816530B2 (ja) 2006-08-30
WO1997031462A1 (en) 1997-08-28

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