DE69632970D1 - Mikroprozessor mit reduzierten Programmcodes - Google Patents

Mikroprozessor mit reduzierten Programmcodes

Info

Publication number
DE69632970D1
DE69632970D1 DE69632970T DE69632970T DE69632970D1 DE 69632970 D1 DE69632970 D1 DE 69632970D1 DE 69632970 T DE69632970 T DE 69632970T DE 69632970 T DE69632970 T DE 69632970T DE 69632970 D1 DE69632970 D1 DE 69632970D1
Authority
DE
Germany
Prior art keywords
microprocessor
program codes
reduced program
reduced
codes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69632970T
Other languages
English (en)
Other versions
DE69632970T2 (de
Inventor
Toshimichi Matsuzaki
Masashi Deguchi
Toshifumi Hamaguchi
Yutaka Tanase
Masahiko Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP13328195A external-priority patent/JP3199603B2/ja
Priority claimed from JP13407895A external-priority patent/JP3199604B2/ja
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69632970D1 publication Critical patent/DE69632970D1/de
Application granted granted Critical
Publication of DE69632970T2 publication Critical patent/DE69632970T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3814—Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30156—Special purpose encoding of instructions, e.g. Gray coding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G06F9/30178—Runtime instruction translation, e.g. macros of compressed or encrypted instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3816—Instruction alignment, e.g. cache line crossing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
DE69632970T 1995-05-31 1996-05-30 Mikroprozessor mit reduzierten Programmcodes Expired - Lifetime DE69632970T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP13328195A JP3199603B2 (ja) 1995-05-31 1995-05-31 コードサイズ縮小化マイクロプロセッサ
JP13407895A JP3199604B2 (ja) 1995-05-31 1995-05-31 プロセッサ
JP13407895 1995-05-31
JP13328195 1995-05-31

Publications (2)

Publication Number Publication Date
DE69632970D1 true DE69632970D1 (de) 2004-08-26
DE69632970T2 DE69632970T2 (de) 2004-12-16

Family

ID=26467675

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69630416T Expired - Lifetime DE69630416T2 (de) 1995-05-31 1996-05-30 Mikroprozessor zur Ausführung von Befehlen mit variablen Längen
DE69632970T Expired - Lifetime DE69632970T2 (de) 1995-05-31 1996-05-30 Mikroprozessor mit reduzierten Programmcodes

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE69630416T Expired - Lifetime DE69630416T2 (de) 1995-05-31 1996-05-30 Mikroprozessor zur Ausführung von Befehlen mit variablen Längen

Country Status (5)

Country Link
US (2) US5966514A (de)
EP (2) EP1143333B1 (de)
KR (1) KR100436015B1 (de)
CN (2) CN1114153C (de)
DE (2) DE69630416T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6219779B1 (en) * 1997-06-16 2001-04-17 Matsushita Electric Industrial Co., Ltd. Constant reconstructing processor which supports reductions in code size
EP0945782B1 (de) * 1998-03-27 2004-05-06 Motorola, Inc. System und Verfahren zur Umwandlung von Befehlen
FR2777370B1 (fr) * 1998-04-09 2000-06-23 Sgs Thomson Microelectronics Architecture de dsp optimisee pour les acces memoire
US6178496B1 (en) 1999-02-17 2001-01-23 Motorola, Inc. System for converting instructions, and method therefore
KR100308211B1 (ko) 1999-03-27 2001-10-29 윤종용 압축 명령을 갖는 마이크로 컴퓨터 시스템
KR100619682B1 (ko) * 1999-12-22 2006-09-08 엘지전자 주식회사 이아이에스씨 프로세서
US6721875B1 (en) * 2000-02-22 2004-04-13 Hewlett-Packard Development Company, L.P. Method and apparatus for implementing a single-syllable IP-relative branch instruction and a long IP-relative branch instruction in a processor which fetches instructions in bundle form
KR100353814B1 (ko) * 2000-08-18 2002-09-27 주식회사 하이닉스반도체 확장된 램 억세스 명령어를 억세스하는 시간을 향상시킨램 억세스 장치
US6934936B2 (en) * 2001-02-01 2005-08-23 International Business Machines Corporation Apparatus and method for adaptive address-based historical utilization recording
JP2005050208A (ja) * 2003-07-30 2005-02-24 Matsushita Electric Ind Co Ltd マルチタスクシステムにおけるメモリ管理方式およびタスク制御装置
US20110271083A1 (en) * 2009-01-21 2011-11-03 Freescale Semiconductor, Inc. Microprocessor architecture and method of instruction decoding
CN113138800B (zh) * 2021-03-25 2023-05-09 沐曦集成电路(上海)有限公司 定长指令集的编解码方法及计算系统
CN115878187B (zh) * 2023-01-16 2023-05-02 北京微核芯科技有限公司 支持压缩指令的处理器指令处理装置和方法

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54122043A (en) * 1978-03-15 1979-09-21 Toshiba Corp Electronic computer
US4245304A (en) * 1978-12-11 1981-01-13 Honeywell Information Systems Inc. Cache arrangement utilizing a split cycle mode of operation
US4336602A (en) * 1979-09-24 1982-06-22 Control Data Corporation Network for generating modified microcode addresses
AU553416B2 (en) * 1984-02-24 1986-07-17 Fujitsu Limited Pipeline processing
JPS61138333A (ja) * 1984-12-10 1986-06-25 Nec Corp 演算モジユ−ル
JPS61282932A (ja) * 1985-06-07 1986-12-13 Fujitsu Ltd アドレスカウンタ制御方式
JPS63245522A (ja) * 1987-03-31 1988-10-12 Toshiba Corp マイクロプロセツサ
DE68926597T2 (de) * 1988-01-27 1997-01-23 Oki Electric Ind Co Ltd Mikrorechner
KR930005768B1 (ko) * 1989-01-17 1993-06-24 후지쓰 가부시끼가이샤 마이크로 프로세서
KR0163179B1 (ko) * 1989-03-31 1999-01-15 미다 가쓰시게 데이타 프로세서
JPH03201133A (ja) * 1989-12-28 1991-09-03 Sanyo Electric Co Ltd 情報処理装置
JPH03233630A (ja) * 1990-02-08 1991-10-17 Nec Corp 情報処理装置
JPH04104350A (ja) * 1990-08-23 1992-04-06 Hitachi Ltd マイクロプロセッサ
US5367648A (en) * 1991-02-20 1994-11-22 International Business Machines Corporation General purpose memory access scheme using register-indirect mode
US5428786A (en) * 1991-03-07 1995-06-27 Digital Equipment Corporation Branch resolution via backward symbolic execution
US5706460A (en) * 1991-03-19 1998-01-06 The United States Of America As Represented By The Secretary Of The Navy Variable architecture computer with vector parallel processor and using instructions with variable length fields
US5452423A (en) * 1991-06-13 1995-09-19 Chips And Technologies, Inc. Two-ROM multibyte microcode address selection method and apparatus
JPH0527970A (ja) * 1991-07-18 1993-02-05 Seikosha Co Ltd 演算装置
JP2970821B2 (ja) * 1991-08-21 1999-11-02 松下電器産業株式会社 データ処理装置
DE69325826T2 (de) * 1992-01-06 2000-02-24 Hitachi Ltd Rechner mit einer Parallelverarbeitungsfähigkeit
US5542058A (en) * 1992-07-06 1996-07-30 Digital Equipment Corporation Pipelined computer with operand context queue to simplify context-dependent execution flow
US5590358A (en) * 1994-09-16 1996-12-31 Philips Electronics North America Corporation Processor with word-aligned branch target in a byte-oriented instruction set

Also Published As

Publication number Publication date
DE69630416D1 (de) 2003-11-27
CN1144359A (zh) 1997-03-05
US5966514A (en) 1999-10-12
KR960042329A (ko) 1996-12-21
EP0745932A3 (de) 1998-09-09
EP0745932B1 (de) 2003-10-22
DE69630416T2 (de) 2004-07-29
EP1143333A2 (de) 2001-10-10
EP1143333B1 (de) 2004-07-21
KR100436015B1 (ko) 2004-09-16
CN1286004C (zh) 2006-11-22
CN1492318A (zh) 2004-04-28
EP1143333A3 (de) 2001-10-31
EP0745932A2 (de) 1996-12-04
US6253305B1 (en) 2001-06-26
CN1114153C (zh) 2003-07-09
DE69632970T2 (de) 2004-12-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP