DE69629646D1 - Verfahren zur durchführung einer "rotate through carry" operatiion - Google Patents

Verfahren zur durchführung einer "rotate through carry" operatiion

Info

Publication number
DE69629646D1
DE69629646D1 DE69629646T DE69629646T DE69629646D1 DE 69629646 D1 DE69629646 D1 DE 69629646D1 DE 69629646 T DE69629646 T DE 69629646T DE 69629646 T DE69629646 T DE 69629646T DE 69629646 D1 DE69629646 D1 DE 69629646D1
Authority
DE
Germany
Prior art keywords
rotate
carrying
carry
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69629646T
Other languages
English (en)
Other versions
DE69629646T2 (de
Inventor
John Tam
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of DE69629646D1 publication Critical patent/DE69629646D1/de
Application granted granted Critical
Publication of DE69629646T2 publication Critical patent/DE69629646T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
DE69629646T 1995-05-26 1996-05-16 Verfahren zur durchführung einer "rotate through carry" operatiion Expired - Fee Related DE69629646T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US452162 1995-05-26
US08/452,162 US5682339A (en) 1995-05-26 1995-05-26 Method for performing rotate through carry using a 32 bit barrel shifter and counter
PCT/US1996/007092 WO1996037819A1 (en) 1995-05-26 1996-05-16 Method for performing a 'rotate through carry' operation

Publications (2)

Publication Number Publication Date
DE69629646D1 true DE69629646D1 (de) 2003-10-02
DE69629646T2 DE69629646T2 (de) 2004-06-03

Family

ID=23795313

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69629646T Expired - Fee Related DE69629646T2 (de) 1995-05-26 1996-05-16 Verfahren zur durchführung einer "rotate through carry" operatiion

Country Status (5)

Country Link
US (1) US5682339A (de)
EP (1) EP0772809B1 (de)
KR (1) KR970705074A (de)
DE (1) DE69629646T2 (de)
WO (1) WO1996037819A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5896305A (en) * 1996-02-08 1999-04-20 Texas Instruments Incorporated Shifter circuit for an arithmetic logic unit in a microprocessor
US6122651A (en) * 1998-04-08 2000-09-19 Advanced Micro Devices, Inc. Method and apparatus for performing overshifted rotate through carry instructions by shifting in opposite directions
US6952711B2 (en) 2001-06-01 2005-10-04 Microchip Technology Incorporated Maximally negative signed fractional number multiplication
US7467178B2 (en) 2001-06-01 2008-12-16 Microchip Technology Incorporated Dual mode arithmetic saturation processing
US20020184566A1 (en) 2001-06-01 2002-12-05 Michael Catherwood Register pointer trap
US6937084B2 (en) 2001-06-01 2005-08-30 Microchip Technology Incorporated Processor with dual-deadtime pulse width modulation generator
US7020788B2 (en) 2001-06-01 2006-03-28 Microchip Technology Incorporated Reduced power option
US6976158B2 (en) 2001-06-01 2005-12-13 Microchip Technology Incorporated Repeat instruction with interrupt
US6985986B2 (en) 2001-06-01 2006-01-10 Microchip Technology Incorporated Variable cycle interrupt disabling
US6934728B2 (en) 2001-06-01 2005-08-23 Microchip Technology Incorporated Euclidean distance instructions
US7003543B2 (en) 2001-06-01 2006-02-21 Microchip Technology Incorporated Sticky z bit
US6975679B2 (en) 2001-06-01 2005-12-13 Microchip Technology Incorporated Configuration fuses for setting PWM options
EP3286640A4 (de) * 2015-04-24 2019-07-10 Optimum Semiconductor Technologies, Inc. Computerprozessor mit separaten registern zum adressieren eines speichers

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52116131A (en) * 1976-03-26 1977-09-29 Toshiba Corp Microprogram instruction control unit
US4538239A (en) * 1982-02-11 1985-08-27 Texas Instruments Incorporated High-speed multiplier for microcomputer used in digital signal processing system
US5155820A (en) * 1989-02-21 1992-10-13 Gibson Glenn A Instruction format with designations for operand lengths of byte, half word, word, or double word encoded in address bits
US5031135A (en) * 1989-05-19 1991-07-09 Hitachi Micro Systems, Inc. Device for multi-precision and block arithmetic support in digital processors
US5204953A (en) * 1989-08-04 1993-04-20 Intel Corporation One clock address pipelining in segmentation unit
US5259006A (en) * 1990-04-18 1993-11-02 Quickturn Systems, Incorporated Method for substantially eliminating hold time violations in implementing high speed logic circuits or the like
US5138570A (en) * 1990-09-20 1992-08-11 At&T Bell Laboratories Multiplier signed and unsigned overflow flags
JPH05134848A (ja) * 1991-03-06 1993-06-01 Fujitsu Ltd 中央処理装置のデータシフト回路
US5218564A (en) * 1991-06-07 1993-06-08 National Semiconductor Corporation Layout efficient 32-bit shifter/register with 16-bit interface
US5189319A (en) * 1991-10-10 1993-02-23 Intel Corporation Power reducing buffer/latch circuit
EP0540150B1 (de) * 1991-10-29 1999-06-02 Advanced Micro Devices, Inc. Arithmetik-Logik-Einheit
US5254888A (en) * 1992-03-27 1993-10-19 Picopower Technology Inc. Switchable clock circuit for microprocessors to thereby save power
US5379240A (en) * 1993-03-08 1995-01-03 Cyrix Corporation Shifter/rotator with preconditioned data
US5559730A (en) * 1994-02-18 1996-09-24 Matsushita Electric Industrial Co., Ltd. Shift operation unit and shift operation method
US5404473A (en) * 1994-03-01 1995-04-04 Intel Corporation Apparatus and method for handling string operations in a pipelined processor
US5555202A (en) * 1994-12-05 1996-09-10 Cirrus Logic, Inc. Low-power, high-performance barrel shifter

Also Published As

Publication number Publication date
US5682339A (en) 1997-10-28
EP0772809B1 (de) 2003-08-27
KR970705074A (ko) 1997-09-06
EP0772809A1 (de) 1997-05-14
DE69629646T2 (de) 2004-06-03
WO1996037819A1 (en) 1996-11-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee