DE69628079D1 - Mechanismus auf Systemebene zum Entwerten von Daten, die im externen Cache eines Prozessors in einem Computersystem gespeichert sind - Google Patents

Mechanismus auf Systemebene zum Entwerten von Daten, die im externen Cache eines Prozessors in einem Computersystem gespeichert sind

Info

Publication number
DE69628079D1
DE69628079D1 DE69628079T DE69628079T DE69628079D1 DE 69628079 D1 DE69628079 D1 DE 69628079D1 DE 69628079 T DE69628079 T DE 69628079T DE 69628079 T DE69628079 T DE 69628079T DE 69628079 D1 DE69628079 D1 DE 69628079D1
Authority
DE
Germany
Prior art keywords
devalue
processor
data stored
external cache
computer system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69628079T
Other languages
English (en)
Other versions
DE69628079T2 (de
Inventor
Zahir Ebrahim
Satyanarayana Nishtala
Loo William Van
Kevin Normoyle
Leslie Kohn
Iii Louis F Coffin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69628079D1 publication Critical patent/DE69628079D1/de
Application granted granted Critical
Publication of DE69628079T2 publication Critical patent/DE69628079T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0808—Multiuser, multiprocessor or multiprocessing cache systems with cache invalidating means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0817—Cache consistency protocols using directory methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE69628079T 1995-03-31 1996-03-15 Mechanismus auf Systemebene zum Entwerten von Daten, die im externen Cache eines Prozessors in einem Computersystem gespeichert sind Expired - Fee Related DE69628079T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US41436595A 1995-03-31 1995-03-31
US414365 1995-03-31

Publications (2)

Publication Number Publication Date
DE69628079D1 true DE69628079D1 (de) 2003-06-18
DE69628079T2 DE69628079T2 (de) 2004-02-26

Family

ID=23641138

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69628079T Expired - Fee Related DE69628079T2 (de) 1995-03-31 1996-03-15 Mechanismus auf Systemebene zum Entwerten von Daten, die im externen Cache eines Prozessors in einem Computersystem gespeichert sind

Country Status (5)

Country Link
US (1) US5737755A (de)
EP (1) EP0735481B1 (de)
JP (1) JP3887036B2 (de)
DE (1) DE69628079T2 (de)
SG (1) SG50950A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5835950A (en) * 1996-07-12 1998-11-10 Samsung Electronics Co., Ltd. Self-invalidation method for reducing coherence overheads in a bus-based shared-memory multiprocessor apparatus
US6412047B2 (en) * 1999-10-01 2002-06-25 Stmicroelectronics, Inc. Coherency protocol

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228503A (en) * 1978-10-02 1980-10-14 Sperry Corporation Multiplexed directory for dedicated cache memory system
US4638431A (en) * 1984-09-17 1987-01-20 Nec Corporation Data processing system for vector processing having a cache invalidation control unit
DE3740834A1 (de) * 1987-01-22 1988-08-04 Nat Semiconductor Corp Aufrechterhaltung der kohaerenz zwischen einem mikroprozessorenintegrierten cache-speicher und einem externen speicher
JPH065524B2 (ja) * 1987-11-18 1994-01-19 インターナショナル・ビジネス・マシーンズ・コーポレーション 記憶装置管理方法
US5058006A (en) * 1988-06-27 1991-10-15 Digital Equipment Corporation Method and apparatus for filtering invalidate requests
US5226146A (en) * 1988-10-28 1993-07-06 Hewlett-Packard Company Duplicate tag store purge queue
EP0380842A3 (de) * 1989-02-03 1991-06-12 Digital Equipment Corporation Verfahren und Vorrichtung zur Schnittstellenbildung zwischen einer Systemsteuereinheit für ein Multiprozessorsystem und den zentralen Verarbeitungseinheiten
US5222224A (en) * 1989-02-03 1993-06-22 Digital Equipment Corporation Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor system
CA1325289C (en) * 1989-02-03 1993-12-14 Digital Equipment Corporation Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor computer system
US5036459A (en) * 1989-03-09 1991-07-30 U.S. Philips Corporation Multi-processor computer system with distributed memory and an interprocessor communication mechanism, and method for operating such mechanism
JPH0666056B2 (ja) * 1989-10-12 1994-08-24 甲府日本電気株式会社 情報処理システム
JP2833062B2 (ja) * 1989-10-30 1998-12-09 株式会社日立製作所 キャッシュメモリ制御方法とこのキャッシュメモリ制御方法を用いたプロセッサおよび情報処理装置
US5297269A (en) * 1990-04-26 1994-03-22 Digital Equipment Company Cache coherency protocol for multi processor computer system
US5249284A (en) * 1990-06-04 1993-09-28 Ncr Corporation Method and system for maintaining data coherency between main and cache memories
EP0468831B1 (de) * 1990-06-29 1997-10-15 Digital Equipment Corporation Busprotokoll für Prozessor mit write-back cache
US5193170A (en) * 1990-10-26 1993-03-09 International Business Machines Corporation Methods and apparatus for maintaining cache integrity whenever a cpu write to rom operation is performed with rom mapped to ram
CA2051209C (en) * 1990-11-30 1996-05-07 Pradeep S. Sindhu Consistency protocols for shared memory multiprocessors
US5265235A (en) * 1990-11-30 1993-11-23 Xerox Corporation Consistency protocols for shared memory multiprocessors
JPH04318654A (ja) * 1991-02-13 1992-11-10 Hewlett Packard Co <Hp> マイクロプロセッサへの割り込みのリダイレクションシステム
US5303362A (en) * 1991-03-20 1994-04-12 Digital Equipment Corporation Coupled memory multiprocessor computer system including cache coherency management protocols
JP2703417B2 (ja) * 1991-04-05 1998-01-26 富士通株式会社 受信バッファ
WO1993000638A1 (en) * 1991-06-26 1993-01-07 Ast Research, Inc. Automatic distribution of interrupts controller for a multiple processor computer system
JPH0512117A (ja) * 1991-07-04 1993-01-22 Toshiba Corp キヤツシユ一致化方式
DE69230428T2 (de) * 1991-09-27 2000-08-03 Sun Microsystems Inc Verklemmungserkennung und Maskierung enthaltende Busarbitrierungsarchitektur
EP0553743A1 (de) * 1992-01-31 1993-08-04 Motorola, Inc. Cachespeichersteuerungseinrichtung
US5319766A (en) * 1992-04-24 1994-06-07 Digital Equipment Corporation Duplicate tag store for a processor having primary and backup cache memories in a multiprocessor computer system
US5553266A (en) * 1992-04-24 1996-09-03 Digital Equipment Corporation Update vs. invalidate policy for a snoopy bus protocol
US5319753A (en) * 1992-09-29 1994-06-07 Zilog, Inc. Queued interrupt mechanism with supplementary command/status/message information
US5434993A (en) * 1992-11-09 1995-07-18 Sun Microsystems, Inc. Methods and apparatus for creating a pending write-back controller for a cache controller on a packet switched memory bus employing dual directories
US5604882A (en) * 1993-08-27 1997-02-18 International Business Machines Corporation System and method for empty notification from peer cache units to global storage control unit in a multiprocessor data processing system
JPH07105031A (ja) * 1993-09-20 1995-04-21 Internatl Business Mach Corp <Ibm> 多重プロセッサ・コンピュータ・システム内で割込み情報を伝えるための方法および装置
US5603005A (en) * 1994-12-27 1997-02-11 Unisys Corporation Cache coherency scheme for XBAR storage structure with delayed invalidates until associated write request is executed

Also Published As

Publication number Publication date
JP3887036B2 (ja) 2007-02-28
JPH0922382A (ja) 1997-01-21
EP0735481A1 (de) 1996-10-02
EP0735481B1 (de) 2003-05-14
US5737755A (en) 1998-04-07
SG50950A1 (en) 1998-07-20
DE69628079T2 (de) 2004-02-26

Similar Documents

Publication Publication Date Title
DE69619425D1 (de) Datenkonversion in einem Multiprozessorsystem mit gleichzeitiger Aufrechterhaltung der Systemoperationen
DE69529374D1 (de) Datenprozessor mit Teilassoziativer Einheit
DE3381331D1 (de) Interaktives informationsanzeigesystem mit einem rechner.
DE69331478D1 (de) Gerät zur Anzeige von Daten betreffend die Übungsleistung
DE69424626D1 (de) Parallele Datenverarbeitung in einem Einzelprozessor
DE69029119T2 (de) Interaktives grafisches Rechnersystem um deutliche Zeichnungen zu machen
DE69635865D1 (de) Adressentransformation in einem cluster-computersystem
DE69421720D1 (de) Geschwindigkeitsdatenanalyse
DE68919669T2 (de) Graphikbilddatenkompressionsverfahren.
DE69607887D1 (de) Hauptspeichersegmentierung, um Datenpfade in einem Rechnersystem leistungsfähiger zu machen
DE69628079D1 (de) Mechanismus auf Systemebene zum Entwerten von Daten, die im externen Cache eines Prozessors in einem Computersystem gespeichert sind
DE69621110T2 (de) Computersystem mit mehreren Anzeigeeinheiten zur Anzeige von Daten, die verschiedenen Prozessen entsprechen
DE68921214D1 (de) ZUR SPEICHERUNG VON ZWEI ZUGEHöRIGEN DATENEINHEITEN ANGEPASSTES SPEICHERSYSTEM.
FR2703176B1 (fr) Dispositif d&#39;affichage a deroulement horizontal.
EP0663659A3 (de) Anzeige von Zeichen in einem Datenverarbeitungssystem.
DE69220956T2 (de) Graphisches rechnersystem mit pause-möglichkeit für interaktive operationen
DE69419161T2 (de) Dynamischer wert-mechanismus für einen containerverwalter eines rechnerspeichers
谢启江 A Methodology for Assessing the Robustness of Distributed Information System (DIS)
Aldunate The Project Data Bank approach to an efficient public investment management system
FR2700435B1 (fr) Boîtier électronique enfichable, formant notamment une carte amovible pour ordinateur personnel.
FR2704078B1 (fr) Dispositif pour générer en relief une application informatique.
GB2305530B (en) Apparatus for writing data to PC card
DE69633062D1 (de) Verbesserung der modifizierfähigkeit eines datensystems
KR960702336A (ko) 유기장에서의 컴퓨터시스템 (computer system in amusement place)
SG33394G (en) Apparatus for maintaining consistency in a multi-processor computer system using virtual caching.

Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: SUN MICROSYSTEMS, INC., SANTA CLARA, CALIF., US

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee