DE69621228D1 - Verfahren, modul und vorrichtung zum empfang digitaler signale mit iterativer arbeitsweise - Google Patents
Verfahren, modul und vorrichtung zum empfang digitaler signale mit iterativer arbeitsweiseInfo
- Publication number
- DE69621228D1 DE69621228D1 DE69621228T DE69621228T DE69621228D1 DE 69621228 D1 DE69621228 D1 DE 69621228D1 DE 69621228 T DE69621228 T DE 69621228T DE 69621228 T DE69621228 T DE 69621228T DE 69621228 D1 DE69621228 D1 DE 69621228D1
- Authority
- DE
- Germany
- Prior art keywords
- module
- digital signals
- receiving digital
- iterative operation
- iterative
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0047—Decoding adapted to other signal detection operation
- H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03178—Arrangements involving sequence estimation techniques
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0066—Parallel concatenated codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9501603A FR2730370B1 (fr) | 1995-02-07 | 1995-02-07 | Dispositif de reception de signaux numeriques a structure iterative, module et procede correspondants |
PCT/FR1996/000197 WO1996024999A1 (fr) | 1995-02-07 | 1996-02-06 | Dispositif de reception de signaux numeriques a structure iterative, module et procede correspondants |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69621228D1 true DE69621228D1 (de) | 2002-06-20 |
DE69621228T2 DE69621228T2 (de) | 2003-01-09 |
Family
ID=9476063
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69621228T Expired - Lifetime DE69621228T2 (de) | 1995-02-07 | 1996-02-06 | Verfahren, modul und vorrichtung zum empfang digitaler signale mit iterativer arbeitsweise |
Country Status (5)
Country | Link |
---|---|
US (1) | US6108388A (de) |
EP (1) | EP0808538B1 (de) |
DE (1) | DE69621228T2 (de) |
FR (1) | FR2730370B1 (de) |
WO (1) | WO1996024999A1 (de) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5983384A (en) * | 1997-04-21 | 1999-11-09 | General Electric Company | Turbo-coding with staged data transmission and processing |
AR010163A1 (es) * | 1997-05-12 | 2000-05-17 | Siemens Ag | Procedimiento para la codificacion de canal de informaciones digitales de comunicacion |
FR2763454B1 (fr) * | 1997-05-15 | 1999-08-06 | France Telecom | Dispositif d'egalisation et de decodage pour un canal de transmission numerique selectif en frequence |
JPH1117555A (ja) * | 1997-06-26 | 1999-01-22 | Mitsubishi Electric Corp | データ伝送システム、受信装置および記録媒体 |
DE19749148C2 (de) | 1997-11-06 | 1999-12-02 | Siemens Ag | Verfahren und Einrichtung zur Datenübertragung in einem digitalen Übertragungssystem mit ARQ |
EP0946024A1 (de) * | 1998-03-25 | 1999-09-29 | Ascom Systec AG | Entscheidungsrückgekoppelte Entzerrung, insbesondere für Datenvermittlung über Stromversorgungsnetzwerken |
ES2259227T3 (es) * | 1998-04-03 | 2006-09-16 | Agere Systems Inc. | Decodificacion iterativa de señales. |
EP0959580A1 (de) * | 1998-05-19 | 1999-11-24 | Lucent Technologies Inc. | Iterativer Entzerrer/Dekodierer |
EP1065851A1 (de) * | 1999-07-02 | 2001-01-03 | Motorola, Inc. | Entscheidungsrückgekoppelter Entzerrer mit zustanderduzierter Folgeschätzung |
US6400290B1 (en) | 1999-11-29 | 2002-06-04 | Altera Corporation | Normalization implementation for a logmap decoder |
FR2804260B1 (fr) * | 2000-01-21 | 2002-10-18 | Mitsubishi Electric Inf Tech | Procede de transmission numerique de type a codage correcteur d'erreurs |
DE10048872A1 (de) * | 2000-10-02 | 2002-04-25 | Infineon Technologies Ag | Abschnittsweise Entschachtelung |
FR2822001B1 (fr) * | 2001-03-06 | 2003-06-27 | France Telecom | Dispositif d'egalisation et de decodage de canaux selectifs en frequence |
US7010052B2 (en) * | 2001-04-16 | 2006-03-07 | The Ohio University | Apparatus and method of CTCM encoding and decoding for a digital communication system |
JP3735579B2 (ja) * | 2002-02-26 | 2006-01-18 | 株式会社東芝 | ディスク記憶装置及びデータ記録再生方法 |
JP3607683B2 (ja) * | 2002-03-13 | 2005-01-05 | 株式会社東芝 | ディスク記憶装置及びデータ記録再生方法 |
US7178080B2 (en) * | 2002-08-15 | 2007-02-13 | Texas Instruments Incorporated | Hardware-efficient low density parity check code for digital communications |
JP4040943B2 (ja) * | 2002-10-01 | 2008-01-30 | 株式会社東芝 | ディスク記憶装置及びデータ再生方法 |
JP3749889B2 (ja) * | 2002-10-17 | 2006-03-01 | 株式会社東芝 | Prml検出を適用する信号処理デバイス、同デバイスを備えたディスク記憶装置、及び同装置におけるフィードバック制御のための信号処理方法 |
US7296216B2 (en) * | 2003-01-23 | 2007-11-13 | Broadcom Corporation | Stopping and/or reducing oscillations in low density parity check (LDPC) decoding |
US7139959B2 (en) * | 2003-03-24 | 2006-11-21 | Texas Instruments Incorporated | Layered low density parity check decoding for digital communications |
JP4098660B2 (ja) * | 2003-04-23 | 2008-06-11 | 株式会社東芝 | ディスク記憶装置及びシンクマーク検出方法 |
GB2459998B (en) * | 2007-03-27 | 2011-06-15 | Shell Int Research | Wellbore communication, downhole module and method for communicating |
CN102812431A (zh) | 2010-03-22 | 2012-12-05 | Lrdc系统有限公司 | 用于识别与保护一组源数据的完整性的方法 |
DE102010044458A1 (de) | 2010-09-06 | 2012-03-08 | Technische Universität Dortmund | Verfahren und System zur Schätzung einer originalen Informationssequenz |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5271042A (en) * | 1989-10-13 | 1993-12-14 | Motorola, Inc. | Soft decision decoding with channel equalization |
FR2675971B1 (fr) * | 1991-04-23 | 1993-08-06 | France Telecom | Procede de codage correcteur d'erreurs a au moins deux codages convolutifs systematiques en parallele, procede de decodage iteratif, module de decodage et decodeur correspondants. |
FR2679721B1 (fr) * | 1991-07-22 | 1993-09-24 | Alcatel Radiotelephone | Procede d'egalisation adaptative reduisant l'interference intersymbole, et dispositif de reception et application correspondants. |
CA2076099A1 (en) * | 1991-09-03 | 1993-03-04 | Howard Leroy Lester | Automatic simulcast alignment |
US5537436A (en) * | 1993-06-14 | 1996-07-16 | At&T Corp. | Simultaneous analog and digital communication applications |
US5719923A (en) * | 1993-06-14 | 1998-02-17 | Paradyne Corporation | Sketching unit for transmission of sketches and notes over normal telephone lines |
US5684834A (en) * | 1993-06-14 | 1997-11-04 | Paradyne Corporation | Simultaneous analog and digital communication using fractional rate encoding |
US5537441A (en) * | 1993-06-14 | 1996-07-16 | At&T Corp. | Controlled simultaneous analog and digital communication |
US5513216A (en) * | 1994-10-13 | 1996-04-30 | At&T Corp. | Hybrid equalizer arrangement for use in data communications equipment |
-
1995
- 1995-02-07 FR FR9501603A patent/FR2730370B1/fr not_active Expired - Fee Related
-
1996
- 1996-02-06 EP EP96903060A patent/EP0808538B1/de not_active Expired - Lifetime
- 1996-02-06 WO PCT/FR1996/000197 patent/WO1996024999A1/fr active IP Right Grant
- 1996-02-06 US US08/894,207 patent/US6108388A/en not_active Expired - Lifetime
- 1996-02-06 DE DE69621228T patent/DE69621228T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2730370B1 (fr) | 1997-04-25 |
EP0808538A1 (de) | 1997-11-26 |
US6108388A (en) | 2000-08-22 |
WO1996024999A1 (fr) | 1996-08-15 |
FR2730370A1 (fr) | 1996-08-09 |
DE69621228T2 (de) | 2003-01-09 |
EP0808538B1 (de) | 2002-05-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |