DE69615616D1 - Verfahren und Anordnung zur Überwachung von Ressourcenzuteilung innerhalb eines Prozessors - Google Patents

Verfahren und Anordnung zur Überwachung von Ressourcenzuteilung innerhalb eines Prozessors

Info

Publication number
DE69615616D1
DE69615616D1 DE69615616T DE69615616T DE69615616D1 DE 69615616 D1 DE69615616 D1 DE 69615616D1 DE 69615616 T DE69615616 T DE 69615616T DE 69615616 T DE69615616 T DE 69615616T DE 69615616 D1 DE69615616 D1 DE 69615616D1
Authority
DE
Germany
Prior art keywords
processor
arrangement
resource allocation
monitoring resource
monitoring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69615616T
Other languages
English (en)
Inventor
Kin Chan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69615616D1 publication Critical patent/DE69615616D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3865—Recovery, e.g. branch miss-prediction, exception handling using deferred exception handling, e.g. exception flags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384—Register renaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
DE69615616T 1995-06-29 1996-05-31 Verfahren und Anordnung zur Überwachung von Ressourcenzuteilung innerhalb eines Prozessors Expired - Lifetime DE69615616D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/496,833 US5809268A (en) 1995-06-29 1995-06-29 Method and system for tracking resource allocation within a processor

Publications (1)

Publication Number Publication Date
DE69615616D1 true DE69615616D1 (de) 2001-11-08

Family

ID=23974348

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69615616T Expired - Lifetime DE69615616D1 (de) 1995-06-29 1996-05-31 Verfahren und Anordnung zur Überwachung von Ressourcenzuteilung innerhalb eines Prozessors

Country Status (5)

Country Link
US (1) US5809268A (de)
EP (1) EP0751458B1 (de)
JP (1) JP3093639B2 (de)
KR (1) KR100225244B1 (de)
DE (1) DE69615616D1 (de)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5860018A (en) * 1997-06-25 1999-01-12 Sun Microsystems, Inc. Method for tracking pipeline resources in a superscalar processor
US6324640B1 (en) * 1998-06-30 2001-11-27 International Business Machines Corporation System and method for dispatching groups of instructions using pipelined register renaming
US6338133B1 (en) 1999-03-12 2002-01-08 International Business Machines Corporation Measured, allocation of speculative branch instructions to processor execution units
US6810422B1 (en) 2000-01-14 2004-10-26 Lockheed Martin Tactical Defense Systems System and method for probabilistic quality of communication service determination
US6622236B1 (en) * 2000-02-17 2003-09-16 International Business Machines Corporation Microprocessor instruction fetch unit for processing instruction groups having multiple branch instructions
US7188232B1 (en) * 2000-05-03 2007-03-06 Choquette Jack H Pipelined processing with commit speculation staging buffer and load/store centric exception handling
US6675372B1 (en) * 2000-10-31 2004-01-06 Sun Microsystems, Inc. Counting speculative and non-speculative events
US20040186982A9 (en) * 2002-02-06 2004-09-23 Matthew Becker Stalling Instructions in a pipelined microprocessor
US6996802B2 (en) 2002-03-18 2006-02-07 Sun Microsystems, Inc. Method and apparatus for deployment of high integrity software using initialization order and calling order constraints
US6912633B2 (en) 2002-03-18 2005-06-28 Sun Microsystems, Inc. Enhanced memory management for portable devices
US7181737B2 (en) 2002-03-18 2007-02-20 Sun Microsystems, Inc. Method and apparatus for deployment of high integrity software using static procedure return addresses
US7010783B2 (en) 2002-03-18 2006-03-07 Sun Microsystems, Inc. Method and apparatus for deployment of high integrity software using reduced dynamic memory allocation
US7281237B2 (en) 2003-01-16 2007-10-09 Sun Microsystems, Inc. Run-time verification of annotated software code
US7657893B2 (en) * 2003-04-23 2010-02-02 International Business Machines Corporation Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor
US7424620B2 (en) 2003-09-25 2008-09-09 Sun Microsystems, Inc. Interleaved data and instruction streams for application program obfuscation
US7415618B2 (en) 2003-09-25 2008-08-19 Sun Microsystems, Inc. Permutation of opcode values for application program obfuscation
US7363620B2 (en) 2003-09-25 2008-04-22 Sun Microsystems, Inc. Non-linear execution of application program instructions for application program obfuscation
US8220058B2 (en) 2003-09-25 2012-07-10 Oracle America, Inc. Rendering and encryption engine for application program obfuscation
US7353499B2 (en) 2003-09-25 2008-04-01 Sun Microsystems, Inc. Multiple instruction dispatch tables for application program obfuscation
US8190863B2 (en) * 2004-07-02 2012-05-29 Intel Corporation Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction
US20060026388A1 (en) * 2004-07-30 2006-02-02 Karp Alan H Computer executing instructions having embedded synchronization points
JP4276201B2 (ja) * 2005-03-31 2009-06-10 富士通株式会社 Ｓｍｔプロセッサ用課金処理装置，課金処理方法，および課金処理プログラム
US8161493B2 (en) 2008-07-15 2012-04-17 International Business Machines Corporation Weighted-region cycle accounting for multi-threaded processor cores
US9690625B2 (en) * 2009-06-16 2017-06-27 Oracle America, Inc. System and method for out-of-order resource allocation and deallocation in a threaded machine
US8776061B2 (en) * 2010-12-16 2014-07-08 International Business Machines Corporation Real-time distributed monitoring of local and global processor resource allocations and deallocations
US9229791B1 (en) * 2012-08-24 2016-01-05 Qlogic, Corporation System and method for high speed multiple buffer allocation
US9448800B2 (en) * 2013-03-14 2016-09-20 Samsung Electronics Co., Ltd. Reorder-buffer-based static checkpointing for rename table rebuilding
US11263047B2 (en) * 2018-02-15 2022-03-01 Sap Se Metadata management for multi-core resource manager
US10929139B2 (en) 2018-09-27 2021-02-23 Qualcomm Incorporated Providing predictive instruction dispatch throttling to prevent resource overflows in out-of-order processor (OOP)-based devices
US11086630B1 (en) 2020-02-27 2021-08-10 International Business Machines Corporation Finish exception handling of an instruction completion table
US11829187B2 (en) 2022-01-30 2023-11-28 Simplex Micro, Inc. Microprocessor with time counter for statically dispatching instructions
US11954491B2 (en) 2022-01-30 2024-04-09 Simplex Micro, Inc. Multi-threading microprocessor with a time counter for statically dispatching instructions
US11829762B2 (en) 2022-01-30 2023-11-28 Simplex Micro, Inc. Time-resource matrix for a microprocessor with time counter for statically dispatching instructions
US11829767B2 (en) 2022-01-30 2023-11-28 Simplex Micro, Inc. Register scoreboard for a microprocessor with a time counter for statically dispatching instructions
US20230315474A1 (en) * 2022-04-05 2023-10-05 Simplex Micro, Inc. Microprocessor with apparatus and method for replaying instructions

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1304188A (de) * 1969-12-09 1973-01-24
US4145742A (en) * 1974-09-30 1979-03-20 Hewlett-Packard Company Programmable calculator including user-definable keys
US4056711A (en) * 1975-10-24 1977-11-01 William Paul Lamar Method and apparatus for programming microprocessors
US4241416A (en) * 1977-07-01 1980-12-23 Systron-Donner Corporation Monitoring apparatus for processor controlled equipment
US4270184A (en) * 1978-03-16 1981-05-26 Tokyo Shibaura Denki Kabushiki Kaisha Microprocessor-based programmable logic controller
US4371931A (en) * 1979-06-27 1983-02-01 Burroughs Corporation Linear micro-sequencer for micro-processor system utilizing specialized instruction format
US4575816A (en) * 1980-12-19 1986-03-11 International Business Machines Corporation Interactive transactions processor using sequence table pointers to access function table statements controlling execution of specific interactive functions
DE3239199C2 (de) * 1982-10-22 1986-03-20 Georg Neumann Gmbh, 1000 Berlin Verfahren zum Schneiden einer mit Seiten- und Tiefenschrift modulierten, spiralförmigen Rille in einen ebenen, scheibenförmigen Aufzeichnungsträger, sowie Schaltungsanordnung zur Durchführung dieses Verfahrens
US4722049A (en) * 1985-10-11 1988-01-26 Unisys Corporation Apparatus for out-of-order program execution
CA1286421C (en) * 1987-10-14 1991-07-16 Martin Claude Lefebvre Message fifo buffer controller
US5307464A (en) * 1989-12-07 1994-04-26 Hitachi, Ltd. Microprocessor and method for setting up its peripheral functions
US5289585A (en) * 1990-03-26 1994-02-22 Siemens Nixdorf Informationssysteme Ag Multiprocessor system having a system bus for the coupling of several processing units with appertaining private cache memories and a common main memory
US5581719A (en) * 1992-11-12 1996-12-03 Digital Equipment Corporation Multiple block line prediction
US5584037A (en) * 1994-03-01 1996-12-10 Intel Corporation Entry allocation in a circular buffer
US5586278A (en) * 1994-03-01 1996-12-17 Intel Corporation Method and apparatus for state recovery following branch misprediction in an out-of-order microprocessor
JPH07281893A (ja) * 1994-04-15 1995-10-27 Internatl Business Mach Corp <Ibm> 処理システム及び演算方法
US5590352A (en) * 1994-04-26 1996-12-31 Advanced Micro Devices, Inc. Dependency checking and forwarding of variable width operands

Also Published As

Publication number Publication date
KR100225244B1 (ko) 1999-10-15
US5809268A (en) 1998-09-15
JP3093639B2 (ja) 2000-10-03
EP0751458B1 (de) 2001-10-04
JPH09120359A (ja) 1997-05-06
EP0751458A1 (de) 1997-01-02

Similar Documents

Publication Publication Date Title
DE69615616D1 (de) Verfahren und Anordnung zur Überwachung von Ressourcenzuteilung innerhalb eines Prozessors
DE69738646D1 (de) Verfahren zur Ausführung eines Prozesses und Betriebsmittelzugriffsverfahren in einem Computer-System
DE69618131D1 (de) Anordnung und Verfahren zur Betriebsmittelverwaltung von verteilten Objekten
DE69533680D1 (de) Verfahren und Vorrichtung zur dynamischen Bestimmung und Zuteilung von Zugriffsguoten für ein gemeinsames Betriebsmittel
DE69637182D1 (de) Vorrichtung und verfahren zur vorverarbeitung von computerprogrammen vor netzwerkübertragung
DE69627144D1 (de) Verfahren und gerät zur leistungsverbesserung eines prozessors
DE69824688D1 (de) System und Verfahren zur Leistungsoptimierung eines Rechnersystems
DE69508458D1 (de) Verfahren und Vorrichtung zur Entwässerung und Trocknung eines feuchten Gegenstandes
DE59915054D1 (de) Verfahren und Vorrichtung zur Überwachung eines Gefäßzugangs
DE69414105T2 (de) Vorrichtung und verfahren zur automatischen erkennung und konfiguration eines peripheriegeräts
DE69810910T2 (de) System und verfahren zur automatischen aufrechterhaltung eines rechnersystems
DE69637860D1 (de) Verfahren und vorrichtung zur Identifizierung von benutzerwählbaren Bereichen innerhalb mehrerer Einzelbilder
DE69636050D1 (de) Verfahren und system für die verwaltung eines datenobjektes zur verwendung von vorgegebenen zuständen
DE19880924T1 (de) Verfahren und Vorrichtung zur Vorhersage eines Fehlerzustandes
DE69725017D1 (de) Verfahren und gerät zur schmierverminderung eines fingerabdrucks
DE69413104T2 (de) Anordnung und Verfahren zur Überwachung von Tafeln von einfachen Netzverwaltungsprotokollen
DE69621739T2 (de) Verfahren, vorrichtung und system zur bestimmung der änderungen eines prüfkörpers
DE69528558D1 (de) Vorrichtung und Verfahren zur Identifizierung von mehreren Transpondern
DE69614764D1 (de) Verfahren zur Ausführung von Anträgen eines Netzbrowsers
DE19782177T1 (de) Verfahren und Einrichtung zur Durchführung von TLB-Shootdown-Operationen in einem Multiprozessorsystem
DE69628087D1 (de) Vorrichtung und Verfahren zur Verwaltung von Rechnerprozessen
DE69735972D1 (de) Verfahren und Vorrichtung zur Verwaltung eines Computernetzes
DE69532014D1 (de) Vorrichtung und Methode zur Feststellung eines Punktes
DE19749068B4 (de) Verfahren und Vorrichtung zur Überwachung eines Rechnersystems bestehend aus wenigstens zwei Prozessoren
DE69510497D1 (de) Vorrichtung und Verfahren zur Halterung eines Computerbauelementes

Legal Events

Date Code Title Description
8332 No legal effect for de