DE69614821T2 - Geschalteter Taktgeber - Google Patents

Geschalteter Taktgeber

Info

Publication number
DE69614821T2
DE69614821T2 DE69614821T DE69614821T DE69614821T2 DE 69614821 T2 DE69614821 T2 DE 69614821T2 DE 69614821 T DE69614821 T DE 69614821T DE 69614821 T DE69614821 T DE 69614821T DE 69614821 T2 DE69614821 T2 DE 69614821T2
Authority
DE
Germany
Prior art keywords
switched clock
clock
switched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69614821T
Other languages
English (en)
Other versions
DE69614821D1 (de
Inventor
Danilo Pau
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69614821D1 publication Critical patent/DE69614821D1/de
Publication of DE69614821T2 publication Critical patent/DE69614821T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/64—Generators producing trains of pulses, i.e. finite sequences of pulses
    • H03K3/66—Generators producing trains of pulses, i.e. finite sequences of pulses by interrupting the output of a generator
    • H03K3/70—Generators producing trains of pulses, i.e. finite sequences of pulses by interrupting the output of a generator time intervals between all adjacent pulses of one train being equal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H03K5/1565—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
DE69614821T 1996-01-19 1996-01-19 Geschalteter Taktgeber Expired - Fee Related DE69614821T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP96830018A EP0785624B1 (de) 1996-01-19 1996-01-19 Geschalteter Taktgeber

Publications (2)

Publication Number Publication Date
DE69614821D1 DE69614821D1 (de) 2001-10-04
DE69614821T2 true DE69614821T2 (de) 2002-01-17

Family

ID=8225789

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69614821T Expired - Fee Related DE69614821T2 (de) 1996-01-19 1996-01-19 Geschalteter Taktgeber

Country Status (4)

Country Link
US (1) US5995578A (de)
EP (1) EP0785624B1 (de)
JP (1) JPH10150360A (de)
DE (1) DE69614821T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6510473B1 (en) * 1999-08-19 2003-01-21 Micron Technology, Inc. Apparatus and method for automatically selecting an appropriate signal from a plurality of signals, based on the configuration of a peripheral installed within a computing device
US6617904B1 (en) 1999-11-09 2003-09-09 Koninklijke Philips Electronics N.V. Electronic circuit with clock generating circuit
DE10200898B4 (de) 2002-01-11 2004-12-09 Infineon Technologies Ag Integrierte Schaltung und Verfahren zum Betrieb einer integrierten Schaltung
US9762228B2 (en) * 2015-09-15 2017-09-12 Qualcomm Incorporated High-speed programmable clock divider
FR3115149B1 (fr) 2020-10-09 2024-02-23 St Microelectronics Grenoble 2 Dispositif de mémorisation

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3822857C1 (en) * 1987-04-06 1989-10-19 Ant Nachrichtentechnik Gmbh, 7150 Backnang, De Method and circuit arrangement for producing a phase-shifted clock signal
DE3841431A1 (de) * 1988-12-06 1990-06-07 Krone Ag Schaltungsanordnung fuer eine digital einstellbare frequenzerzeugung
US5029191A (en) * 1990-01-29 1991-07-02 Allied-Signal Inc. Binary counter with resolution doubling
US5812832A (en) * 1993-01-29 1998-09-22 Advanced Micro Devices, Inc. Digital clock waveform generator and method for generating a clock signal
US5598514A (en) * 1993-08-09 1997-01-28 C-Cube Microsystems Structure and method for a multistandard video encoder/decoder

Also Published As

Publication number Publication date
JPH10150360A (ja) 1998-06-02
DE69614821D1 (de) 2001-10-04
EP0785624A1 (de) 1997-07-23
EP0785624B1 (de) 2001-08-29
US5995578A (en) 1999-11-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee