DE69613792D1 - Datenkodierung mit einer variablem blocklänge - Google Patents

Datenkodierung mit einer variablem blocklänge

Info

Publication number
DE69613792D1
DE69613792D1 DE69613792T DE69613792T DE69613792D1 DE 69613792 D1 DE69613792 D1 DE 69613792D1 DE 69613792 T DE69613792 T DE 69613792T DE 69613792 T DE69613792 T DE 69613792T DE 69613792 D1 DE69613792 D1 DE 69613792D1
Authority
DE
Germany
Prior art keywords
data encoding
block length
variable block
variable
encoding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69613792T
Other languages
English (en)
Other versions
DE69613792T2 (de
Inventor
Lih-Jyh Weng
John Deroo
Michael Leis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Quantum Corp
Original Assignee
Quantum Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Quantum Corp filed Critical Quantum Corp
Publication of DE69613792D1 publication Critical patent/DE69613792D1/de
Application granted granted Critical
Publication of DE69613792T2 publication Critical patent/DE69613792T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/46—Conversion to or from run-length codes, i.e. by representing the number of consecutive digits, or groups of digits, of the same kind by a code word and a digit indicative of that kind
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/04—Conversion to or from representation by pulses the pulses having two levels
    • H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
    • H03M5/145—Conversion to or from block codes or representations thereof
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T9/00—Image coding
    • G06T9/005—Statistical coding, e.g. Huffman, run length coding
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/31—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining coding for error detection or correction and efficient use of the spectrum

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • General Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Error Detection And Correction (AREA)
DE69613792T 1995-05-08 1996-05-06 Datenkodierung mit einer variablem blocklänge Expired - Fee Related DE69613792T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/436,980 US5574448A (en) 1995-05-08 1995-05-08 Method and apparatus for encoding data with variable block lengths
PCT/US1996/006378 WO1996036130A1 (en) 1995-05-08 1996-05-06 Encoding data with variable block lengths

Publications (2)

Publication Number Publication Date
DE69613792D1 true DE69613792D1 (de) 2001-08-16
DE69613792T2 DE69613792T2 (de) 2001-10-31

Family

ID=23734584

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69613792T Expired - Fee Related DE69613792T2 (de) 1995-05-08 1996-05-06 Datenkodierung mit einer variablem blocklänge

Country Status (6)

Country Link
US (1) US5574448A (de)
EP (1) EP0770284B1 (de)
JP (1) JPH10503355A (de)
KR (1) KR970705241A (de)
DE (1) DE69613792T2 (de)
WO (1) WO1996036130A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9727398D0 (en) * 1997-12-29 1998-02-25 Sgs Thomson Microelectronics Run-length encoding
JP4009798B2 (ja) * 1998-08-24 2007-11-21 ソニー株式会社 復調装置および方法
JP2000349843A (ja) * 1999-06-01 2000-12-15 Nec Corp 変復調装置及びその変復調方法
US6505320B1 (en) 2000-03-09 2003-01-07 Cirrus Logic, Incorporated Multiple-rate channel ENDEC in a commuted read/write channel for disk storage systems
US7003046B2 (en) * 2000-12-28 2006-02-21 Victor Company Of Japan, Ltd. Modulation system
US8004430B2 (en) 2006-01-12 2011-08-23 St-Ericsson Sa Coding scheme for serial data communications
JP4902665B2 (ja) * 2006-11-17 2012-03-21 アラクサラネットワークス株式会社 データ伝送装置および伝送符号の生成方法
WO2009038311A2 (en) * 2007-09-17 2009-03-26 Lg Electronics Inc. Data modulation method, modulator, recording method, and recording apparatus

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3583819D1 (de) * 1984-05-21 1991-09-26 Matsushita Electric Ind Co Ltd Verfahren und vorrichtung zur erzeugung eines lauflaengenbegrenzten kodes.
JPH0329517A (ja) * 1989-06-27 1991-02-07 Matsushita Electric Ind Co Ltd 記録装置と再生装置
JP3355666B2 (ja) * 1992-10-22 2002-12-09 ソニー株式会社 変調回路

Also Published As

Publication number Publication date
EP0770284A1 (de) 1997-05-02
US5574448A (en) 1996-11-12
KR970705241A (ko) 1997-09-06
EP0770284A4 (de) 1997-09-17
WO1996036130A1 (en) 1996-11-14
DE69613792T2 (de) 2001-10-31
EP0770284B1 (de) 2001-07-11
JPH10503355A (ja) 1998-03-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee