DE69601268D1 - Hochgeschwindigkeits-cmos-d/a-wandler niedriger leistung zur wellensynthese in einem netz - Google Patents

Hochgeschwindigkeits-cmos-d/a-wandler niedriger leistung zur wellensynthese in einem netz

Info

Publication number
DE69601268D1
DE69601268D1 DE69601268T DE69601268T DE69601268D1 DE 69601268 D1 DE69601268 D1 DE 69601268D1 DE 69601268 T DE69601268 T DE 69601268T DE 69601268 T DE69601268 T DE 69601268T DE 69601268 D1 DE69601268 D1 DE 69601268D1
Authority
DE
Germany
Prior art keywords
network
low performance
speed cmos
wave synthesis
converter low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69601268T
Other languages
English (en)
Other versions
DE69601268T2 (de
Inventor
John Wincn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE69601268D1 publication Critical patent/DE69601268D1/de
Application granted granted Critical
Publication of DE69601268T2 publication Critical patent/DE69601268T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
    • H03M1/068—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
    • H03M1/0682—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/742—Simultaneous conversion using current sources as quantisation value generators
    • H03M1/747—Simultaneous conversion using current sources as quantisation value generators with equal currents which are switched by unary decoded digital signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Electronic Switches (AREA)
  • Amplifiers (AREA)
DE69601268T 1995-06-07 1996-03-01 Hochgeschwindigkeits-cmos-d/a-wandler niedriger leistung zur wellensynthese in einem netz Expired - Fee Related DE69601268T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/482,113 US5600321A (en) 1995-06-07 1995-06-07 High speed, low power CMOS D/A converter for wave synthesis in network
PCT/US1996/002823 WO1996041421A1 (en) 1995-06-07 1996-03-01 High speed, low power cmos d/a converter for wave synthesis in network

Publications (2)

Publication Number Publication Date
DE69601268D1 true DE69601268D1 (de) 1999-02-11
DE69601268T2 DE69601268T2 (de) 1999-08-12

Family

ID=23914726

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69601268T Expired - Fee Related DE69601268T2 (de) 1995-06-07 1996-03-01 Hochgeschwindigkeits-cmos-d/a-wandler niedriger leistung zur wellensynthese in einem netz

Country Status (6)

Country Link
US (1) US5600321A (de)
EP (1) EP0834220B1 (de)
JP (1) JPH11506286A (de)
DE (1) DE69601268T2 (de)
TW (1) TW295750B (de)
WO (1) WO1996041421A1 (de)

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US6072415A (en) * 1998-10-29 2000-06-06 Neomagic Corp. Multi-mode 8/9-bit DAC with variable input-precision and output range for VGA and NTSC outputs
US6185263B1 (en) * 1998-11-09 2001-02-06 Broadcom Corporation Adaptively configurable class-A/class-B transmit DAC for transceiver emission and power consumption control
US6332004B1 (en) * 1998-10-30 2001-12-18 Broadcom Corporation Analog discrete-time filtering for unshielded twisted pair data communication
US6925130B2 (en) * 1998-10-30 2005-08-02 Broadcom Corporation Method and system for a reduced emissions direct drive transmitter for unshielded twisted pair (UTP) applications
US6775529B1 (en) 2000-07-31 2004-08-10 Marvell International Ltd. Active resistive summer for a transformer hybrid
USRE41831E1 (en) 2000-05-23 2010-10-19 Marvell International Ltd. Class B driver
US7194037B1 (en) 2000-05-23 2007-03-20 Marvell International Ltd. Active replica transformer hybrid
US7312739B1 (en) * 2000-05-23 2007-12-25 Marvell International Ltd. Communication driver
US7433665B1 (en) 2000-07-31 2008-10-07 Marvell International Ltd. Apparatus and method for converting single-ended signals to a differential signal, and transceiver employing same
US7606547B1 (en) * 2000-07-31 2009-10-20 Marvell International Ltd. Active resistance summer for a transformer hybrid
JP3494366B2 (ja) * 2000-08-04 2004-02-09 松下電器産業株式会社 Ｄａ変換器
US6642799B2 (en) * 2000-11-01 2003-11-04 Primarian, Inc. Phase lock loop destress circuit
US7023370B2 (en) * 2002-02-28 2006-04-04 Charles Douglas Murphy Shared parallel digital-to-analog conversion
US6952177B1 (en) * 2004-03-08 2005-10-04 The Boeing Company Traveling wave, multiplying D/A converter
DE602004012266D1 (de) * 2004-09-29 2008-04-17 St Microelectronics Srl Gerät zur Digital/Analogwandlung eines Signals
US7081844B1 (en) * 2005-04-22 2006-07-25 Ess Technology, Inc. Devices and methods for converting a digital signal into an analog signal
US7312662B1 (en) 2005-08-09 2007-12-25 Marvell International Ltd. Cascode gain boosting system and method for a transmitter
US7577892B1 (en) 2005-08-25 2009-08-18 Marvell International Ltd High speed iterative decoder
US7345612B2 (en) * 2006-02-07 2008-03-18 Nokia Corporation Digital-to-radio frequency conversion device, chip set, transmitter, user terminal and data processing method
US10608661B1 (en) * 2019-03-29 2020-03-31 Intel Corporation Digital-to-analog converter
WO2021078367A1 (en) * 2019-10-22 2021-04-29 Huawei Technologies Co., Ltd. High speed digital to analogue converter

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56153832A (en) * 1980-04-30 1981-11-28 Nec Corp Digital to analog converter
US5276716A (en) * 1990-02-15 1994-01-04 Advanced Micro Devices Inc. Bi-phase decoder phase-lock loop in CMOS
US5148164A (en) * 1990-04-23 1992-09-15 Mitsubishi Denki Kabushiki Kaisha Current generating device for complementarily generating two currents of different magnitudes in response to one-bit data
US5254994A (en) * 1991-03-06 1993-10-19 Kabushiki Kaisha Toshiba Current source cell use in current segment type D and A converter
KR930009432B1 (ko) * 1991-12-31 1993-10-04 현대전자산업 주식회사 디지탈/아나로그 변환기용 전류소자
US5357145A (en) * 1992-12-22 1994-10-18 National Semiconductor Corporation Integrated waveshaping circuit using weighted current summing
US5446457A (en) * 1994-02-16 1995-08-29 Sgs-Thomson Microelectronics, Inc. Current-summing digital-to-analog converter with binarily weighted current sources

Also Published As

Publication number Publication date
EP0834220B1 (de) 1998-12-30
WO1996041421A1 (en) 1996-12-19
EP0834220A1 (de) 1998-04-08
DE69601268T2 (de) 1999-08-12
US5600321A (en) 1997-02-04
TW295750B (de) 1997-01-11
JPH11506286A (ja) 1999-06-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee