DE69528958D1 - Monolitische Ausgangsstufe mit Eigenbeschirmung gegen Latch-up-Phänomene - Google Patents
Monolitische Ausgangsstufe mit Eigenbeschirmung gegen Latch-up-PhänomeneInfo
- Publication number
- DE69528958D1 DE69528958D1 DE69528958T DE69528958T DE69528958D1 DE 69528958 D1 DE69528958 D1 DE 69528958D1 DE 69528958 T DE69528958 T DE 69528958T DE 69528958 T DE69528958 T DE 69528958T DE 69528958 D1 DE69528958 D1 DE 69528958D1
- Authority
- DE
- Germany
- Prior art keywords
- phenomena
- self
- output stage
- shielding against
- against latch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
- H01L27/0647—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
- H01L27/0652—Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
- H01L27/0664—Vertical bipolar transistor in combination with diodes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP95830024A EP0725442B1 (de) | 1995-01-31 | 1995-01-31 | Monolitische Ausgangsstufe mit Eigenbeschirmung gegen Latch-up-Phänomene |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69528958D1 true DE69528958D1 (de) | 2003-01-09 |
DE69528958T2 DE69528958T2 (de) | 2003-09-11 |
Family
ID=8221848
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69528958T Expired - Fee Related DE69528958T2 (de) | 1995-01-31 | 1995-01-31 | Monolitische Ausgangsstufe mit Eigenbeschirmung gegen Latch-up-Phänomene |
Country Status (4)
Country | Link |
---|---|
US (1) | US5942783A (de) |
EP (1) | EP0725442B1 (de) |
JP (1) | JPH08241928A (de) |
DE (1) | DE69528958T2 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6225181B1 (en) | 1999-04-19 | 2001-05-01 | National Semiconductor Corp. | Trench isolated bipolar transistor structure integrated with CMOS technology |
EP1130648A1 (de) * | 2000-02-29 | 2001-09-05 | STMicroelectronics S.r.l. | Verfahren und Bauelement zur Begrenzung des Substratpotentials in pn-übergangsisolierten integrierten Schaltkreisen |
DE10202479A1 (de) | 2002-01-23 | 2003-08-07 | Infineon Technologies Ag | Integrierte Schaltungsanordnung mit einer Struktur zur Verringerung eines Minoritätsladungsträgerstromes |
US10553633B2 (en) * | 2014-05-30 | 2020-02-04 | Klaus Y.J. Hsu | Phototransistor with body-strapped base |
AR116929A1 (es) | 2019-10-31 | 2021-06-30 | Invap S E | Método para actualizar el umbral de referencia de al menos un parámetro operativo, unidad de protección para la mitigación de un evento simple de latchup (sel) en un dispositivo electrónico usando el umbral de referencia y disposición para la mitigación de un evento simple de latchup (sel) en un conjunto |
CN115602560A (zh) * | 2021-07-08 | 2023-01-13 | 长鑫存储技术有限公司(Cn) | 一种闩锁结构的识别方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5649560A (en) * | 1979-09-28 | 1981-05-06 | Hitachi Ltd | Semiconductor ic device |
IT1197279B (it) * | 1986-09-25 | 1988-11-30 | Sgs Microelettronica Spa | Dispositivo integrato per schermare l'iniezione di cariche nel substrato, in particolare in circuiti di pilotaggio di carichi induttivi e/o capacitivi |
JPS63164457A (ja) * | 1986-12-26 | 1988-07-07 | Matsushita Electronics Corp | 半導体集積回路 |
DE3821644A1 (de) * | 1987-12-23 | 1989-12-28 | Siemens Ag | Integrierte schaltung mit "latch-up"-schutzschaltung in komplementaerer mos-schaltungstechnik |
US4979001A (en) * | 1989-06-30 | 1990-12-18 | Micrel Incorporated | Hidden zener diode structure in configurable integrated circuit |
IT1239497B (it) * | 1990-03-29 | 1993-11-03 | Sgs Thomson Microelectronics | Disposizione circuitale per prevenire fenomeni di innesto in transistori pnp verticali con collettore isolato |
JPH08504297A (ja) * | 1992-03-10 | 1996-05-07 | アナログ・ディバイセス・インコーポレーテッド | 集積回路保護バイアシングのための回路構造 |
-
1995
- 1995-01-31 EP EP95830024A patent/EP0725442B1/de not_active Expired - Lifetime
- 1995-01-31 DE DE69528958T patent/DE69528958T2/de not_active Expired - Fee Related
-
1996
- 1996-01-31 JP JP8016104A patent/JPH08241928A/ja active Pending
- 1996-01-31 US US08/594,805 patent/US5942783A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0725442A1 (de) | 1996-08-07 |
EP0725442B1 (de) | 2002-11-27 |
US5942783A (en) | 1999-08-24 |
JPH08241928A (ja) | 1996-09-17 |
DE69528958T2 (de) | 2003-09-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |