DE69510077D1 - Schaltungen, systeme und verfahren zur verbesserung des seitenzugriffs und der blockübertragungen in einem speichersystem - Google Patents

Schaltungen, systeme und verfahren zur verbesserung des seitenzugriffs und der blockübertragungen in einem speichersystem

Info

Publication number
DE69510077D1
DE69510077D1 DE69510077T DE69510077T DE69510077D1 DE 69510077 D1 DE69510077 D1 DE 69510077D1 DE 69510077 T DE69510077 T DE 69510077T DE 69510077 T DE69510077 T DE 69510077T DE 69510077 D1 DE69510077 D1 DE 69510077D1
Authority
DE
Germany
Prior art keywords
circuitry
circuits
systems
methods
storage system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69510077T
Other languages
English (en)
Other versions
DE69510077T2 (de
Inventor
Michael Runas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intellectual Ventures II LLC
Original Assignee
Cirrus Logic Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=23226718&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69510077(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Cirrus Logic Inc filed Critical Cirrus Logic Inc
Publication of DE69510077D1 publication Critical patent/DE69510077D1/de
Application granted granted Critical
Publication of DE69510077T2 publication Critical patent/DE69510077T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • G11C7/1021Page serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled column address stroke pulses each with its associated bit line address
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1039Read-write modes for single port memories, i.e. having either a random port or a serial port using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers

Landscapes

  • Dram (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Mobile Radio Communication Systems (AREA)
DE69510077T 1994-09-30 1995-09-29 Schaltungen, systeme und verfahren zur verbesserung des seitenzugriffs und der blockübertragungen in einem speichersystem Expired - Lifetime DE69510077T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/315,934 US5500819A (en) 1994-09-30 1994-09-30 Circuits, systems and methods for improving page accesses and block transfers in a memory system
PCT/US1995/012903 WO1996010826A1 (en) 1994-09-30 1995-09-29 Circuits, systems and methods for improving page accesses and block transfers in a memory system

Publications (2)

Publication Number Publication Date
DE69510077D1 true DE69510077D1 (de) 1999-07-08
DE69510077T2 DE69510077T2 (de) 1999-10-28

Family

ID=23226718

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69510077T Expired - Lifetime DE69510077T2 (de) 1994-09-30 1995-09-29 Schaltungen, systeme und verfahren zur verbesserung des seitenzugriffs und der blockübertragungen in einem speichersystem

Country Status (7)

Country Link
US (1) US5500819A (de)
EP (1) EP0784851B1 (de)
JP (1) JPH10509546A (de)
KR (1) KR970706577A (de)
AT (1) ATE180916T1 (de)
DE (1) DE69510077T2 (de)
WO (1) WO1996010826A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0804785A2 (de) * 1994-12-06 1997-11-05 Cirrus Logic, Inc. Schaltungen, systeme und verfahren zur anzeigesteuerung von datenblöcken auf einem bildschirm
US5701143A (en) * 1995-01-31 1997-12-23 Cirrus Logic, Inc. Circuits, systems and methods for improving row select speed in a row select memory device
EP0734011A3 (de) * 1995-03-21 1999-01-20 Sun Microsystems, Inc. Feldsynchronisation von unabhängigen Bildspeichern
US5901086A (en) * 1996-12-26 1999-05-04 Motorola, Inc. Pipelined fast-access floating gate memory architecture and method of operation
KR100247064B1 (ko) * 1997-04-10 2000-03-15 윤종용 콤팩트디스크-롬 드라이브의 디코딩장치에서 에러정정을 위한 메모리 리드회로
JPH1145594A (ja) * 1997-07-30 1999-02-16 Nec Ic Microcomput Syst Ltd 半導体記憶装置
DE60017704D1 (de) * 2000-02-29 2005-03-03 St Microelectronics Srl Spaltedekodierer für das Lesen von Seiten in einem Halbleiterspeicher

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58159184A (ja) 1982-03-17 1983-09-21 Nec Corp 画像回転装置
US4577293A (en) 1984-06-01 1986-03-18 International Business Machines Corporation Distributed, on-chip cache
EP0388175B1 (de) * 1989-03-15 1995-11-02 Matsushita Electronics Corporation Halbleiter-Speichereinrichtung
US5278790A (en) * 1989-05-15 1994-01-11 Casio Computer Co., Ltd. Memory device comprising thin film memory transistors
JP2696026B2 (ja) * 1991-11-21 1998-01-14 株式会社東芝 半導体記憶装置

Also Published As

Publication number Publication date
EP0784851B1 (de) 1999-06-02
KR970706577A (ko) 1997-11-03
ATE180916T1 (de) 1999-06-15
EP0784851A1 (de) 1997-07-23
US5500819A (en) 1996-03-19
WO1996010826A1 (en) 1996-04-11
DE69510077T2 (de) 1999-10-28
JPH10509546A (ja) 1998-09-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: HUAI TECHNOLOGIES, LLC, WILLMINGTON, DEL., US

8327 Change in the person/name/address of the patent owner

Owner name: INTELLECTUAL VENTURES LL LLC, ( N. D. GES. D. , US