DE69425600T2 - System und Verfahren zur Erkennung und Korrektur von Speicherfehlern - Google Patents

System und Verfahren zur Erkennung und Korrektur von Speicherfehlern

Info

Publication number
DE69425600T2
DE69425600T2 DE69425600T DE69425600T DE69425600T2 DE 69425600 T2 DE69425600 T2 DE 69425600T2 DE 69425600 T DE69425600 T DE 69425600T DE 69425600 T DE69425600 T DE 69425600T DE 69425600 T2 DE69425600 T2 DE 69425600T2
Authority
DE
Germany
Prior art keywords
detecting
memory errors
correcting memory
correcting
errors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69425600T
Other languages
English (en)
Other versions
DE69425600D1 (de
Inventor
Ralph E Snowden
Douglas R Kraft
Gruender, Jr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of DE69425600D1 publication Critical patent/DE69425600D1/de
Application granted granted Critical
Publication of DE69425600T2 publication Critical patent/DE69425600T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/106—Correcting systematically all correctable errors, i.e. scrubbing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Detection And Correction Of Errors (AREA)
DE69425600T 1993-03-05 1994-02-24 System und Verfahren zur Erkennung und Korrektur von Speicherfehlern Expired - Fee Related DE69425600T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/026,668 US5495491A (en) 1993-03-05 1993-03-05 System using a memory controller controlling an error correction means to detect and correct memory errors when and over a time interval indicated by registers in the memory controller

Publications (2)

Publication Number Publication Date
DE69425600D1 DE69425600D1 (de) 2000-09-28
DE69425600T2 true DE69425600T2 (de) 2001-04-26

Family

ID=21833162

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69425600T Expired - Fee Related DE69425600T2 (de) 1993-03-05 1994-02-24 System und Verfahren zur Erkennung und Korrektur von Speicherfehlern

Country Status (4)

Country Link
US (1) US5495491A (de)
EP (1) EP0614142B1 (de)
JP (1) JPH06290115A (de)
DE (1) DE69425600T2 (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6279128B1 (en) * 1994-12-29 2001-08-21 International Business Machines Corporation Autonomous system for recognition of patterns formed by stored data during computer memory scrubbing
US5793943A (en) * 1996-07-29 1998-08-11 Micron Electronics, Inc. System for a primary BIOS ROM recovery in a dual BIOS ROM computer system
US6292869B1 (en) 1998-08-31 2001-09-18 International Business Machines Corporation System and method for memory scrub during self timed refresh
US6480982B1 (en) * 1999-06-04 2002-11-12 International Business Machines Corporation Computer RAM memory system with enhanced scrubbing and sparing
US6560725B1 (en) * 1999-06-18 2003-05-06 Madrone Solutions, Inc. Method for apparatus for tracking errors in a memory system
US6510528B1 (en) * 1999-12-14 2003-01-21 International Business Machines Corporation Method for improving personal computer reliability for systems that use certain power saving schemes
US6832340B2 (en) * 2000-01-26 2004-12-14 Hewlett-Packard Development Company, L.P. Real-time hardware memory scrubbing
US6701480B1 (en) * 2000-03-08 2004-03-02 Rockwell Automation Technologies, Inc. System and method for providing error check and correction in memory systems
AT409562B (de) * 2001-03-16 2002-09-25 Thaller Karl Dipl Ing Verfahren und einrichtung zum testen eines speichers
US6851070B1 (en) * 2001-08-13 2005-02-01 Network Appliance, Inc. System and method for managing time-limited long-running operations in a data storage system
US7310757B2 (en) * 2001-10-11 2007-12-18 Altera Corporation Error detection on programmable logic resources
DE10223914A1 (de) * 2002-05-29 2003-12-11 Bayer Cropscience Ag Substituierte Phenyluracile
US7184916B2 (en) * 2003-05-20 2007-02-27 Cray Inc. Apparatus and method for testing memory cards
US7320100B2 (en) * 2003-05-20 2008-01-15 Cray Inc. Apparatus and method for memory with bit swapping on the fly and testing
US8176250B2 (en) * 2003-08-29 2012-05-08 Hewlett-Packard Development Company, L.P. System and method for testing a memory
US7346755B2 (en) * 2003-09-16 2008-03-18 Hewlett-Packard Development, L.P. Memory quality assurance
US7328377B1 (en) 2004-01-27 2008-02-05 Altera Corporation Error correction for programmable logic integrated circuits
US7257686B2 (en) * 2004-06-03 2007-08-14 International Business Machines Corporation Memory controller and method for scrubbing memory without using explicit atomic operations
US20070022244A1 (en) * 2005-07-25 2007-01-25 Honeywell International Inc. Methods and systems for refresh and error scrubbing of dynamic memory devices
US7698591B2 (en) * 2005-08-26 2010-04-13 International Business Machines Corporation Method and apparatus for ensuring data integrity in redundant mass storage systems
US20070168754A1 (en) * 2005-12-19 2007-07-19 Xiv Ltd. Method and apparatus for ensuring writing integrity in mass storage systems
US7493523B2 (en) * 2006-03-14 2009-02-17 International Business Machines Corporation Method and apparatus for preventing soft error accumulation in register arrays
GB2439968B (en) * 2006-07-07 2011-05-25 Advanced Risc Mach Ltd Memory testing
RU2450331C1 (ru) * 2011-04-05 2012-05-10 Межрегиональное общественное учреждение "Институт инженерной физики" Устройство хранения и передачи данных с исправлением одиночных ошибок в байте информации и обнаружением произвольных ошибок в байтах информации
US8990646B2 (en) 2012-05-31 2015-03-24 Hewlett-Packard Development Company, L.P. Memory error test routine
EP2738771A1 (de) * 2012-12-03 2014-06-04 Kone Corporation Vorrichtung und Verfahren zum Prüfen eines Speichers durch eine programmierbare Schaltung in einem sicherheitskritischen System
US9495242B2 (en) 2014-07-30 2016-11-15 International Business Machines Corporation Adaptive error correction in a memory system
US10049006B2 (en) 2015-12-08 2018-08-14 Nvidia Corporation Controller-based memory scrub for DRAMs with internal error-correcting code (ECC) bits contemporaneously during auto refresh or by using masked write commands
US9823964B2 (en) 2015-12-08 2017-11-21 Nvidia Corporation Method for memory scrub of DRAM with internal error correcting code (ECC) bits during either memory activate and/or precharge operation
US9880900B2 (en) 2015-12-08 2018-01-30 Nvidia Corporation Method for scrubbing and correcting DRAM memory data with internal error-correcting code (ECC) bits contemporaneously during self-refresh state
KR20180081282A (ko) * 2017-01-06 2018-07-16 에스케이하이닉스 주식회사 반도체장치
CN107195329B (zh) * 2017-05-17 2024-04-02 西安紫光国芯半导体有限公司 在读操作时纠正dram中存储阵列的错误的方法以及dram

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3735105A (en) * 1971-06-11 1973-05-22 Ibm Error correcting system and method for monolithic memories
US4506362A (en) * 1978-12-22 1985-03-19 Gould Inc. Systematic memory error detection and correction apparatus and method
US4371930A (en) * 1980-06-03 1983-02-01 Burroughs Corporation Apparatus for detecting, correcting and logging single bit memory read errors
US4369510A (en) * 1980-07-25 1983-01-18 Honeywell Information Systems Inc. Soft error rewrite control system
JPS5758210A (en) * 1980-09-26 1982-04-07 Hitachi Ltd Error correction range controlling circuit
US4493081A (en) * 1981-06-26 1985-01-08 Computer Automation, Inc. Dynamic memory with error correction on refresh
GB2107496B (en) * 1981-09-30 1985-11-20 Hitachi Ltd Error flag processor
US4535455A (en) * 1983-03-11 1985-08-13 At&T Bell Laboratories Correction and monitoring of transient errors in a memory system
US4542454A (en) * 1983-03-30 1985-09-17 Advanced Micro Devices, Inc. Apparatus for controlling access to a memory
US4625301A (en) * 1983-11-30 1986-11-25 Tandy Corporation Dynamic memory refresh circuit
JPH0787034B2 (ja) * 1984-05-07 1995-09-20 株式会社日立製作所 半導体集積回路装置
JPS6432489A (en) * 1987-07-27 1989-02-02 Matsushita Electronics Corp Memory device
US4964129A (en) * 1988-12-21 1990-10-16 Bull Hn Information Systems Inc. Memory controller with error logging
US5077737A (en) * 1989-08-18 1991-12-31 Micron Technology, Inc. Method and apparatus for storing digital data in off-specification dynamic random access memory devices

Also Published As

Publication number Publication date
US5495491A (en) 1996-02-27
EP0614142B1 (de) 2000-08-23
JPH06290115A (ja) 1994-10-18
EP0614142A2 (de) 1994-09-07
EP0614142A3 (en) 1997-01-08
DE69425600D1 (de) 2000-09-28

Similar Documents

Publication Publication Date Title
DE69425600D1 (de) System und Verfahren zur Erkennung und Korrektur von Speicherfehlern
DE69624543D1 (de) System und Verfahren zur Erkennung von Netzwerkfehlern
DE69031099D1 (de) Verfahren und Vorrichtung zur Erkennung und Korrektur von Rechtschreibfehlern
DE69031294D1 (de) Einrichtung und Verfahren zur Fehlererkennung und Fehlerkorrektur
DE69722648D1 (de) System und verfahren zur pumpenkontrolle und fehlererkennung
DE69428412T2 (de) Verfahren und System zur Benutzung von Datenspeicherbogen
DE69318734D1 (de) System und verfahren zur injektion von zellulose
DE69309550D1 (de) Verfahren und Gerät zur Fehlerkorrektur bei der Farbenübereinandersetzung
DE69629444D1 (de) Datenverarbeitungsgerät und Verfahren zur Ersetzung von ausgefallenen Speichereinheiten
DE69422176D1 (de) Verfahren und system zur verfolgung von verbindungen zwischen objekten
DE69424744D1 (de) Verfahren und System zur Verwaltung von Komponentenverbindungen
DE59306790D1 (de) Verfahren zur Überprüfung von Lambdasonden
DE69626977D1 (de) Gerät und verfahren zur kalibration von vielfachbehältern
DE4403348B8 (de) Verfahren zur Detektion von Fehlzündungen
DE69529052T2 (de) System zur erfassung von fehlzündungen und verfahren mit verbesserter signaltreue
DE69428948D1 (de) Verfahren und System zur Berechnung von Bestellungsmengen
DE69218934T2 (de) System zur entdeckung und korrektion von frequenzfehlern
DE69630686D1 (de) Verfahren zur echtheitsprüfung von münzen
DE69707498T2 (de) Verfahren zur bearbeitung von datenintegritätsfehlern bei wiederbeschreibaren speichern
DE69309889D1 (de) Verfahren zur erkennung von fehlzündungen
DE69831397D1 (de) Verfahren zur kodierung von informationen sowie vorrichtungen mit fehlerkorrektur und fehlerdetektion
DE69723574D1 (de) Verfahren zur detektion von mutationen
DE69810647D1 (de) Verfahren zur korrektur von widerstandsvermessungsdaten
DE59002145D1 (de) Verfahren zur elektronischen korrektur von positionsfehlern bei einem inkrementalen messsystem und messsystem zur durchfuehrung des verfahrens.
DE69322213D1 (de) Vorrichtung und Verfahren zur Kompensation von Positionierfehlern

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee