DE69421993D1 - Völlig anpassungsfähige Speicheranordnung - Google Patents

Völlig anpassungsfähige Speicheranordnung

Info

Publication number
DE69421993D1
DE69421993D1 DE69421993T DE69421993T DE69421993D1 DE 69421993 D1 DE69421993 D1 DE 69421993D1 DE 69421993 T DE69421993 T DE 69421993T DE 69421993 T DE69421993 T DE 69421993T DE 69421993 D1 DE69421993 D1 DE 69421993D1
Authority
DE
Germany
Prior art keywords
storage arrangement
fully adaptable
adaptable storage
fully
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69421993T
Other languages
English (en)
Other versions
DE69421993T2 (de
Inventor
Alexander G Dickinson
Christopher John Nicol
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Application granted granted Critical
Publication of DE69421993D1 publication Critical patent/DE69421993D1/de
Publication of DE69421993T2 publication Critical patent/DE69421993T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
DE69421993T 1993-10-04 1994-09-21 Völlig anpassungsfähige Speicheranordnung Expired - Lifetime DE69421993T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/132,068 US5355345A (en) 1993-10-04 1993-10-04 Fully scalable memory apparatus

Publications (2)

Publication Number Publication Date
DE69421993D1 true DE69421993D1 (de) 2000-01-13
DE69421993T2 DE69421993T2 (de) 2000-07-13

Family

ID=22452311

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69421993T Expired - Lifetime DE69421993T2 (de) 1993-10-04 1994-09-21 Völlig anpassungsfähige Speicheranordnung

Country Status (5)

Country Link
US (1) US5355345A (de)
EP (1) EP0646925B1 (de)
JP (1) JP3320922B2 (de)
CA (1) CA2127947C (de)
DE (1) DE69421993T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5537631A (en) * 1994-03-21 1996-07-16 Current Logic Systems, Inc. Memory management technique for defective memory
US6230245B1 (en) 1997-02-11 2001-05-08 Micron Technology, Inc. Method and apparatus for generating a variable sequence of memory device command signals
US6175894B1 (en) 1997-03-05 2001-01-16 Micron Technology, Inc. Memory device command buffer apparatus and method and memory devices and computer systems using same
US5996043A (en) 1997-06-13 1999-11-30 Micron Technology, Inc. Two step memory device command buffer apparatus and method and memory devices and computer systems using same
US6484244B1 (en) 1997-06-17 2002-11-19 Micron Technology, Inc. Method and system for storing and processing multiple memory commands
US6202119B1 (en) 1997-12-19 2001-03-13 Micron Technology, Inc. Method and system for processing pipelined memory commands
US6175905B1 (en) 1998-07-30 2001-01-16 Micron Technology, Inc. Method and system for bypassing pipelines in a pipelined memory command generator
US6178488B1 (en) 1998-08-27 2001-01-23 Micron Technology, Inc. Method and apparatus for processing pipelined memory commands
KR100634384B1 (ko) * 2004-07-16 2006-10-16 삼성전자주식회사 액세스 데이터를 저장하는 회로를 구비한 반도체 메모리 장치
US8543768B2 (en) 2008-11-13 2013-09-24 International Business Machines Corporation Memory system including a spiral cache
US8527726B2 (en) 2008-11-13 2013-09-03 International Business Machines Corporation Tiled storage array with systolic move-to-front reorganization
US8689027B2 (en) * 2008-11-13 2014-04-01 International Business Machines Corporation Tiled memory power management
US8015357B2 (en) * 2008-11-13 2011-09-06 International Business Machines Corporation Storage array tile supporting systolic movement operations
US8271728B2 (en) * 2008-11-13 2012-09-18 International Business Machines Corporation Spiral cache power management, adaptive sizing and interface operations
US8539185B2 (en) * 2008-11-13 2013-09-17 International Business Machines Corporation Systolic networks for a spiral cache
US8060699B2 (en) * 2008-11-13 2011-11-15 International Business Machines Corporation Spiral cache memory and method of operating a spiral cache
US8370579B2 (en) 2009-12-17 2013-02-05 International Business Machines Corporation Global instructions for spiral cache management

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5093809A (en) * 1989-04-21 1992-03-03 Siemens Aktiengesellschaft Static memory having pipeline registers
US5199033A (en) * 1990-05-10 1993-03-30 Quantum Corporation Solid state memory array using address block bit substitution to compensate for non-functional storage cells
EP0471932B1 (de) * 1990-07-27 1997-01-22 International Business Machines Corporation Virtueller Multiport-RAM-Speicher
JPH06168177A (ja) * 1992-11-30 1994-06-14 Nec Corp パイプラインメモリ装置

Also Published As

Publication number Publication date
EP0646925A2 (de) 1995-04-05
JP3320922B2 (ja) 2002-09-03
EP0646925B1 (de) 1999-12-08
CA2127947A1 (en) 1995-04-05
EP0646925A3 (de) 1995-09-06
JPH07175712A (ja) 1995-07-14
DE69421993T2 (de) 2000-07-13
CA2127947C (en) 1999-05-18
US5355345A (en) 1994-10-11

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Legal Events

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