DE69408769D1 - Fliessbandsteuerung und Registerübersetzung in Mikroprozessor - Google Patents
Fliessbandsteuerung und Registerübersetzung in MikroprozessorInfo
- Publication number
- DE69408769D1 DE69408769D1 DE69408769T DE69408769T DE69408769D1 DE 69408769 D1 DE69408769 D1 DE 69408769D1 DE 69408769 T DE69408769 T DE 69408769T DE 69408769 T DE69408769 T DE 69408769T DE 69408769 D1 DE69408769 D1 DE 69408769D1
- Authority
- DE
- Germany
- Prior art keywords
- microprocessor
- assembly line
- line control
- register translation
- translation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
- G06F9/3871—Asynchronous instruction pipeline, e.g. using handshake signals between stages
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/226—Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/383—Operand prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3856—Reordering of instructions, e.g. using queues or age tags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
- G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
- G06F9/3873—Variable length pipelines, e.g. elastic pipeline
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
- G06F9/3875—Pipelining a single stage, e.g. superpipelining
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
Applications Claiming Priority (12)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13827893A | 1993-10-18 | 1993-10-18 | |
US13865593A | 1993-10-18 | 1993-10-18 | |
US13857293A | 1993-10-18 | 1993-10-18 | |
US13890193A | 1993-10-18 | 1993-10-18 | |
US13890293A | 1993-10-18 | 1993-10-18 | |
US13828093A | 1993-10-18 | 1993-10-18 | |
US13878993A | 1993-10-18 | 1993-10-18 | |
US13827293A | 1993-10-18 | 1993-10-18 | |
US13959793A | 1993-10-18 | 1993-10-18 | |
US13828193A | 1993-10-18 | 1993-10-18 | |
US13857393A | 1993-10-18 | 1993-10-18 | |
US13857493A | 1993-10-18 | 1993-10-18 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69408769D1 true DE69408769D1 (de) | 1998-04-09 |
DE69408769T2 DE69408769T2 (de) | 1998-07-09 |
Family
ID=27583764
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69408769T Expired - Fee Related DE69408769T2 (de) | 1993-10-18 | 1994-10-17 | Fliessbandsteuerung und Registerübersetzung in Mikroprozessor |
Country Status (3)
Country | Link |
---|---|
EP (2) | EP0779577B1 (de) |
JP (1) | JP3678444B2 (de) |
DE (1) | DE69408769T2 (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW353732B (en) * | 1994-03-31 | 1999-03-01 | Ibm | Processing system and method of operation |
US6643765B1 (en) | 1995-08-16 | 2003-11-04 | Microunity Systems Engineering, Inc. | Programmable processor with group floating point operations |
US5742840A (en) | 1995-08-16 | 1998-04-21 | Microunity Systems Engineering, Inc. | General purpose, multiple precision parallel operation, programmable media processor |
US7301541B2 (en) | 1995-08-16 | 2007-11-27 | Microunity Systems Engineering, Inc. | Programmable processor and method with wide operations |
US5649138A (en) * | 1996-01-04 | 1997-07-15 | Advanced Micro Devices | Time dependent rerouting of instructions in plurality of reservation stations of a superscalar microprocessor |
US5802338A (en) * | 1996-10-01 | 1998-09-01 | International Business Machines Corporation | Method of self-parallelizing and self-parallelizing multiprocessor using the method |
US5872949A (en) * | 1996-11-13 | 1999-02-16 | International Business Machines Corp. | Apparatus and method for managing data flow dependencies arising from out-of-order execution, by an execution unit, of an instruction series input from an instruction source |
US5870578A (en) * | 1997-12-09 | 1999-02-09 | Advanced Micro Devices, Inc. | Workload balancing in a microprocessor for reduced instruction dispatch stalling |
US6216222B1 (en) * | 1998-05-14 | 2001-04-10 | Arm Limited | Handling exceptions in a pipelined data processing apparatus |
EP1004959B1 (de) | 1998-10-06 | 2018-08-08 | Texas Instruments Incorporated | Prozessor mit Pipelineschutz |
EP0992896A1 (de) * | 1998-10-06 | 2000-04-12 | Texas Instruments Inc. | Pipeline Beschützung |
US6862563B1 (en) | 1998-10-14 | 2005-03-01 | Arc International | Method and apparatus for managing the configuration and functionality of a semiconductor design |
US7117342B2 (en) | 1998-12-03 | 2006-10-03 | Sun Microsystems, Inc. | Implicitly derived register specifiers in a processor |
US6279100B1 (en) * | 1998-12-03 | 2001-08-21 | Sun Microsystems, Inc. | Local stall control method and structure in a microprocessor |
US7114056B2 (en) | 1998-12-03 | 2006-09-26 | Sun Microsystems, Inc. | Local and global register partitioning in a VLIW processor |
AU4848700A (en) * | 1999-05-13 | 2000-12-05 | Arc International U.S. Holdings Inc. | Method and apparatus for processor pipeline segmentation and re-assembly |
US6587940B1 (en) * | 2000-01-18 | 2003-07-01 | Hewlett-Packard Development Company | Local stall/hazard detect in superscalar, pipelined microprocessor to avoid re-read of register file |
US6988154B2 (en) | 2000-03-10 | 2006-01-17 | Arc International | Memory interface and method of interfacing between functional entities |
JP2003536132A (ja) * | 2000-06-02 | 2003-12-02 | サン・マイクロシステムズ・インコーポレイテッド | Vliwプロセッサでの部分的パイプライン式命令の同期 |
EP1205840B1 (de) | 2000-11-08 | 2010-07-14 | Altera Corporation | Haltsteuerung in einem Prozessor mit mehreren Pipelines |
US7000095B2 (en) | 2002-09-06 | 2006-02-14 | Mips Technologies, Inc. | Method and apparatus for clearing hazards using jump instructions |
US7124318B2 (en) | 2003-09-18 | 2006-10-17 | International Business Machines Corporation | Multiple parallel pipeline processor having self-repairing capability |
US20060095732A1 (en) * | 2004-08-30 | 2006-05-04 | Tran Thang M | Processes, circuits, devices, and systems for scoreboard and other processor improvements |
US7571304B2 (en) | 2005-03-18 | 2009-08-04 | Sun Microsystems, Inc. | Generation of multiple checkpoints in a processor that supports speculative execution |
US7634641B2 (en) | 2005-03-18 | 2009-12-15 | Sun Microsystems, Inc. | Method and apparatus for using multiple threads to spectulatively execute instructions |
US8417922B2 (en) * | 2006-08-02 | 2013-04-09 | Qualcomm Incorporated | Method and system to combine multiple register units within a microprocessor |
US8127113B1 (en) | 2006-12-01 | 2012-02-28 | Synopsys, Inc. | Generating hardware accelerators and processor offloads |
JP5598114B2 (ja) * | 2010-06-22 | 2014-10-01 | 富士通株式会社 | 演算ユニット |
US9448800B2 (en) * | 2013-03-14 | 2016-09-20 | Samsung Electronics Co., Ltd. | Reorder-buffer-based static checkpointing for rename table rebuilding |
CN110187883B (zh) * | 2019-05-17 | 2022-12-06 | 湖南科技大学 | 一种面向指令目标操作数的寄存器对分配方法及存储介质 |
US11204770B2 (en) * | 2020-04-01 | 2021-12-21 | Andes Technology Corporation | Microprocessor having self-resetting register scoreboard |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0762823B2 (ja) | 1985-05-22 | 1995-07-05 | 株式会社日立製作所 | デ−タ処理装置 |
US4752973A (en) * | 1986-05-05 | 1988-06-28 | Wolfberg Larry B | Glove |
US4992938A (en) * | 1987-07-01 | 1991-02-12 | International Business Machines Corporation | Instruction control mechanism for a computing system with register renaming, map table and queues indicating available registers |
US4901233A (en) * | 1987-07-20 | 1990-02-13 | International Business Machines Corporation | Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries |
US5019967A (en) * | 1988-07-20 | 1991-05-28 | Digital Equipment Corporation | Pipeline bubble compression in a computer system |
US5150469A (en) * | 1988-12-12 | 1992-09-22 | Digital Equipment Corporation | System and method for processor pipeline control by selective signal deassertion |
US5226126A (en) * | 1989-02-24 | 1993-07-06 | Nexgen Microsystems | Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags |
CA2016068C (en) * | 1989-05-24 | 2000-04-04 | Robert W. Horst | Multiple instruction issue computer architecture |
EP0420457B1 (de) * | 1989-09-25 | 1998-05-06 | Matsushita Electric Industrial Co., Ltd. | Rechner mit Pipeline-Struktur |
EP0514763A3 (en) * | 1991-05-20 | 1993-08-25 | Motorola, Inc. | A data processor having a logical register content-addressable memory |
US5363495A (en) * | 1991-08-26 | 1994-11-08 | International Business Machines Corporation | Data processing system with multiple execution units capable of executing instructions out of sequence |
GB2263565B (en) * | 1992-01-23 | 1995-08-30 | Intel Corp | Microprocessor with apparatus for parallel execution of instructions |
DE69311330T2 (de) * | 1992-03-31 | 1997-09-25 | Seiko Epson Corp., Tokio/Tokyo | Befehlsablauffolgeplanung von einem risc-superskalarprozessor |
DE69425311T2 (de) | 1993-10-18 | 2001-03-15 | National Semiconductor Corp.(N.D.Ges.D.Staates Delaware), Santa Clara | Mikroprozessor mit spekulativer Befehlsausführung |
DE69425310T2 (de) | 1993-10-18 | 2001-06-13 | Via-Cyrix, Inc. | Mikrosteuereinheit für einen superpipeline-superskalaren Mikroprozessor |
DE69429612T2 (de) | 1993-10-18 | 2002-09-12 | Via-Cyrix, Inc. | Schreibpuffer für einen superskalaren Mikroprozessor mit Pipeline |
EP0649084A1 (de) | 1993-10-18 | 1995-04-19 | Cyrix Corporation | Verzweigungsverarbeitung in Mikroprozessor |
-
1994
- 1994-10-17 EP EP97200512A patent/EP0779577B1/de not_active Expired - Lifetime
- 1994-10-17 EP EP94307583A patent/EP0649085B1/de not_active Expired - Lifetime
- 1994-10-17 DE DE69408769T patent/DE69408769T2/de not_active Expired - Fee Related
- 1994-10-18 JP JP25199094A patent/JP3678444B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH07152559A (ja) | 1995-06-16 |
JP3678444B2 (ja) | 2005-08-03 |
EP0779577A2 (de) | 1997-06-18 |
EP0649085B1 (de) | 1998-03-04 |
EP0649085A1 (de) | 1995-04-19 |
DE69408769T2 (de) | 1998-07-09 |
EP0779577B1 (de) | 2002-05-22 |
EP0779577A3 (de) | 1997-09-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: VIA-CYRIX CORP., RICHARDSON, TEX., US |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: VIA-CYRIX, INC., RICHARDSON, TEX., US |
|
8339 | Ceased/non-payment of the annual fee |