DE69325786T2 - Prozessor für gleichförmige Operationen auf Datenreihenfolgen in entsprechenden parallelen Datenströmen - Google Patents

Prozessor für gleichförmige Operationen auf Datenreihenfolgen in entsprechenden parallelen Datenströmen

Info

Publication number
DE69325786T2
DE69325786T2 DE69325786T DE69325786T DE69325786T2 DE 69325786 T2 DE69325786 T2 DE 69325786T2 DE 69325786 T DE69325786 T DE 69325786T DE 69325786 T DE69325786 T DE 69325786T DE 69325786 T2 DE69325786 T2 DE 69325786T2
Authority
DE
Germany
Prior art keywords
processor
corresponding parallel
orders
data
data streams
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69325786T
Other languages
English (en)
Other versions
DE69325786D1 (de
Inventor
Willem Leendert Repko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Application granted granted Critical
Publication of DE69325786D1 publication Critical patent/DE69325786D1/de
Publication of DE69325786T2 publication Critical patent/DE69325786T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053Vector processors
    • G06F15/8076Details on data register access
    • G06F15/8084Special arrangements thereof, e.g. mask or switch
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Complex Calculations (AREA)
  • Stereo-Broadcasting Methods (AREA)
  • Stereophonic System (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
DE69325786T 1992-12-04 1993-11-26 Prozessor für gleichförmige Operationen auf Datenreihenfolgen in entsprechenden parallelen Datenströmen Expired - Fee Related DE69325786T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP92203765 1992-12-04

Publications (2)

Publication Number Publication Date
DE69325786D1 DE69325786D1 (de) 1999-09-02
DE69325786T2 true DE69325786T2 (de) 2000-02-17

Family

ID=8211102

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69325786T Expired - Fee Related DE69325786T2 (de) 1992-12-04 1993-11-26 Prozessor für gleichförmige Operationen auf Datenreihenfolgen in entsprechenden parallelen Datenströmen

Country Status (4)

Country Link
US (1) US5432724A (de)
JP (1) JPH06274314A (de)
KR (1) KR100288659B1 (de)
DE (1) DE69325786T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5903480A (en) * 1997-09-29 1999-05-11 Neomagic Division-free phase-shift for digital-audio special effects
US6279020B1 (en) * 1997-12-23 2001-08-21 U.S. Philips Corporation Programmable circuit for realizing a digital filter
US8516026B2 (en) * 2003-03-10 2013-08-20 Broadcom Corporation SIMD supporting filtering in a video decoding system
JP5022577B2 (ja) * 2005-04-15 2012-09-12 オンセミコンダクター・トレーディング・リミテッド Firフィルタ演算器
CN110032745A (zh) * 2018-01-11 2019-07-19 富士通株式会社 生成传感器数据的方法和设备及计算机可读存储介质

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3997771A (en) * 1975-05-05 1976-12-14 Honeywell Inc. Apparatus and method for performing an arithmetic operation and multibit shift
DE3066955D1 (en) * 1980-06-24 1984-04-19 Ibm Signal processor computing arrangement and method of operating said arrangement
US4594655A (en) * 1983-03-14 1986-06-10 International Business Machines Corporation (k)-Instructions-at-a-time pipelined processor for parallel execution of inherently sequential instructions
WO1984003970A1 (en) * 1983-03-30 1984-10-11 Siemens Ag Hybrid associative memory and method for the retrieval and sorting of data contained therein
US4604695A (en) * 1983-09-30 1986-08-05 Honeywell Information Systems Inc. Nibble and word addressable memory arrangement
US4692888A (en) * 1984-10-03 1987-09-08 Advanced Micro Devices, Inc. Method and apparatus for generating and summing the products of pairs of numbers
US4931973A (en) * 1986-07-30 1990-06-05 Asghar Safdar M Method of generating updated transversal filter coefficients
FR2605769B1 (fr) * 1986-10-22 1988-12-09 Thomson Csf Operateur polynomial dans les corps de galois et processeur de traitement de signal numerique comportant un tel operateur
JPH0734228B2 (ja) * 1987-02-23 1995-04-12 株式会社東芝 複合類似度法によるパタ−ン認識装置
US5010509A (en) * 1988-10-05 1991-04-23 United Technologies Corporation Accumulator for complex numbers
US5204828A (en) * 1989-02-10 1993-04-20 Intel Corporation Bus apparatus having hold registers for parallel processing in a microprocessor
US5155824A (en) * 1989-05-15 1992-10-13 Motorola, Inc. System for transferring selected data words between main memory and cache with multiple data words and multiple dirty bits for each address
US5091851A (en) * 1989-07-19 1992-02-25 Hewlett-Packard Company Fast multiple-word accesses from a multi-way set-associative cache memory
US5121502A (en) * 1989-12-20 1992-06-09 Hewlett-Packard Company System for selectively communicating instructions from memory locations simultaneously or from the same memory locations sequentially to plurality of processing
US5177698A (en) * 1990-07-09 1993-01-05 Eastman Kodak Company Selectable power of two coefficient signal combining circuit
JP2866754B2 (ja) * 1991-03-27 1999-03-08 三菱電機株式会社 演算処理装置
US5282155A (en) * 1992-11-19 1994-01-25 Bell Communications Resarch, Inc. Adaptive digital filter architecture for parallel output/update computations

Also Published As

Publication number Publication date
KR940015848A (ko) 1994-07-21
JPH06274314A (ja) 1994-09-30
KR100288659B1 (ko) 2001-05-02
US5432724A (en) 1995-07-11
DE69325786D1 (de) 1999-09-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee