DE69321498T2 - Zugriffszeitteilungssystem auf einen Speicher, der einem Prozessor und anderen Anwendungen gemeinsam ist - Google Patents

Zugriffszeitteilungssystem auf einen Speicher, der einem Prozessor und anderen Anwendungen gemeinsam ist

Info

Publication number
DE69321498T2
DE69321498T2 DE69321498T DE69321498T DE69321498T2 DE 69321498 T2 DE69321498 T2 DE 69321498T2 DE 69321498 T DE69321498 T DE 69321498T DE 69321498 T DE69321498 T DE 69321498T DE 69321498 T2 DE69321498 T2 DE 69321498T2
Authority
DE
Germany
Prior art keywords
bus
processor
access
applications
access time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69321498T
Other languages
English (en)
Other versions
DE69321498D1 (de
Inventor
Hubert Rinie
Gerard Douhet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Original Assignee
Alcatel CIT SA
Alcatel SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel CIT SA, Alcatel SA filed Critical Alcatel CIT SA
Publication of DE69321498D1 publication Critical patent/DE69321498D1/de
Application granted granted Critical
Publication of DE69321498T2 publication Critical patent/DE69321498T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
DE69321498T 1992-02-19 1993-02-18 Zugriffszeitteilungssystem auf einen Speicher, der einem Prozessor und anderen Anwendungen gemeinsam ist Expired - Fee Related DE69321498T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9201881A FR2687487B1 (fr) 1992-02-19 1992-02-19 Systeme de partage de temps d'acces a une memoire partagee entre un processeur et d'autres applications.

Publications (2)

Publication Number Publication Date
DE69321498D1 DE69321498D1 (de) 1998-11-19
DE69321498T2 true DE69321498T2 (de) 1999-04-01

Family

ID=9426798

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69321498T Expired - Fee Related DE69321498T2 (de) 1992-02-19 1993-02-18 Zugriffszeitteilungssystem auf einen Speicher, der einem Prozessor und anderen Anwendungen gemeinsam ist

Country Status (5)

Country Link
EP (1) EP0557197B1 (de)
AT (1) ATE172311T1 (de)
DE (1) DE69321498T2 (de)
ES (1) ES2125313T3 (de)
FR (1) FR2687487B1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10084835B3 (de) * 1999-07-20 2005-12-22 Telefonaktiebolaget Lm Ericsson (Publ) Anordnung in einem Multimaster-Bussystem

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2283596B (en) * 1993-11-01 1998-07-01 Ericsson Ge Mobile Communicat Multiprocessor data memory sharing
JPH10283329A (ja) 1997-04-02 1998-10-23 Matsushita Electric Ind Co Ltd メモリ排他制御方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1091633B (it) * 1977-12-30 1985-07-06 Olivetti C Ing E C Spa Dispositivo per la gestione del l accesso diretto alla memoria di un calcolatore
US4325116A (en) * 1979-08-21 1982-04-13 International Business Machines Corporation Parallel storage access by multiprocessors
JPS58192148A (ja) * 1982-05-07 1983-11-09 Hitachi Ltd 演算処理装置
AT389014B (de) * 1983-09-30 1989-10-10 Schoellauf Hannes Ing Zentraleinheit mit speicher
JPS62165263A (ja) * 1986-01-17 1987-07-21 Fujitsu Ltd メモリ制御方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10084835B3 (de) * 1999-07-20 2005-12-22 Telefonaktiebolaget Lm Ericsson (Publ) Anordnung in einem Multimaster-Bussystem

Also Published As

Publication number Publication date
DE69321498D1 (de) 1998-11-19
FR2687487B1 (fr) 1996-12-20
FR2687487A1 (fr) 1993-08-20
EP0557197B1 (de) 1998-10-14
EP0557197A1 (de) 1993-08-25
ATE172311T1 (de) 1998-10-15
ES2125313T3 (es) 1999-03-01

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: ALCATEL, PARIS, FR

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee