DE69314731T2 - Unter verschiedenen Betriebsarten funktionierende halbleiterintegrierte Schaltung - Google Patents

Unter verschiedenen Betriebsarten funktionierende halbleiterintegrierte Schaltung

Info

Publication number
DE69314731T2
DE69314731T2 DE69314731T DE69314731T DE69314731T2 DE 69314731 T2 DE69314731 T2 DE 69314731T2 DE 69314731 T DE69314731 T DE 69314731T DE 69314731 T DE69314731 T DE 69314731T DE 69314731 T2 DE69314731 T2 DE 69314731T2
Authority
DE
Germany
Prior art keywords
integrated circuit
semiconductor integrated
modes
under different
response
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69314731T
Other languages
English (en)
Other versions
DE69314731D1 (de
Inventor
Masaru Koyanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69314731D1 publication Critical patent/DE69314731D1/de
Application granted granted Critical
Publication of DE69314731T2 publication Critical patent/DE69314731T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Facsimile Heads (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
DE69314731T 1992-08-21 1993-08-20 Unter verschiedenen Betriebsarten funktionierende halbleiterintegrierte Schaltung Expired - Fee Related DE69314731T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4222686A JP2856988B2 (ja) 1992-08-21 1992-08-21 半導体集積回路

Publications (2)

Publication Number Publication Date
DE69314731D1 DE69314731D1 (de) 1997-11-27
DE69314731T2 true DE69314731T2 (de) 1998-03-19

Family

ID=16786327

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69314731T Expired - Fee Related DE69314731T2 (de) 1992-08-21 1993-08-20 Unter verschiedenen Betriebsarten funktionierende halbleiterintegrierte Schaltung

Country Status (5)

Country Link
US (1) US5402018A (de)
EP (1) EP0584739B1 (de)
JP (1) JP2856988B2 (de)
KR (1) KR970008362B1 (de)
DE (1) DE69314731T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0738408A (ja) * 1993-07-19 1995-02-07 Sharp Corp バッファ回路
US5492509A (en) * 1994-06-06 1996-02-20 Ford Motor Company Operating range selection of an automatic transmission
US5796746A (en) * 1995-12-22 1998-08-18 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US6240535B1 (en) 1995-12-22 2001-05-29 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US6515505B1 (en) * 1995-12-26 2003-02-04 Cypress Semiconductor Corp. Functionality change by bond optioning decoding
US6496033B2 (en) 1998-06-08 2002-12-17 Cypress Semiconductor Corp. Universal logic chip
EP1132963B1 (de) * 2000-03-08 2007-10-17 Matsushita Electric Industrial Co., Ltd. Integrierte Halbleiterschaltung

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3560939A (en) * 1968-07-05 1971-02-02 Kozponti Fiz Kutato Intezet Digital channel selection apparatus
JPS588588B2 (ja) * 1975-05-28 1983-02-16 株式会社日立製作所 半導体集積回路
JPS605385Y2 (ja) * 1979-11-15 1985-02-19 パイオニア株式会社 プリセツト点灯装置
JPS58201154A (ja) * 1982-05-19 1983-11-22 Nissan Motor Co Ltd アンチスキッド制御装置用マイクロコンピュータのモード監視制御装置
JPS634492A (ja) * 1986-06-23 1988-01-09 Mitsubishi Electric Corp 半導体記憶装置
JPS63217821A (ja) * 1987-03-06 1988-09-09 Toshiba Corp 半導体集積回路

Also Published As

Publication number Publication date
EP0584739A3 (de) 1994-05-04
DE69314731D1 (de) 1997-11-27
JP2856988B2 (ja) 1999-02-10
KR970008362B1 (ko) 1997-05-23
US5402018A (en) 1995-03-28
KR940004797A (ko) 1994-03-16
JPH0669342A (ja) 1994-03-11
EP0584739A2 (de) 1994-03-02
EP0584739B1 (de) 1997-10-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee