DE69308363D1 - Halbleiteranordnung mit einem Halbleiterkörper, wobei eine Oberfläche des Halbleiterkörpers mit einer Barrierschicht aus TixW1-x versehen ist, und Verfahren zur Herstellung dieser Anordnung - Google Patents
Halbleiteranordnung mit einem Halbleiterkörper, wobei eine Oberfläche des Halbleiterkörpers mit einer Barrierschicht aus TixW1-x versehen ist, und Verfahren zur Herstellung dieser AnordnungInfo
- Publication number
- DE69308363D1 DE69308363D1 DE69308363T DE69308363T DE69308363D1 DE 69308363 D1 DE69308363 D1 DE 69308363D1 DE 69308363 T DE69308363 T DE 69308363T DE 69308363 T DE69308363 T DE 69308363T DE 69308363 D1 DE69308363 D1 DE 69308363D1
- Authority
- DE
- Germany
- Prior art keywords
- arrangement
- semiconductor body
- semiconductor
- tixw1
- producing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 3
- 230000004888 barrier function Effects 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/3266—Magnetic control means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32623—Mechanical discharge control means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/004—Charge control of objects or beams
- H01J2237/0041—Neutralising arrangements
- H01J2237/0044—Neutralising arrangements of objects being observed or treated
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Analytical Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Physical Vapour Deposition (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP92201178 | 1992-04-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69308363D1 true DE69308363D1 (de) | 1997-04-10 |
DE69308363T2 DE69308363T2 (de) | 1997-08-21 |
Family
ID=8210577
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69308363T Expired - Fee Related DE69308363T2 (de) | 1992-04-28 | 1993-04-21 | Halbleiteranordnung mit einem Halbleiterkörper, wobei eine Oberfläche des Halbleiterkörpers mit einer Barrierschicht aus TixW1-x versehen ist, und Verfahren zur Herstellung dieser Anordnung |
Country Status (4)
Country | Link |
---|---|
US (1) | US5360994A (de) |
JP (1) | JP3273827B2 (de) |
KR (1) | KR100272019B1 (de) |
DE (1) | DE69308363T2 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62143990A (ja) * | 1985-12-18 | 1987-06-27 | Hitachi Ltd | 液晶表示素子 |
US5385868A (en) * | 1994-07-05 | 1995-01-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Upward plug process for metal via holes |
US5648674A (en) * | 1995-06-07 | 1997-07-15 | Xerox Corporation | Array circuitry with conductive lines, contact leads, and storage capacitor electrode all formed in layer that includes highly conductive metal |
JP3759367B2 (ja) * | 2000-02-29 | 2006-03-22 | 沖電気工業株式会社 | 半導体装置およびその製造方法 |
US7407875B2 (en) * | 2006-09-06 | 2008-08-05 | International Business Machines Corporation | Low resistance contact structure and fabrication thereof |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4491860A (en) * | 1982-04-23 | 1985-01-01 | Signetics Corporation | TiW2 N Fusible links in semiconductor integrated circuits |
US5028531A (en) * | 1984-03-19 | 1991-07-02 | Fujisawa Pharmaceutical Company, Ltd. | IGF-I fusion proteins; protection of IGF-I from degradation by host cell; and processes for the production thereof |
US5019234A (en) * | 1990-06-08 | 1991-05-28 | Vlsi Technology, Inc. | System and method for depositing tungsten/titanium films |
-
1993
- 1993-04-16 KR KR1019930006379A patent/KR100272019B1/ko not_active IP Right Cessation
- 1993-04-21 DE DE69308363T patent/DE69308363T2/de not_active Expired - Fee Related
- 1993-04-26 JP JP09951293A patent/JP3273827B2/ja not_active Expired - Fee Related
- 1993-04-27 US US08/053,993 patent/US5360994A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0620993A (ja) | 1994-01-28 |
JP3273827B2 (ja) | 2002-04-15 |
KR100272019B1 (ko) | 2000-12-01 |
US5360994A (en) | 1994-11-01 |
KR930022493A (ko) | 1993-11-24 |
DE69308363T2 (de) | 1997-08-21 |
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DE69308363D1 (de) | Halbleiteranordnung mit einem Halbleiterkörper, wobei eine Oberfläche des Halbleiterkörpers mit einer Barrierschicht aus TixW1-x versehen ist, und Verfahren zur Herstellung dieser Anordnung | |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |