DE69229378D1 - Multiprozessorsystem für Anfangsverarbeitung für geteilte Schaltkreise - Google Patents
Multiprozessorsystem für Anfangsverarbeitung für geteilte SchaltkreiseInfo
- Publication number
- DE69229378D1 DE69229378D1 DE69229378T DE69229378T DE69229378D1 DE 69229378 D1 DE69229378 D1 DE 69229378D1 DE 69229378 T DE69229378 T DE 69229378T DE 69229378 T DE69229378 T DE 69229378T DE 69229378 D1 DE69229378 D1 DE 69229378D1
- Authority
- DE
- Germany
- Prior art keywords
- multiprocessor system
- initial processing
- split circuits
- split
- circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/177—Initialisation or configuration control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4405—Initialisation of multiprocessor systems
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Multi Processors (AREA)
- Debugging And Monitoring (AREA)
- Hardware Redundancy (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3187915A JP2739786B2 (ja) | 1991-07-26 | 1991-07-26 | マルチ・プロセッサシステム |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69229378D1 true DE69229378D1 (de) | 1999-07-15 |
DE69229378T2 DE69229378T2 (de) | 2000-03-02 |
Family
ID=16214434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69229378T Expired - Fee Related DE69229378T2 (de) | 1991-07-26 | 1992-07-22 | Multiprozessorsystem für Anfangsverarbeitung für geteilte Schaltkreise |
Country Status (5)
Country | Link |
---|---|
US (1) | US5355500A (de) |
EP (1) | EP0526091B1 (de) |
JP (1) | JP2739786B2 (de) |
CA (1) | CA2074628C (de) |
DE (1) | DE69229378T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5802391A (en) * | 1993-03-16 | 1998-09-01 | Ht Research, Inc. | Direct-access team/workgroup server shared by team/workgrouped computers without using a network operating system |
US5832253A (en) * | 1993-12-06 | 1998-11-03 | Cpu Technology, Inc. | Multiprocessors system for selectively wire-oring a combination of signal lines and thereafter using one line to control the running or stalling of a selected processor |
KR101534974B1 (ko) | 2013-12-19 | 2015-07-08 | 현대자동차주식회사 | 다중 마이크로 코어 감시 장치 및 방법 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4375639A (en) * | 1981-01-12 | 1983-03-01 | Harris Corporation | Synchronous bus arbiter |
JPS58140862A (ja) * | 1982-02-16 | 1983-08-20 | Toshiba Corp | 相互排他方式 |
US4608631A (en) * | 1982-09-03 | 1986-08-26 | Sequoia Systems, Inc. | Modular computer system |
US4587609A (en) * | 1983-07-01 | 1986-05-06 | Honeywell Information Systems Inc. | Lockout operation among asynchronous accessers of a shared computer system resource |
US4620278A (en) * | 1983-08-29 | 1986-10-28 | Sperry Corporation | Distributed bus arbitration according each bus user the ability to inhibit all new requests to arbitrate the bus, or to cancel its own pending request, and according the highest priority user the ability to stop the bus |
JPH0766368B2 (ja) * | 1986-10-21 | 1995-07-19 | 日新電機株式会社 | ブ−トプロセツサ決定方式 |
JPH0619723B2 (ja) * | 1987-12-29 | 1994-03-16 | 横河電機株式会社 | 二重化プロセッサシステム |
JPH0650502B2 (ja) * | 1988-02-16 | 1994-06-29 | 富士ファコム制御株式会社 | 多重化装置系の自動運転切換制御方式 |
US5070450A (en) * | 1990-05-25 | 1991-12-03 | Dell Usa Corporation | Power on coordination system and method for multiple processors |
US5202973A (en) * | 1990-06-29 | 1993-04-13 | Digital Equipment Corporation | Method of controlling a shared memory bus in a multiprocessor system for preventing bus collisions and for ensuring a full bus |
-
1991
- 1991-07-26 JP JP3187915A patent/JP2739786B2/ja not_active Expired - Fee Related
-
1992
- 1992-07-22 EP EP92306707A patent/EP0526091B1/de not_active Expired - Lifetime
- 1992-07-22 DE DE69229378T patent/DE69229378T2/de not_active Expired - Fee Related
- 1992-07-23 US US07/919,089 patent/US5355500A/en not_active Expired - Fee Related
- 1992-07-24 CA CA002074628A patent/CA2074628C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CA2074628C (en) | 1999-03-02 |
EP0526091A2 (de) | 1993-02-03 |
CA2074628A1 (en) | 1993-01-27 |
DE69229378T2 (de) | 2000-03-02 |
EP0526091A3 (de) | 1993-02-24 |
JPH0535705A (ja) | 1993-02-12 |
US5355500A (en) | 1994-10-11 |
EP0526091B1 (de) | 1999-06-09 |
JP2739786B2 (ja) | 1998-04-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |