DE69124965D1 - Schaltung zur taktrückgewinnung - Google Patents

Schaltung zur taktrückgewinnung

Info

Publication number
DE69124965D1
DE69124965D1 DE69124965T DE69124965T DE69124965D1 DE 69124965 D1 DE69124965 D1 DE 69124965D1 DE 69124965 T DE69124965 T DE 69124965T DE 69124965 T DE69124965 T DE 69124965T DE 69124965 D1 DE69124965 D1 DE 69124965D1
Authority
DE
Germany
Prior art keywords
circuit
clock recovery
clock
recovery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69124965T
Other languages
English (en)
Other versions
DE69124965T2 (de
Inventor
Kazunori Yamate
Keiichi Danmoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE69124965D1 publication Critical patent/DE69124965D1/de
Publication of DE69124965T2 publication Critical patent/DE69124965T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1676—Time-division multiplex with pulse-position, pulse-interval, or pulse-width modulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/82—Digital/analogue converters with intermediate conversion to time interval
    • H03M1/822—Digital/analogue converters with intermediate conversion to time interval using pulse width modulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Analogue/Digital Conversion (AREA)
  • Noise Elimination (AREA)
DE69124965T 1990-07-20 1991-07-17 Schaltung zur taktrückgewinnung Expired - Fee Related DE69124965T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2190755A JP2943005B2 (ja) 1990-07-20 1990-07-20 クロック再生回路
PCT/JP1991/000953 WO1992002080A1 (en) 1990-07-20 1991-07-17 Clock regenerating circuit

Publications (2)

Publication Number Publication Date
DE69124965D1 true DE69124965D1 (de) 1997-04-10
DE69124965T2 DE69124965T2 (de) 1997-06-12

Family

ID=16263195

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69124965T Expired - Fee Related DE69124965T2 (de) 1990-07-20 1991-07-17 Schaltung zur taktrückgewinnung

Country Status (5)

Country Link
US (1) US5272451A (de)
EP (1) EP0493607B1 (de)
JP (1) JP2943005B2 (de)
DE (1) DE69124965T2 (de)
WO (1) WO1992002080A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5745062A (en) * 1995-08-10 1998-04-28 Zircon Corporation Pulse width modulation analog to digital converter
US6020939A (en) * 1996-01-19 2000-02-01 Sun Microsystems, Inc. Method and apparatus for reducing electromagnetic interference radiated by cathode ray tube displays
JP3291198B2 (ja) * 1996-05-08 2002-06-10 富士通株式会社 半導体集積回路
GB2364838B (en) 1998-03-04 2002-03-20 Fujitsu Ltd Mixed-signal circuitry and integrated circuit devices
US6118399A (en) * 1998-03-30 2000-09-12 Silicon Laboratories, Inc. Coarse/fine switching on digital-to-analog conversion output
US6061009A (en) * 1998-03-30 2000-05-09 Silicon Laboratories, Inc. Apparatus and method for resetting delta-sigma modulator state variables using feedback impedance
US6064326A (en) * 1998-03-30 2000-05-16 Silicon Laboratories, Inc. Analog-to-digital conversion overload detection and suppression
JP2000348346A (ja) * 1999-03-31 2000-12-15 Ricoh Co Ltd データ記録装置の記録用クロック信号発生装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4180783A (en) * 1977-09-06 1979-12-25 Rca Corporation Phase lock loop data timing recovery circuit
JPS55153488A (en) * 1979-05-17 1980-11-29 Sony Corp Color television receiver of beam index type
JPS5736048U (de) * 1980-08-11 1982-02-25
JPS5736048A (ja) * 1980-08-11 1982-02-26 Nippon Steel Corp Renzokuchuzoyoigatanoreikyakuseigyohoho
JPS5819029A (ja) * 1981-07-24 1983-02-03 Shimadzu Corp Ｄ−ａ変換器
JPS58137333A (ja) * 1982-02-10 1983-08-15 Fujitsu General Ltd Ｐｌｌ回路
JPH0752838B2 (ja) * 1985-03-20 1995-06-05 株式会社日立製作所 集積回路
JPS63164619A (ja) * 1986-12-26 1988-07-08 Matsushita Electric Ind Co Ltd 位相同期ル−プ回路
US4806879A (en) * 1987-05-01 1989-02-21 Ecrm Incorporated Method and apparatus for synchronizing to a pulse train packet signal

Also Published As

Publication number Publication date
EP0493607A1 (de) 1992-07-08
JP2943005B2 (ja) 1999-08-30
EP0493607B1 (de) 1997-03-05
DE69124965T2 (de) 1997-06-12
EP0493607A4 (en) 1992-12-09
WO1992002080A1 (en) 1992-02-06
US5272451A (en) 1993-12-21
JPH0481021A (ja) 1992-03-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee