DE69111682D1 - Videospeichermatrix mit einer Direktzugriffsanschlussstelle und einer seriellen Anschlussstelle. - Google Patents

Videospeichermatrix mit einer Direktzugriffsanschlussstelle und einer seriellen Anschlussstelle.

Info

Publication number
DE69111682D1
DE69111682D1 DE69111682T DE69111682T DE69111682D1 DE 69111682 D1 DE69111682 D1 DE 69111682D1 DE 69111682 T DE69111682 T DE 69111682T DE 69111682 T DE69111682 T DE 69111682T DE 69111682 D1 DE69111682 D1 DE 69111682D1
Authority
DE
Germany
Prior art keywords
connector
direct access
video memory
memory matrix
serial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69111682T
Other languages
English (en)
Other versions
DE69111682T2 (de
Inventor
Daryl John Kokoszka
Steven Philip Larky
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69111682D1 publication Critical patent/DE69111682D1/de
Application granted granted Critical
Publication of DE69111682T2 publication Critical patent/DE69111682T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/126—The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Input (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
DE1991611682 1990-05-07 1991-04-26 Videospeichermatrix mit einer Direktzugriffsanschlussstelle und einer seriellen Anschlussstelle. Expired - Fee Related DE69111682T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US51997390A 1990-05-07 1990-05-07

Publications (2)

Publication Number Publication Date
DE69111682D1 true DE69111682D1 (de) 1995-09-07
DE69111682T2 DE69111682T2 (de) 1996-04-18

Family

ID=24070652

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1991611682 Expired - Fee Related DE69111682T2 (de) 1990-05-07 1991-04-26 Videospeichermatrix mit einer Direktzugriffsanschlussstelle und einer seriellen Anschlussstelle.

Country Status (3)

Country Link
EP (1) EP0456394B1 (de)
JP (1) JPH0782747B2 (de)
DE (1) DE69111682T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5315388A (en) * 1991-11-19 1994-05-24 General Instrument Corporation Multiple serial access memory for use in feedback systems such as motion compensated television
JP3381077B2 (ja) * 1992-12-04 2003-02-24 ソニー株式会社 動画像復号装置
US7075991B1 (en) 1993-01-18 2006-07-11 Sony Corporation Apparatus for encoding and decoding header data in picture signal transmission
US7558324B2 (en) 1993-01-18 2009-07-07 Sony Corporation Apparatus for encoding and decoding header data in picture signal transmission
US5598514A (en) * 1993-08-09 1997-01-28 C-Cube Microsystems Structure and method for a multistandard video encoder/decoder
FR2718315B1 (fr) * 1994-03-30 1996-06-21 Sgs Thomson Microelectronics Circuit de compression d'image.
US5910909A (en) * 1995-08-28 1999-06-08 C-Cube Microsystems, Inc. Non-linear digital filters for interlaced video signals and method thereof
DE60045789D1 (de) 1999-10-18 2011-05-12 Seiko Epson Corp Anzeigevorrichtung mit im Anzeigesubstrat integriertem Speicher
EP1608178A1 (de) 2004-06-18 2005-12-21 STMicroelectronics S.A. Ein Konvertierungsgerät zur Durchführung einer Rasterabtastkonvertierung zwischen einem JPEG Dekoder und einem Bildspeicher

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3996559A (en) * 1974-11-07 1976-12-07 International Business Machines Corporation Method and apparatus for accessing horizontal sequences, vertical sequences and regularly spaced rectangular subarrays from an array stored in a modified word organized random access memory system
JPS6148189A (ja) * 1984-08-14 1986-03-08 Fujitsu Ltd 半導体記憶装置
AU5110385A (en) * 1984-12-28 1986-07-03 Gte Laboratories Incorporated Time division multiplexing ram

Also Published As

Publication number Publication date
EP0456394A3 (en) 1992-10-21
EP0456394B1 (de) 1995-08-02
JPH04228180A (ja) 1992-08-18
EP0456394A2 (de) 1991-11-13
JPH0782747B2 (ja) 1995-09-06
DE69111682T2 (de) 1996-04-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee