DE69100181T2 - Integrierter Schaltkreis mit Anschlussstift zur Modusfeststellung. - Google Patents

Integrierter Schaltkreis mit Anschlussstift zur Modusfeststellung.

Info

Publication number
DE69100181T2
DE69100181T2 DE91401301T DE69100181T DE69100181T2 DE 69100181 T2 DE69100181 T2 DE 69100181T2 DE 91401301 T DE91401301 T DE 91401301T DE 69100181 T DE69100181 T DE 69100181T DE 69100181 T2 DE69100181 T2 DE 69100181T2
Authority
DE
Germany
Prior art keywords
pin
integrated circuit
mode detection
detection
mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE91401301T
Other languages
English (en)
Other versions
DE69100181D1 (de
Inventor
Jean Nicolai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Publication of DE69100181D1 publication Critical patent/DE69100181D1/de
Application granted granted Critical
Publication of DE69100181T2 publication Critical patent/DE69100181T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
DE91401301T 1990-05-30 1991-05-21 Integrierter Schaltkreis mit Anschlussstift zur Modusfeststellung. Expired - Fee Related DE69100181T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9006717A FR2662874B1 (fr) 1990-05-30 1990-05-30 Circuit integre avec broche de detection de mode.

Publications (2)

Publication Number Publication Date
DE69100181D1 DE69100181D1 (de) 1993-08-26
DE69100181T2 true DE69100181T2 (de) 1994-02-10

Family

ID=9397092

Family Applications (1)

Application Number Title Priority Date Filing Date
DE91401301T Expired - Fee Related DE69100181T2 (de) 1990-05-30 1991-05-21 Integrierter Schaltkreis mit Anschlussstift zur Modusfeststellung.

Country Status (4)

Country Link
US (1) US5198707A (de)
EP (1) EP0459863B1 (de)
DE (1) DE69100181T2 (de)
FR (1) FR2662874B1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE36443E (en) * 1988-10-31 1999-12-14 Sgs-Thomson Microelectronics, Inc. Dialer with internal option select circuit programmed with externally hardwired address
US5477166A (en) * 1993-04-22 1995-12-19 Benchmarq Microelectronics Programmable output device with integrated circuit
US5457411A (en) * 1994-12-02 1995-10-10 Texas Instruments Incorporated Trinary logic input gate
US5629635A (en) * 1995-09-26 1997-05-13 Ics Technologies, Inc. Address programming via LED pin
US6134686A (en) * 1998-05-29 2000-10-17 Cypress Semiconductor Corp. Technique to detect drive strength of input pin
US6127851A (en) * 1999-01-26 2000-10-03 International Business Machines Corporation Circuit and method for differentiating multiple modules
US6338099B1 (en) * 1999-07-09 2002-01-08 Behavior Tech Computer Corp. Device code recognizing circuit
US20040040652A1 (en) * 2002-08-30 2004-03-04 3M Innovative Properties Company Methods for electrostatically adhering an article to a substrate
US6788095B1 (en) * 2003-01-31 2004-09-07 Xilinx, Inc. Method for gross input leakage functional test at wafer sort
US7098833B2 (en) * 2004-06-04 2006-08-29 Texas Instruments Incorporated Tri-value decoder circuit and method
TWI269529B (en) * 2005-06-14 2006-12-21 Richtek Technology Corp Tri-state output logic with zero quiescent current by one input control
JP4860209B2 (ja) * 2005-08-24 2012-01-25 富士通セミコンダクター株式会社 半導体装置
CN101197569B (zh) * 2006-12-07 2011-04-06 立锜科技股份有限公司 内建于芯片用于设定芯片操作模式的电路及方法
JP5301262B2 (ja) * 2008-12-19 2013-09-25 ルネサスエレクトロニクス株式会社 半導体装置、及び動作モ−ド切換方法
TWI796241B (zh) * 2021-11-19 2023-03-11 立錡科技股份有限公司 具三態偵測功能之狀態偵測電路及其狀態偵測方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4005315A (en) * 1975-09-22 1977-01-25 Signetics Corporation Triple state to binary converter
JPS5284938A (en) * 1976-01-07 1977-07-14 Hitachi Ltd Logic circuit
JPS52146534A (en) * 1976-05-31 1977-12-06 Toshiba Corp Input circuit
JPS56153840A (en) * 1980-04-28 1981-11-28 Oki Electric Ind Co Ltd Ternary level input circuit
JPS58202628A (ja) * 1982-05-20 1983-11-25 Sharp Corp ３値レベル入力回路
US4612499A (en) * 1983-11-07 1986-09-16 Texas Instruments Incorporated Test input demultiplexing circuit
JPS62121374A (ja) * 1985-11-20 1987-06-02 Ricoh Co Ltd テストモ−ド起動回路
FR2636797B1 (fr) * 1988-09-16 1990-11-09 Sgs Thomson Microelectronics Circuit integre pour poste telephonique avec detecteur d'enveloppe de signal

Also Published As

Publication number Publication date
US5198707A (en) 1993-03-30
EP0459863B1 (de) 1993-07-21
EP0459863A1 (de) 1991-12-04
DE69100181D1 (de) 1993-08-26
FR2662874B1 (fr) 1992-08-07
FR2662874A1 (fr) 1991-12-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee