DE69029565D1 - Verfahren und Gerät zur Linearisierung des Ausgangs eines Digitalanalogwandlers - Google Patents

Verfahren und Gerät zur Linearisierung des Ausgangs eines Digitalanalogwandlers

Info

Publication number
DE69029565D1
DE69029565D1 DE69029565T DE69029565T DE69029565D1 DE 69029565 D1 DE69029565 D1 DE 69029565D1 DE 69029565 T DE69029565 T DE 69029565T DE 69029565 T DE69029565 T DE 69029565T DE 69029565 D1 DE69029565 D1 DE 69029565D1
Authority
DE
Germany
Prior art keywords
linearizing
digital
output
analog converter
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69029565T
Other languages
English (en)
Other versions
DE69029565T2 (de
Inventor
Raymond C Blackham
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agilent Technologies Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Application granted granted Critical
Publication of DE69029565D1 publication Critical patent/DE69029565D1/de
Publication of DE69029565T2 publication Critical patent/DE69029565T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0634—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
    • H03M1/0636—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the amplitude domain
    • H03M1/0639—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the amplitude domain using dither, e.g. using triangular or sawtooth waveforms
    • H03M1/0641—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the amplitude domain using dither, e.g. using triangular or sawtooth waveforms the dither being a random signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
DE69029565T 1989-11-27 1990-11-02 Verfahren und Gerät zur Linearisierung des Ausgangs eines Digitalanalogwandlers Expired - Fee Related DE69029565T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/442,278 US4994803A (en) 1989-11-27 1989-11-27 Random number dither circuit for digital-to-analog output signal linearity

Publications (2)

Publication Number Publication Date
DE69029565D1 true DE69029565D1 (de) 1997-02-13
DE69029565T2 DE69029565T2 (de) 1997-04-24

Family

ID=23756208

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69029565T Expired - Fee Related DE69029565T2 (de) 1989-11-27 1990-11-02 Verfahren und Gerät zur Linearisierung des Ausgangs eines Digitalanalogwandlers

Country Status (5)

Country Link
US (1) US4994803A (de)
EP (1) EP0430449B1 (de)
JP (1) JP3168295B2 (de)
CA (1) CA2019237A1 (de)
DE (1) DE69029565T2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5214423A (en) * 1991-04-22 1993-05-25 Motorola, Inc. Random number generation using volatile RAM
US5189418A (en) * 1992-04-16 1993-02-23 Hewlett-Packard Company Dither error correction
US5311180A (en) * 1993-01-15 1994-05-10 The United States Of America As Represented By The Secretary Of The Navy Digital circuit for the introduction and later removal of dither from an analog signal
US5459680A (en) * 1993-10-20 1995-10-17 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Method and apparatus for spur-reduced digital sinusoid synthesis
DE4408181A1 (de) * 1994-03-11 1995-09-14 Ant Nachrichtentech Verfahren zur Linearisierung von Unstetigkeiten in der Übertragungskennlinie eines D/A-Wandlers sowie Anordnung und Anwendung
US6016113A (en) * 1997-06-26 2000-01-18 Binder; Yehuda System for enhancing the accuracy of analog-digital-analog conversions
US5952945A (en) * 1997-08-14 1999-09-14 Northern Telecom Limited Digital/analogue conversion
US6466147B1 (en) 1999-10-25 2002-10-15 Hrl Laboratories, Llc Method and apparatus for randomized dynamic element matching DAC
RU2210858C2 (ru) * 2001-10-08 2003-08-20 Дунаев Игорь Борисович Способ помехоустойчивой передачи информации
US6522176B1 (en) 2001-11-15 2003-02-18 Itt Manufacturing Enterprises, Inc. Low spurious direct digital synthesizer
US7626721B2 (en) * 2006-10-12 2009-12-01 Agilent Technologies, Inc. Dither methods for suppression of data-dependent activity variations
US7554471B2 (en) * 2006-11-01 2009-06-30 Northrop Grumman Corporation System and method for improving linearity of a DAC
WO2008114700A1 (ja) * 2007-03-13 2008-09-25 Advantest Corporation 測定装置、測定方法、試験装置、電子デバイス、および、プログラム
US7630082B2 (en) * 2007-04-12 2009-12-08 Honeywell International Inc. Systems and methods for high precision feedback control in closed loop sensors
JP2009218711A (ja) * 2008-03-07 2009-09-24 Canon Inc 情報処理装置、画像処理装置、情報処理装置の制御方法、画像処理装置の制御方法、及び、プログラム
JP5141450B2 (ja) * 2008-08-28 2013-02-13 ヤマハ株式会社 デジタル入力型ｄ級増幅器
US10069505B1 (en) * 2017-09-13 2018-09-04 Keysight Technologies, Inc. Least significant bit dynamic element matching in a digital-to-analog converter
CN109995367B (zh) * 2017-12-29 2022-12-06 瑞昱半导体股份有限公司 数模转换器装置
US10218371B1 (en) 2018-03-01 2019-02-26 Iowa State University Research Foundation, Inc. Cost effective DAC linearization system
US11314483B2 (en) 2020-01-08 2022-04-26 International Business Machines Corporation Bit-serial computation with dynamic frequency modulation for error resiliency in neural network

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4550309A (en) * 1984-02-16 1985-10-29 Hewlett Packard Company Analog to digital converter
JPH0611117B2 (ja) * 1984-12-31 1994-02-09 ティアツク株式会社 ディジタル−アナログ変換装置
JPS61159827A (ja) * 1984-12-31 1986-07-19 Teac Co ディジタル―アナログ変換方法
GB8607553D0 (en) * 1986-03-26 1986-04-30 Solid State Logic Ltd Digital analogue signal conversion

Also Published As

Publication number Publication date
EP0430449A3 (en) 1993-05-12
JP3168295B2 (ja) 2001-05-21
EP0430449B1 (de) 1997-01-02
DE69029565T2 (de) 1997-04-24
CA2019237A1 (en) 1991-05-27
US4994803A (en) 1991-02-19
EP0430449A2 (de) 1991-06-05
JPH03177113A (ja) 1991-08-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: AGILENT TECHNOLOGIES, INC. (N.D.GES.D.STAATES DELA

8339 Ceased/non-payment of the annual fee