DE69025439T2 - Graphisches Anzeigesystem mit einem geteilten seriellen Register - Google Patents

Graphisches Anzeigesystem mit einem geteilten seriellen Register

Info

Publication number
DE69025439T2
DE69025439T2 DE69025439T DE69025439T DE69025439T2 DE 69025439 T2 DE69025439 T2 DE 69025439T2 DE 69025439 T DE69025439 T DE 69025439T DE 69025439 T DE69025439 T DE 69025439T DE 69025439 T2 DE69025439 T2 DE 69025439T2
Authority
DE
Germany
Prior art keywords
display system
graphic display
serial register
divided serial
divided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69025439T
Other languages
English (en)
Other versions
DE69025439D1 (de
Inventor
Nicholas Kerin Ing-Simmons
Iain Craig Robertson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69025439D1 publication Critical patent/DE69025439D1/de
Publication of DE69025439T2 publication Critical patent/DE69025439T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/153—Digital output to display device ; Cooperation and interconnection of the display device with other functional units using cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Processing Or Creating Images (AREA)
DE69025439T 1989-07-28 1990-07-26 Graphisches Anzeigesystem mit einem geteilten seriellen Register Expired - Fee Related DE69025439T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US38756989A 1989-07-28 1989-07-28

Publications (2)

Publication Number Publication Date
DE69025439D1 DE69025439D1 (de) 1996-03-28
DE69025439T2 true DE69025439T2 (de) 1996-07-18

Family

ID=23530454

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69025439T Expired - Fee Related DE69025439T2 (de) 1989-07-28 1990-07-26 Graphisches Anzeigesystem mit einem geteilten seriellen Register

Country Status (5)

Country Link
EP (1) EP0410743B1 (de)
JP (1) JPH03164872A (de)
KR (1) KR910003484A (de)
CN (1) CN1049926A (de)
DE (1) DE69025439T2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100430999C (zh) * 2002-09-09 2008-11-05 Nxp股份有限公司 用于显示系统的驱动方法、驱动电路和驱动设备
CN103345910B (zh) * 2013-06-09 2015-11-18 苏州国芯科技有限公司 单端口调色板sram控制器及其控制方法
CN206002819U (zh) 2016-09-18 2017-03-08 京东方科技集团股份有限公司 阵列基板及显示器件

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4689741A (en) * 1983-12-30 1987-08-25 Texas Instruments Incorporated Video system having a dual-port memory with inhibited random access during transfer cycles
EP0245564B1 (de) * 1986-05-06 1992-03-11 Digital Equipment Corporation Multi-Port-Speicher und Quelleneinrichtung für Bildpunktinformation

Also Published As

Publication number Publication date
KR910003484A (ko) 1991-02-27
EP0410743A3 (en) 1992-05-13
JPH03164872A (ja) 1991-07-16
CN1049926A (zh) 1991-03-13
EP0410743A2 (de) 1991-01-30
DE69025439D1 (de) 1996-03-28
EP0410743B1 (de) 1996-02-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee