DE68928376T2 - Vorrichtung zum multiplizieren, teilen und ziehen der quadratwurzel - Google Patents
Vorrichtung zum multiplizieren, teilen und ziehen der quadratwurzelInfo
- Publication number
- DE68928376T2 DE68928376T2 DE68928376T DE68928376T DE68928376T2 DE 68928376 T2 DE68928376 T2 DE 68928376T2 DE 68928376 T DE68928376 T DE 68928376T DE 68928376 T DE68928376 T DE 68928376T DE 68928376 T2 DE68928376 T2 DE 68928376T2
- Authority
- DE
- Germany
- Prior art keywords
- multiplicating
- dividing
- square root
- root
- square
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/535—Dividing only
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/552—Powers or roots, e.g. Pythagorean sums
- G06F7/5525—Roots or inverse roots of single operands
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/3808—Details concerning the type of numbers or the way they are handled
- G06F2207/3812—Devices capable of handling different types of numbers
- G06F2207/3816—Accepting numbers of variable word length
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
- G06F2207/5355—Using iterative approximation not using digit recurrence, e.g. Newton Raphson or Goldschmidt
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
- G06F2207/5356—Via reciprocal, i.e. calculate reciprocal only, or calculate reciprocal first and then the quotient from the reciprocal and the numerator
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
- G06F7/487—Multiplying; Dividing
- G06F7/4873—Dividing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49942—Significance control
- G06F7/49947—Rounding
- G06F7/49957—Implementation of IEEE-754 Standard
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Optimization (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63277242A JPH02125331A (ja) | 1988-11-04 | 1988-11-04 | 乗除算開平器 |
JP63290248A JP2837415B2 (ja) | 1988-11-18 | 1988-11-18 | 乗除算開平算装置 |
JP63309968A JPH02156375A (ja) | 1988-12-09 | 1988-12-09 | ハイブリッド式関数演算法 |
PCT/JP1989/001134 WO1990005335A1 (en) | 1988-11-04 | 1989-11-02 | Apparatus for multiplication, division and extraction of square root |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68928376D1 DE68928376D1 (de) | 1997-11-13 |
DE68928376T2 true DE68928376T2 (de) | 1998-04-02 |
Family
ID=27336437
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68928376T Expired - Fee Related DE68928376T2 (de) | 1988-11-04 | 1989-11-02 | Vorrichtung zum multiplizieren, teilen und ziehen der quadratwurzel |
Country Status (5)
Country | Link |
---|---|
US (3) | US5293558A (de) |
EP (1) | EP0394499B1 (de) |
KR (1) | KR100198472B1 (de) |
DE (1) | DE68928376T2 (de) |
WO (1) | WO1990005335A1 (de) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5212661A (en) * | 1989-10-16 | 1993-05-18 | Matsushita Electric Industrial Co., Ltd. | Apparatus for performing floating point arithmetic operation and rounding the result thereof |
US5606677A (en) * | 1992-11-30 | 1997-02-25 | Texas Instruments Incorporated | Packed word pair multiply operation forming output including most significant bits of product and other bits of one input |
US5386375A (en) * | 1993-11-01 | 1995-01-31 | Motorola, Inc. | Floating point data processor and a method for performing a floating point square root operation within the data processor |
US5509129A (en) * | 1993-11-30 | 1996-04-16 | Guttag; Karl M. | Long instruction word controlling plural independent processor operations |
GB9419246D0 (en) * | 1994-09-23 | 1994-11-09 | Cambridge Consultants | Data processing circuits and interfaces |
GB2294138B (en) * | 1994-09-23 | 1997-01-15 | Cambridge Consultants | Processor core embedded in an integrated circuit, simulator and emulator for the processor |
US6643765B1 (en) | 1995-08-16 | 2003-11-04 | Microunity Systems Engineering, Inc. | Programmable processor with group floating point operations |
US5721892A (en) * | 1995-08-31 | 1998-02-24 | Intel Corporation | Method and apparatus for performing multiply-subtract operations on packed data |
US6385634B1 (en) * | 1995-08-31 | 2002-05-07 | Intel Corporation | Method for performing multiply-add operations on packed data |
US7395298B2 (en) * | 1995-08-31 | 2008-07-01 | Intel Corporation | Method and apparatus for performing multiply-add operations on packed data |
US5983253A (en) * | 1995-09-05 | 1999-11-09 | Intel Corporation | Computer system for performing complex digital filters |
US6237016B1 (en) | 1995-09-05 | 2001-05-22 | Intel Corporation | Method and apparatus for multiplying and accumulating data samples and complex coefficients |
US5936872A (en) * | 1995-09-05 | 1999-08-10 | Intel Corporation | Method and apparatus for storing complex numbers to allow for efficient complex multiplication operations and performing such complex multiplication operations |
US6058408A (en) * | 1995-09-05 | 2000-05-02 | Intel Corporation | Method and apparatus for multiplying and accumulating complex numbers in a digital filter |
US6470370B2 (en) | 1995-09-05 | 2002-10-22 | Intel Corporation | Method and apparatus for multiplying and accumulating complex numbers in a digital filter |
US5822459A (en) * | 1995-09-28 | 1998-10-13 | Intel Corporation | Method for processing wavelet bands |
US5621674A (en) * | 1996-02-15 | 1997-04-15 | Intel Corporation | Computer implemented method for compressing 24 bit pixels to 16 bit pixels |
US5847979A (en) * | 1996-10-31 | 1998-12-08 | Samsung Electronics Company, Ltd. | Method and apparatus for generating an initial estimate for a floating point reciprocal of a square root |
US6230175B1 (en) * | 1997-11-11 | 2001-05-08 | Matsushita Electric Industrial Co., Ltd. | Reconfigurable digit-serial arithmetic system having a plurality of digit-serial arithmetic units |
US6173271B1 (en) | 1997-11-26 | 2001-01-09 | California Institute Of Technology | Television advertising automated billing system |
US6490607B1 (en) * | 1998-01-28 | 2002-12-03 | Advanced Micro Devices, Inc. | Shared FP and SIMD 3D multiplier |
WO2002021323A2 (en) * | 2000-09-08 | 2002-03-14 | Avaz Networks | Hardware function generator support in a dsp |
US7076516B2 (en) * | 2000-09-19 | 2006-07-11 | California Institute Of Technology | Efficient method of identifying non-solution or non-optimal regions of the domain of a function |
US20030023653A1 (en) * | 2001-01-29 | 2003-01-30 | Andrew Dunlop | System, method and article of manufacture for a single-cycle floating point library |
US6915320B2 (en) * | 2001-08-09 | 2005-07-05 | Sun Microsystems, Inc. | Termination criteria for the one-dimensional interval version of newton's method |
US6920472B2 (en) * | 2001-09-13 | 2005-07-19 | Sun Microsystems, Inc | Termination criteria for the interval version of Newton's method for solving systems of non-linear equations |
US7430578B2 (en) * | 2001-10-29 | 2008-09-30 | Intel Corporation | Method and apparatus for performing multiply-add operations on packed byte data |
US6941334B2 (en) * | 2002-02-01 | 2005-09-06 | Broadcom Corporation | Higher precision divide and square root approximations |
KR100402799B1 (ko) * | 2002-02-09 | 2003-10-22 | 삼성전자주식회사 | 오차를 최소화할 수 있는 제곱근기 |
TWI220479B (en) * | 2003-07-09 | 2004-08-21 | Mediatek Inc | Digital signal processor based on jumping floating point arithmetic |
US7587443B1 (en) * | 2004-03-23 | 2009-09-08 | Altera Corporation | Digital signal processor with efficient multi-modal multiplier |
US7747667B2 (en) * | 2005-02-16 | 2010-06-29 | Arm Limited | Data processing apparatus and method for determining an initial estimate of a result value of a reciprocal operation |
US8015228B2 (en) * | 2005-02-16 | 2011-09-06 | Arm Limited | Data processing apparatus and method for performing a reciprocal operation on an input value to produce a result value |
KR100640807B1 (ko) * | 2005-08-09 | 2006-11-02 | 엘지전자 주식회사 | 선형보간을 이용한 루트연산방법 및 이를 구현할 수 있는이동통신단말기 |
US7899859B2 (en) * | 2005-12-20 | 2011-03-01 | Oracle America, Inc. | Efficient error-check and exact-check for Newton-Raphson divide and square-root operations |
US8156171B1 (en) * | 2007-11-20 | 2012-04-10 | Altera Corporation | Digital logic circuit |
US8667046B2 (en) * | 2008-02-21 | 2014-03-04 | Ecole Polytechnique Federale De Lausanne/Service Des Relations Industrielles | Generalized programmable counter arrays |
US8150902B2 (en) | 2009-06-19 | 2012-04-03 | Singular Computing Llc | Processing with compact arithmetic processing element |
GB2543849B (en) | 2015-11-02 | 2021-08-11 | Johnson Matthey Plc | Oxidation catalyst |
WO2018157136A1 (en) | 2017-02-27 | 2018-08-30 | Nucor Corporation | Thermal cycling for austenite grain refinement |
CN108897524B (zh) * | 2018-05-31 | 2021-01-22 | 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) | 除法函数处理电路、方法、芯片以及系统 |
CN116700664A (zh) * | 2022-02-24 | 2023-09-05 | 象帝先计算技术(重庆)有限公司 | 一种确定浮点数平方根的方法及装置 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3590229A (en) * | 1968-03-28 | 1971-06-29 | Electronics Lab Inc | Digital differentiator |
US3631230A (en) * | 1970-09-24 | 1971-12-28 | Ibm | Binary arithmetic unit implementing a multiplicative steration for the exponential, logarithm, quotient and square root functions |
US3828175A (en) * | 1972-10-30 | 1974-08-06 | Amdahl Corp | Method and apparatus for division employing table-lookup and functional iteration |
US3928756A (en) * | 1973-01-17 | 1975-12-23 | Didier Auray | Device for calculating the successive derivatives of a function of a variable |
JPS49122382A (de) * | 1973-03-22 | 1974-11-22 | ||
US4477879A (en) * | 1981-12-28 | 1984-10-16 | Sperry Corporation | Floating point processor architecture which performs square root by hardware |
DE3274164D1 (en) * | 1982-12-23 | 1986-12-11 | Ibm | Method and apparatus for division operations |
JPS61262930A (ja) * | 1985-05-17 | 1986-11-20 | Nec Corp | 除算装置 |
US4884231A (en) * | 1986-09-26 | 1989-11-28 | Performance Semiconductor Corporation | Microprocessor system with extended arithmetic logic unit |
US4878190A (en) * | 1988-01-29 | 1989-10-31 | Texas Instruments Incorporated | Floating point/integer processor with divide and square root functions |
US4901267A (en) * | 1988-03-14 | 1990-02-13 | Weitek Corporation | Floating point circuit with configurable number of multiplier cycles and variable divide cycle ratio |
US4949296A (en) * | 1988-05-18 | 1990-08-14 | Harris Corporation | Method and apparatus for computing square roots of binary numbers |
US4999801A (en) * | 1988-07-15 | 1991-03-12 | Fujitsu Limited | Floating point operation unit in division and square root operations |
US5047973A (en) * | 1989-04-26 | 1991-09-10 | Texas Instruments Incorporated | High speed numerical processor for performing a plurality of numeric functions |
US5060182A (en) * | 1989-09-05 | 1991-10-22 | Cyrix Corporation | Method and apparatus for performing the square root function using a rectangular aspect ratio multiplier |
-
1989
- 1989-11-02 WO PCT/JP1989/001134 patent/WO1990005335A1/ja active IP Right Grant
- 1989-11-02 EP EP89912134A patent/EP0394499B1/de not_active Expired - Lifetime
- 1989-11-02 US US07/536,565 patent/US5293558A/en not_active Expired - Fee Related
- 1989-11-02 DE DE68928376T patent/DE68928376T2/de not_active Expired - Fee Related
-
1990
- 1990-07-04 KR KR1019900701428A patent/KR100198472B1/ko not_active IP Right Cessation
-
1993
- 1993-08-12 US US08/089,103 patent/US5631858A/en not_active Expired - Lifetime
-
1997
- 1997-01-31 US US08/797,653 patent/US5956263A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5293558A (en) | 1994-03-08 |
US5956263A (en) | 1999-09-21 |
WO1990005335A1 (en) | 1990-05-17 |
US5631858A (en) | 1997-05-20 |
EP0394499B1 (de) | 1997-10-08 |
KR100198472B1 (en) | 1999-06-15 |
KR900702451A (ko) | 1990-12-07 |
EP0394499A1 (de) | 1990-10-31 |
DE68928376D1 (de) | 1997-11-13 |
EP0394499A4 (en) | 1993-02-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |