DE68925666D1 - Prozessoren für wortorganisierte Daten - Google Patents

Prozessoren für wortorganisierte Daten

Info

Publication number
DE68925666D1
DE68925666D1 DE68925666T DE68925666T DE68925666D1 DE 68925666 D1 DE68925666 D1 DE 68925666D1 DE 68925666 T DE68925666 T DE 68925666T DE 68925666 T DE68925666 T DE 68925666T DE 68925666 D1 DE68925666 D1 DE 68925666D1
Authority
DE
Germany
Prior art keywords
processors
organized data
word organized
word
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68925666T
Other languages
English (en)
Other versions
DE68925666T2 (de
Inventor
Randall Dean Groves
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE68925666D1 publication Critical patent/DE68925666D1/de
Publication of DE68925666T2 publication Critical patent/DE68925666T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3816—Instruction alignment, e.g. cache line crossing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Executing Machine-Instructions (AREA)
DE68925666T 1988-10-07 1989-10-04 Prozessoren für wortorganisierte Daten Expired - Fee Related DE68925666T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US25509688A 1988-10-07 1988-10-07

Publications (2)

Publication Number Publication Date
DE68925666D1 true DE68925666D1 (de) 1996-03-28
DE68925666T2 DE68925666T2 (de) 1996-09-26

Family

ID=22966825

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68925666T Expired - Fee Related DE68925666T2 (de) 1988-10-07 1989-10-04 Prozessoren für wortorganisierte Daten

Country Status (3)

Country Link
EP (1) EP0363176B1 (de)
JP (1) JPH0743667B2 (de)
DE (1) DE68925666T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5193167A (en) * 1990-06-29 1993-03-09 Digital Equipment Corporation Ensuring data integrity by locked-load and conditional-store operations in a multiprocessor system
CA2045705A1 (en) * 1990-06-29 1991-12-30 Richard Lee Sites In-register data manipulation in reduced instruction set processor
US5680642A (en) * 1993-06-25 1997-10-21 At&T Global Information Solutions Company Method and apparatus for pseudo-aligned transfers of data to memory wherein a re-alignment is performed based on the data byte control header
DE69623461T2 (de) * 1995-06-01 2003-07-24 Fujitsu Ltd., Kawasaki Koordination von befehlsausgabe in einem parallelen befehlsverarbeitungssystem
US6332188B1 (en) * 1998-11-06 2001-12-18 Analog Devices, Inc. Digital signal processor with bit FIFO
US7272622B2 (en) 2001-10-29 2007-09-18 Intel Corporation Method and apparatus for parallel shift right merge of data
US7818356B2 (en) 2001-10-29 2010-10-19 Intel Corporation Bitstream buffer manipulation with a SIMD merge instruction
US20040054877A1 (en) 2001-10-29 2004-03-18 Macy William W. Method and apparatus for shuffling data
US7685212B2 (en) 2001-10-29 2010-03-23 Intel Corporation Fast full search motion estimation with SIMD merge instruction
US7340495B2 (en) 2001-10-29 2008-03-04 Intel Corporation Superior misaligned memory load and copy using merge hardware
ATE328359T1 (de) 2003-03-06 2006-06-15 Tyco Electronics Austria Gmbh Relais mit querschnittserweitertem kern
TWI230357B (en) * 2003-12-19 2005-04-01 Sunplus Technology Co Ltd Device and method for writing data in a processor to memory at unaligned location
US9454367B2 (en) * 2012-03-15 2016-09-27 International Business Machines Corporation Finding the length of a set of character data having a termination character
GB2552853B (en) * 2015-09-17 2018-11-21 Annexin Pharmaceuticals Ab Purification of Annexin A5 from a composition that includes a calcium ion chelator

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3916388A (en) * 1974-05-30 1975-10-28 Ibm Shifting apparatus for automatic data alignment
JPS584374B2 (ja) * 1976-08-06 1983-01-26 富士通株式会社 デ−タ転送処理方式
US4542456A (en) * 1982-04-28 1985-09-17 At&T Bell Laboratories Method and apparatus for performing range checks
US4556951A (en) * 1982-06-06 1985-12-03 Digital Equipment Corporation Central processor with instructions for processing sequences of characters
JPS59226957A (ja) * 1983-06-07 1984-12-20 Nec Corp デ−タ制御システム
JPS59229659A (ja) * 1983-06-09 1984-12-24 Hitachi Ltd デ−タ処理方式
US4569016A (en) * 1983-06-30 1986-02-04 International Business Machines Corporation Mechanism for implementing one machine cycle executable mask and rotate instructions in a primitive instruction set computing system
US4814976C1 (en) * 1986-12-23 2002-06-04 Mips Tech Inc Risc computer with unaligned reference handling and method for the same

Also Published As

Publication number Publication date
EP0363176A2 (de) 1990-04-11
EP0363176A3 (de) 1991-12-11
EP0363176B1 (de) 1996-02-14
JPH02148239A (ja) 1990-06-07
DE68925666T2 (de) 1996-09-26
JPH0743667B2 (ja) 1995-05-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee