DE60333613D1 - Prozessor zur Verbesserung der Parallelität bei der Durchführung von Befehlen - Google Patents
Prozessor zur Verbesserung der Parallelität bei der Durchführung von BefehlenInfo
- Publication number
- DE60333613D1 DE60333613D1 DE60333613T DE60333613T DE60333613D1 DE 60333613 D1 DE60333613 D1 DE 60333613D1 DE 60333613 T DE60333613 T DE 60333613T DE 60333613 T DE60333613 T DE 60333613T DE 60333613 D1 DE60333613 D1 DE 60333613D1
- Authority
- DE
- Germany
- Prior art keywords
- processor
- executing commands
- improve concurrency
- concurrency
- improve
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30094—Condition code generation, e.g. Carry, Zero flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Devices For Executing Special Programs (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002174927A JP3851228B2 (ja) | 2002-06-14 | 2002-06-14 | プロセッサ、プログラム変換装置及びプログラム変換方法、並びにコンピュータプログラム |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60333613D1 true DE60333613D1 (de) | 2010-09-16 |
Family
ID=29561823
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60333613T Expired - Lifetime DE60333613D1 (de) | 2002-06-14 | 2003-06-11 | Prozessor zur Verbesserung der Parallelität bei der Durchführung von Befehlen |
Country Status (5)
Country | Link |
---|---|
US (2) | US20040039900A1 (de) |
EP (1) | EP1372064B1 (de) |
JP (1) | JP3851228B2 (de) |
CN (1) | CN1316354C (de) |
DE (1) | DE60333613D1 (de) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7624356B1 (en) * | 2000-06-21 | 2009-11-24 | Microsoft Corporation | Task-sensitive methods and systems for displaying command sets |
EP1378824A1 (de) | 2002-07-02 | 2004-01-07 | STMicroelectronics S.r.l. | Verfahren zur Ausführung von Programmen in einem Mehrprozessorsystem, und entsprechenes Prozessorsystem |
EP1758395A1 (de) | 2004-06-28 | 2007-02-28 | Matsushita Electric Industrial Co., Ltd. | Programmerstellungsanordnung, programmtestanordnung, programmausführunsanordnung, informationverarbeitungsystem |
WO2006112045A1 (ja) * | 2005-03-31 | 2006-10-26 | Matsushita Electric Industrial Co., Ltd. | 演算処理装置 |
US7119723B1 (en) * | 2005-07-28 | 2006-10-10 | Texas Instruments Incorporated | Decoding variable length codes while using optimal resources |
JP4013972B2 (ja) * | 2005-09-22 | 2007-11-28 | ソナック株式会社 | プロセッサ、プロセッサでのプログラム実行方法 |
US8453131B2 (en) * | 2005-12-24 | 2013-05-28 | Intel Corporation | Method and apparatus for ordering code based on critical sections |
US7958181B2 (en) | 2006-09-21 | 2011-06-07 | Intel Corporation | Method and apparatus for performing logical compare operations |
US8037466B2 (en) | 2006-12-29 | 2011-10-11 | Intel Corporation | Method and apparatus for merging critical sections |
US7930522B2 (en) * | 2008-08-19 | 2011-04-19 | Freescale Semiconductor, Inc. | Method for speculative execution of instructions and a device having speculative execution capabilities |
GB2480285A (en) | 2010-05-11 | 2011-11-16 | Advanced Risc Mach Ltd | Conditional compare instruction which sets a condition code when it is not executed |
JP5813484B2 (ja) * | 2011-11-30 | 2015-11-17 | ルネサスエレクトロニクス株式会社 | Vliwプロセッサと命令構造と命令実行方法 |
JP2014164659A (ja) * | 2013-02-27 | 2014-09-08 | Renesas Electronics Corp | プロセッサ |
CN103853526B (zh) * | 2014-02-20 | 2017-02-15 | 清华大学 | 可重构处理器及可重构处理器的条件执行方法 |
US10203960B2 (en) | 2014-02-20 | 2019-02-12 | Tsinghua University | Reconfigurable processor and conditional execution method for the same |
JP2015201119A (ja) * | 2014-04-10 | 2015-11-12 | 富士通株式会社 | コンパイルプログラム、コンパイル方法およびコンパイル装置 |
US11086521B2 (en) | 2015-01-20 | 2021-08-10 | Ultrata, Llc | Object memory data flow instruction execution |
EP3998526A1 (de) | 2015-01-20 | 2022-05-18 | Ultrata LLC | Verteilter index für fehlertolerante objektspeichermatrix |
US9886210B2 (en) | 2015-06-09 | 2018-02-06 | Ultrata, Llc | Infinite memory fabric hardware implementation with router |
US10698628B2 (en) | 2015-06-09 | 2020-06-30 | Ultrata, Llc | Infinite memory fabric hardware implementation with memory |
US9971542B2 (en) | 2015-06-09 | 2018-05-15 | Ultrata, Llc | Infinite memory fabric streams and APIs |
JP6536266B2 (ja) | 2015-08-03 | 2019-07-03 | 富士通株式会社 | コンパイル装置、コンパイル方法およびコンパイルプログラム |
EP3387548B1 (de) | 2015-12-08 | 2023-08-02 | Ultrata LLC | Speichermatrixoperationen und kohärenz unter verwendung fehlertoleranter objekte |
US10235063B2 (en) | 2015-12-08 | 2019-03-19 | Ultrata, Llc | Memory fabric operations and coherency using fault tolerant objects |
US10241676B2 (en) | 2015-12-08 | 2019-03-26 | Ultrata, Llc | Memory fabric software implementation |
CA3006773A1 (en) | 2015-12-08 | 2017-06-15 | Ultrata, Llc | Memory fabric software implementation |
US11334469B2 (en) * | 2018-04-13 | 2022-05-17 | Microsoft Technology Licensing, Llc | Compound conditional reordering for faster short-circuiting |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4338661A (en) * | 1979-05-21 | 1982-07-06 | Motorola, Inc. | Conditional branch unit for microprogrammed data processor |
US4747046A (en) | 1985-06-28 | 1988-05-24 | Hewlett-Packard Company | Mechanism for comparing two registers and storing the result in a general purpose register without requiring a branch |
KR900007825B1 (ko) * | 1987-06-02 | 1990-10-20 | 산요덴끼 가부시끼가이샤 | 타이머부착 빵 제조기 |
US5961629A (en) * | 1991-07-08 | 1999-10-05 | Seiko Epson Corporation | High performance, superscalar-based computer system with out-of-order instruction execution |
US5345569A (en) * | 1991-09-20 | 1994-09-06 | Advanced Micro Devices, Inc. | Apparatus and method for resolving dependencies among a plurality of instructions within a storage device |
US5815695A (en) | 1993-10-28 | 1998-09-29 | Apple Computer, Inc. | Method and apparatus for using condition codes to nullify instructions based on results of previously-executed instructions on a computer processor |
JP2931890B2 (ja) * | 1995-07-12 | 1999-08-09 | 三菱電機株式会社 | データ処理装置 |
JP3442225B2 (ja) * | 1996-07-11 | 2003-09-02 | 株式会社日立製作所 | 演算処理装置 |
EP1645956A3 (de) * | 1997-08-29 | 2008-02-13 | Matsushita Electric Industrial Co., Ltd. | Anordnung zur Befehlsumwandlung um der Anzahl von Befehlsarten zu reduzieren |
CN1157641C (zh) * | 1997-09-03 | 2004-07-14 | 松下电器产业株式会社 | 处理器 |
US6366999B1 (en) | 1998-01-28 | 2002-04-02 | Bops, Inc. | Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution |
JP3830683B2 (ja) | 1998-12-28 | 2006-10-04 | 富士通株式会社 | Vliwプロセッサ |
TW530262B (en) | 1999-02-08 | 2003-05-01 | Matsushita Electric Ind Co Ltd | Control method for procedure execution |
JP2000305859A (ja) * | 1999-04-22 | 2000-11-02 | Matsushita Electric Ind Co Ltd | プロセッサ |
US6968545B1 (en) * | 2000-09-11 | 2005-11-22 | Agilent Technologies, Inc. | Method and apparatus for no-latency conditional branching |
-
2002
- 2002-06-14 JP JP2002174927A patent/JP3851228B2/ja not_active Expired - Fee Related
-
2003
- 2003-06-11 EP EP03253697A patent/EP1372064B1/de not_active Expired - Lifetime
- 2003-06-11 DE DE60333613T patent/DE60333613D1/de not_active Expired - Lifetime
- 2003-06-13 US US10/461,896 patent/US20040039900A1/en not_active Abandoned
- 2003-06-16 CN CNB031486371A patent/CN1316354C/zh not_active Expired - Fee Related
-
2008
- 2008-01-03 US US11/969,083 patent/US20080141229A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
EP1372064A3 (de) | 2005-06-29 |
CN1316354C (zh) | 2007-05-16 |
JP3851228B2 (ja) | 2006-11-29 |
CN1469241A (zh) | 2004-01-21 |
EP1372064B1 (de) | 2010-08-04 |
US20080141229A1 (en) | 2008-06-12 |
EP1372064A2 (de) | 2003-12-17 |
US20040039900A1 (en) | 2004-02-26 |
JP2004021553A (ja) | 2004-01-22 |
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