DE60320171D1 - Verfahren zum Detektieren von Fehlern in elektronischen Bauteilen, basierend auf Ruhestrom-Messungen - Google Patents
Verfahren zum Detektieren von Fehlern in elektronischen Bauteilen, basierend auf Ruhestrom-MessungenInfo
- Publication number
- DE60320171D1 DE60320171D1 DE60320171T DE60320171T DE60320171D1 DE 60320171 D1 DE60320171 D1 DE 60320171D1 DE 60320171 T DE60320171 T DE 60320171T DE 60320171 T DE60320171 T DE 60320171T DE 60320171 D1 DE60320171 D1 DE 60320171D1
- Authority
- DE
- Germany
- Prior art keywords
- sub
- electronic components
- components based
- quiescent current
- current measurements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
- G01R31/3008—Quiescent current [IDDQ] test or leakage current test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02447094 | 2002-05-23 | ||
EP02447094 | 2002-05-23 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60320171D1 true DE60320171D1 (de) | 2008-05-21 |
DE60320171T2 DE60320171T2 (de) | 2009-07-09 |
Family
ID=29797369
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60320171T Expired - Lifetime DE60320171T2 (de) | 2002-05-23 | 2003-05-23 | Verfahren zum Detektieren von Fehlern in elektronischen Bauteilen, basierend auf Ruhestrom-Messungen |
Country Status (3)
Country | Link |
---|---|
US (1) | US7315974B2 (de) |
AT (1) | ATE391927T1 (de) |
DE (1) | DE60320171T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6941235B2 (en) * | 2003-10-28 | 2005-09-06 | International Business Machines Corporation | Method and system for analyzing quiescent power plane current (IDDQ) test data in very-large scale integrated (VLSI) circuits |
JP4256328B2 (ja) | 2003-12-05 | 2009-04-22 | 株式会社東芝 | 電界効果トランジスタ、半導体装置及びフォトリレー |
US20150061711A1 (en) * | 2013-09-03 | 2015-03-05 | United States Of America As Represented By The Secretary Of The Navy | Overclocking as a Method for Determining Age in Microelectronics for Counterfeit Device Screening |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5731700A (en) * | 1994-03-14 | 1998-03-24 | Lsi Logic Corporation | Quiescent power supply current test method and apparatus for integrated circuits |
US5519333A (en) * | 1994-09-09 | 1996-05-21 | Sandia Corporation | Elevated voltage level IDDQ failure testing of integrated circuits |
US6043662A (en) * | 1996-09-18 | 2000-03-28 | Alers; Glenn Baldwin | Detecting defects in integrated circuits |
US5889409A (en) * | 1996-09-27 | 1999-03-30 | Intel Corporation | Leakage tracking device sample for IDDQ measurement and defect resolution |
US6342790B1 (en) * | 2000-04-13 | 2002-01-29 | Pmc-Sierra, Inc. | High-speed, adaptive IDDQ measurement |
US6812724B2 (en) * | 2002-02-22 | 2004-11-02 | Lan Rao | Method and system for graphical evaluation of IDDQ measurements |
-
2003
- 2003-05-22 US US10/444,473 patent/US7315974B2/en not_active Expired - Lifetime
- 2003-05-23 DE DE60320171T patent/DE60320171T2/de not_active Expired - Lifetime
- 2003-05-23 AT AT03447122T patent/ATE391927T1/de not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US20040006731A1 (en) | 2004-01-08 |
US7315974B2 (en) | 2008-01-01 |
ATE391927T1 (de) | 2008-04-15 |
DE60320171T2 (de) | 2009-07-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de | ||
8370 | Indication related to discontinuation of the patent is to be deleted | ||
8364 | No opposition during term of opposition |