DE60313812D1 - Methode zur erzeugung eines oszillator-taktsignales - Google Patents

Methode zur erzeugung eines oszillator-taktsignales

Info

Publication number
DE60313812D1
DE60313812D1 DE60313812T DE60313812T DE60313812D1 DE 60313812 D1 DE60313812 D1 DE 60313812D1 DE 60313812 T DE60313812 T DE 60313812T DE 60313812 T DE60313812 T DE 60313812T DE 60313812 D1 DE60313812 D1 DE 60313812D1
Authority
DE
Germany
Prior art keywords
clock
controlled oscillator
synchronizer
locked loop
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60313812T
Other languages
English (en)
Other versions
DE60313812T2 (de
DE60313812T3 (de
Inventor
Christopher Julian Travis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Application granted granted Critical
Publication of DE60313812D1 publication Critical patent/DE60313812D1/de
Publication of DE60313812T2 publication Critical patent/DE60313812T2/de
Publication of DE60313812T3 publication Critical patent/DE60313812T3/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/02Digital function generators
    • G06F1/025Digital function generators for functions having two-valued amplitude, e.g. Walsh functions
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03Astable circuits
    • H03K3/0307Stabilisation of output, e.g. using crystal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/083Details of the phase-locked loop the reference signal being additionally directly applied to the generator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0994Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising an accumulator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • H03L7/235Nested phase locked loops
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/902Spectral purity improvement for digital function generators by adding a dither signal, e.g. noise

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
  • Electric Clocks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Devices For Supply Of Signal Current (AREA)
DE60313812.8T 2003-04-02 2003-04-02 Methode zur erzeugung eines oszillator-taktsignales Expired - Lifetime DE60313812T3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
PCT/GB2003/001441 WO2004088845A1 (en) 2003-04-02 2003-04-02 Method of establishing an oscillator clock signal
EP03712441.9A EP1611684B3 (de) 2003-04-02 2003-04-02 Methode zur erzeugung eines oszillator-taktsignales

Publications (3)

Publication Number Publication Date
DE60313812D1 true DE60313812D1 (de) 2007-06-21
DE60313812T2 DE60313812T2 (de) 2008-01-24
DE60313812T3 DE60313812T3 (de) 2019-04-11

Family

ID=33104544

Family Applications (2)

Application Number Title Priority Date Filing Date
DE60331698T Expired - Lifetime DE60331698D1 (de) 2003-04-02 2003-04-02 Numerisch gesteuerter Oszillator und Verfahren zum Erzeugen eines Ereignis-Taktes
DE60313812.8T Expired - Lifetime DE60313812T3 (de) 2003-04-02 2003-04-02 Methode zur erzeugung eines oszillator-taktsignales

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE60331698T Expired - Lifetime DE60331698D1 (de) 2003-04-02 2003-04-02 Numerisch gesteuerter Oszillator und Verfahren zum Erzeugen eines Ereignis-Taktes

Country Status (6)

Country Link
US (6) US7495516B2 (de)
EP (2) EP1811670B1 (de)
AT (2) ATE460774T1 (de)
AU (1) AU2003217053A1 (de)
DE (2) DE60331698D1 (de)
WO (1) WO2004088845A1 (de)

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Also Published As

Publication number Publication date
EP1611684B1 (de) 2007-05-09
EP1611684B3 (de) 2019-01-02
EP1811670B1 (de) 2010-03-10
DE60331698D1 (de) 2010-04-22
US9407429B2 (en) 2016-08-02
US7924099B2 (en) 2011-04-12
WO2004088845A1 (en) 2004-10-14
US20090121792A1 (en) 2009-05-14
US20160323095A1 (en) 2016-11-03
DE60313812T2 (de) 2008-01-24
US20110156820A1 (en) 2011-06-30
US8618886B2 (en) 2013-12-31
US20060267640A1 (en) 2006-11-30
US20170373826A1 (en) 2017-12-28
US9768949B2 (en) 2017-09-19
DE60313812T3 (de) 2019-04-11
EP1811670A1 (de) 2007-07-25
EP1611684A1 (de) 2006-01-04
US7495516B2 (en) 2009-02-24
US10270585B2 (en) 2019-04-23
US20140105345A1 (en) 2014-04-17
ATE362222T1 (de) 2007-06-15
ATE460774T1 (de) 2010-03-15
AU2003217053A1 (en) 2004-10-25

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