DE60313812D1 - Methode zur erzeugung eines oszillator-taktsignales - Google Patents
Methode zur erzeugung eines oszillator-taktsignalesInfo
- Publication number
- DE60313812D1 DE60313812D1 DE60313812T DE60313812T DE60313812D1 DE 60313812 D1 DE60313812 D1 DE 60313812D1 DE 60313812 T DE60313812 T DE 60313812T DE 60313812 T DE60313812 T DE 60313812T DE 60313812 D1 DE60313812 D1 DE 60313812D1
- Authority
- DE
- Germany
- Prior art keywords
- clock
- controlled oscillator
- synchronizer
- locked loop
- analog
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title abstract 2
- 238000009432 framing Methods 0.000 abstract 1
- 238000001228 spectrum Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/025—Digital function generators for functions having two-valued amplitude, e.g. Walsh functions
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0307—Stabilisation of output, e.g. using crystal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/083—Details of the phase-locked loop the reference signal being additionally directly applied to the generator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
- H03L7/0994—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising an accumulator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
- H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
- H03L7/235—Nested phase locked loops
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2211/00—Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
- G06F2211/902—Spectral purity improvement for digital function generators by adding a dither signal, e.g. noise
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
- Electric Clocks (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Devices For Supply Of Signal Current (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/GB2003/001441 WO2004088845A1 (en) | 2003-04-02 | 2003-04-02 | Method of establishing an oscillator clock signal |
EP03712441.9A EP1611684B3 (de) | 2003-04-02 | 2003-04-02 | Methode zur erzeugung eines oszillator-taktsignales |
Publications (3)
Publication Number | Publication Date |
---|---|
DE60313812D1 true DE60313812D1 (de) | 2007-06-21 |
DE60313812T2 DE60313812T2 (de) | 2008-01-24 |
DE60313812T3 DE60313812T3 (de) | 2019-04-11 |
Family
ID=33104544
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60331698T Expired - Lifetime DE60331698D1 (de) | 2003-04-02 | 2003-04-02 | Numerisch gesteuerter Oszillator und Verfahren zum Erzeugen eines Ereignis-Taktes |
DE60313812.8T Expired - Lifetime DE60313812T3 (de) | 2003-04-02 | 2003-04-02 | Methode zur erzeugung eines oszillator-taktsignales |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60331698T Expired - Lifetime DE60331698D1 (de) | 2003-04-02 | 2003-04-02 | Numerisch gesteuerter Oszillator und Verfahren zum Erzeugen eines Ereignis-Taktes |
Country Status (6)
Country | Link |
---|---|
US (6) | US7495516B2 (de) |
EP (2) | EP1811670B1 (de) |
AT (2) | ATE460774T1 (de) |
AU (1) | AU2003217053A1 (de) |
DE (2) | DE60331698D1 (de) |
WO (1) | WO2004088845A1 (de) |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU2003217053A1 (en) | 2003-04-02 | 2004-10-25 | Christopher Julian Travis | Method of establishing an oscillator clock signal |
GB2409383B (en) | 2003-12-17 | 2006-06-21 | Wolfson Ltd | Clock synchroniser |
US7421464B2 (en) * | 2004-09-30 | 2008-09-02 | Motorola, Inc. | System and method for introducing dither for reducing spurs in digital-to-time converter direct digital synthesis |
US7558358B1 (en) | 2004-10-13 | 2009-07-07 | Cirrus Logic, Inc. | Method and apparatus for generating a clock signal according to an ideal frequency ratio |
DE102006019475B4 (de) * | 2006-04-26 | 2008-08-28 | Nokia Siemens Networks Gmbh & Co.Kg | Verfahren zur Synchronisation von Baugruppen einer Basisstation |
US7680236B1 (en) | 2006-09-25 | 2010-03-16 | Cirrus Logic, Inc. | Hybrid analog/digital phase-lock loop for low-jitter synchronization |
US7599462B2 (en) | 2006-09-25 | 2009-10-06 | Cirrus Logic, Inc. | Hybrid analog/digital phase-lock loop with high-level event synchronization |
WO2008077411A2 (en) * | 2006-12-22 | 2008-07-03 | The Tc Group A/S | Method of extracting data from a serial data stream |
US7746972B1 (en) | 2007-03-22 | 2010-06-29 | Cirrus Logic, Inc. | Numerically-controlled phase-lock loop with input timing reference-dependent ratio adjustment |
US8193866B2 (en) * | 2007-10-16 | 2012-06-05 | Mediatek Inc. | All-digital phase-locked loop |
US8824511B2 (en) * | 2008-03-27 | 2014-09-02 | Nec Corporation | Clock synchronization system, node, clock synchronization method, and program |
US7848266B2 (en) * | 2008-07-25 | 2010-12-07 | Analog Devices, Inc. | Frequency synthesizers for wireless communication systems |
US7890279B1 (en) * | 2008-08-11 | 2011-02-15 | Altera Corporation | Jitter estimation in phase-locked loops |
US8254732B2 (en) * | 2009-03-11 | 2012-08-28 | Citizen Holdings Co., Ltd. | Phase modulator and optical modulation device |
US8355478B1 (en) | 2009-05-29 | 2013-01-15 | Honeywell International Inc. | Circuit for aligning clock to parallel data |
EP2467976B1 (de) | 2009-08-21 | 2019-10-09 | Aviat Networks, Inc. | Synchronisationsverteilung in mikrowellen-backhaul-netzwerken |
US8188796B2 (en) * | 2010-07-19 | 2012-05-29 | Analog Devices, Inc. | Digital phase-locked loop clock system |
US8909509B2 (en) | 2010-10-01 | 2014-12-09 | Rockwell Automation Technologies, Inc. | Dynamically selecting master clock to manage non-linear simulation clocks |
US8476945B2 (en) | 2011-03-23 | 2013-07-02 | International Business Machines Corporation | Phase profile generator |
KR101749583B1 (ko) * | 2011-05-30 | 2017-06-21 | 삼성전자주식회사 | 시간차 가산기, 시간차 누산기, 시그마-델타 타임 디지털 변환기, 디지털 위상 고정 루프 및 온도 센서 |
US8427252B2 (en) | 2011-05-31 | 2013-04-23 | Qualcomm Incorporated | Oscillators with low power mode of operation |
US8514329B2 (en) | 2011-05-31 | 2013-08-20 | Motorola Mobility Llc | Jitter estimation for MPEG receivers |
KR101467547B1 (ko) * | 2013-08-30 | 2014-12-01 | 포항공과대학교 산학협력단 | 주입 고정식 디지털 주파수 신시사이저 회로 |
US9350364B1 (en) * | 2015-04-07 | 2016-05-24 | Adtran, Inc. | Phase-locked loop circuit having low close-in phase noise |
CN108023723B (zh) * | 2016-11-04 | 2021-07-09 | 华为技术有限公司 | 频率同步的方法以及从时钟 |
WO2018090037A1 (en) | 2016-11-14 | 2018-05-17 | Marvell World Trade Ltd. | Systems and methods for phase synchronization of local oscillator paths in oscillator-operated circuits |
US10020813B1 (en) | 2017-01-09 | 2018-07-10 | Microsoft Technology Licensing, Llc | Scaleable DLL clocking system |
US11079723B2 (en) | 2018-02-06 | 2021-08-03 | Integrated Device Technology, Inc. | Apparatus and methods for automatic time measurements |
CN110312068B (zh) * | 2018-03-20 | 2021-09-28 | 罗伯特·博世有限公司 | 图像捕获设备和处理方法 |
US10404261B1 (en) * | 2018-06-01 | 2019-09-03 | Yekutiel Josefsberg | Radar target detection system for autonomous vehicles with ultra low phase noise frequency synthesizer |
US10205457B1 (en) * | 2018-06-01 | 2019-02-12 | Yekutiel Josefsberg | RADAR target detection system for autonomous vehicles with ultra lowphase noise frequency synthesizer |
KR102546646B1 (ko) * | 2018-08-28 | 2023-06-23 | 매그나칩 반도체 유한회사 | 오실레이터 주파수 컨트롤러를 포함하는 디스플레이 구동 ic |
US10651861B2 (en) * | 2018-10-15 | 2020-05-12 | Analog Devices, Inc. | Filterless digital phase-locked loop |
FR3098665B1 (fr) * | 2019-07-09 | 2021-07-30 | St Microelectronics Rousset | Procédé de gestion du démarrage d’une boucle à verrouillage de phase, et circuit intégré correspondant |
CN111181552B (zh) * | 2020-01-08 | 2023-03-24 | 电子科技大学 | 一种双向频率同步振荡器电路 |
US11251784B2 (en) | 2020-03-09 | 2022-02-15 | Stmicroelectronics International N.V. | Programmable-on-the-fly fractional divider in accordance with this disclosure |
FR3112044B1 (fr) * | 2020-06-24 | 2023-10-27 | St Microelectronics Rousset | Procédé de gestion du démarrage d’une boucle à verrouillage de phase, et circuit intégré correspondant |
CN112769515A (zh) * | 2020-12-24 | 2021-05-07 | 上海微波技术研究所(中国电子科技集团公司第五十研究所) | 基于无线电台的双向授时与测距系统及方法 |
US11764834B2 (en) | 2022-02-15 | 2023-09-19 | Raytheon Company | Device for and method of synchronizing multiple beamforming devices |
WO2023183498A1 (en) * | 2022-03-23 | 2023-09-28 | The Regents Of The University Of Michigan | Receiver synchronization for light communications |
WO2024091435A1 (en) * | 2022-10-28 | 2024-05-02 | Orolia Usa Inc. | Multiple and cascaded redundant disciplined oscillator systems in a spoofing resistant reference time source system and methods |
Family Cites Families (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU560682B2 (en) | 1982-07-13 | 1987-04-16 | Allied Corporation | Two piece chilled casting wheel |
US4652832A (en) * | 1985-07-05 | 1987-03-24 | Motorola, Inc. | Frequency resolution in a digital oscillator |
US4888564A (en) * | 1987-11-06 | 1989-12-19 | Victor Company Of Japan, Ltd. | Phase-locked loop circuit |
US4901265A (en) * | 1987-12-14 | 1990-02-13 | Qualcomm, Inc. | Pseudorandom dither for frequency synthesis noise |
US4970474A (en) * | 1989-08-14 | 1990-11-13 | Delco Electronics Corporation | Analog/digital phase locked loop |
JP2993200B2 (ja) | 1991-07-31 | 1999-12-20 | 日本電気株式会社 | 位相同期ループ |
AU674322B2 (en) * | 1992-06-02 | 1996-12-19 | Telefonaktiebolaget Lm Ericsson (Publ) | Clock extraction circuit for fiber optical receivers |
FI93505C (fi) * | 1993-05-03 | 1995-04-10 | Nokia Telecommunications Oy | Numeerisesti ohjattu oskillaattori ja digitaalinen vaihelukittu silmukka |
AU6339594A (en) * | 1993-06-09 | 1994-12-15 | Alcatel N.V. | Synchronized clock |
US5394106A (en) * | 1993-08-31 | 1995-02-28 | Gadzoox Microsystems | Apparatus and method for synthesis of signals with programmable periods |
US5625358A (en) * | 1993-09-13 | 1997-04-29 | Analog Devices, Inc. | Digital phase-locked loop utilizing a high order sigma-delta modulator |
DE4431415C2 (de) * | 1994-08-24 | 1997-01-23 | Deutsche Telephonwerk Kabel | Verfahren zum Synchronisieren der Ausgangsfrequenzen eines Taktgenerators |
US5638010A (en) * | 1995-06-07 | 1997-06-10 | Analog Devices, Inc. | Digitally controlled oscillator for a phase-locked loop providing a residue signal for use in continuously variable interpolation and decimation filters |
GB9616537D0 (en) * | 1996-08-06 | 1996-09-25 | Digi Media Vision Ltd | Digital synthesiser |
FR2765419B1 (fr) * | 1997-06-27 | 1999-09-17 | Thomson Csf | Dispositif de generation de signaux analogiques a partir de convertisseurs analogique-numerique, notamment pour la synthese numerique directe |
US5825253A (en) * | 1997-07-15 | 1998-10-20 | Qualcomm Incorporated | Phase-locked-loop with noise shaper |
US6094569A (en) * | 1997-08-12 | 2000-07-25 | U.S. Philips Corporation | Multichannel radio device, a radio communication system, and a fractional division frequency synthesizer |
US6100767A (en) * | 1997-09-29 | 2000-08-08 | Sanyo Electric Co., Ltd. | Phase-locked loop with improved trade-off between lock-up time and power dissipation |
US5986512A (en) * | 1997-12-12 | 1999-11-16 | Telefonaktiebolaget L M Ericsson (Publ) | Σ-Δ modulator-controlled phase-locked-loop circuit |
WO1999033182A2 (en) | 1997-12-22 | 1999-07-01 | Koninklijke Philips Electronics N.V. | Circuit including a discrete time oscillator |
FR2780831B1 (fr) * | 1998-07-03 | 2000-09-29 | Thomson Csf | Synthetiseur numerique de signaux |
DE19842711C2 (de) * | 1998-09-17 | 2002-01-31 | Infineon Technologies Ag | Schaltung zur Datensignalrückgewinnung und Taktsignalregenerierung |
DE19913110C1 (de) * | 1999-03-23 | 2000-11-16 | Siemens Ag | Frequenzsynthesizer |
US6594330B1 (en) * | 1999-10-26 | 2003-07-15 | Agere Systems Inc. | Phase-locked loop with digitally controlled, frequency-multiplying oscillator |
US6396313B1 (en) * | 2000-08-24 | 2002-05-28 | Teradyne, Inc. | Noise-shaped digital frequency synthesis |
JP4526194B2 (ja) * | 2001-01-11 | 2010-08-18 | ルネサスエレクトロニクス株式会社 | オーバーサンプリングクロックリカバリ方法及び回路 |
CA2437793C (en) * | 2001-02-08 | 2010-07-20 | Sensormatic Electronics Corporation | Automatic wireless synchronization of electronic article surveillance systems |
DE60108728T2 (de) * | 2001-06-15 | 2006-05-11 | Lucent Technologies Inc. | Verfahren und ein Vorrichtung zum Übersenden und Empfangen gemultiplexter untergeordneter Signale |
US20030063701A1 (en) * | 2001-08-30 | 2003-04-03 | Eubanks John M. | Method and apparatus for minimizing jitter and wander in a clock source |
US6741109B1 (en) * | 2002-02-28 | 2004-05-25 | Silicon Laboratories, Inc. | Method and apparatus for switching between input clocks in a phase-locked loop |
US6674332B1 (en) * | 2002-09-06 | 2004-01-06 | Cypress Semiconductor, Corp. | Robust clock circuit architecture |
US6833764B1 (en) * | 2002-12-16 | 2004-12-21 | Advanced Micro Devices, Inc. | Apparatus and method for synthesizing a frequency using vernier dividers |
AU2003217053A1 (en) | 2003-04-02 | 2004-10-25 | Christopher Julian Travis | Method of establishing an oscillator clock signal |
-
2003
- 2003-04-02 AU AU2003217053A patent/AU2003217053A1/en not_active Abandoned
- 2003-04-02 DE DE60331698T patent/DE60331698D1/de not_active Expired - Lifetime
- 2003-04-02 DE DE60313812.8T patent/DE60313812T3/de not_active Expired - Lifetime
- 2003-04-02 US US10/552,364 patent/US7495516B2/en not_active Expired - Lifetime
- 2003-04-02 AT AT07008943T patent/ATE460774T1/de not_active IP Right Cessation
- 2003-04-02 AT AT03712441T patent/ATE362222T1/de not_active IP Right Cessation
- 2003-04-02 WO PCT/GB2003/001441 patent/WO2004088845A1/en active IP Right Grant
- 2003-04-02 EP EP07008943A patent/EP1811670B1/de not_active Expired - Lifetime
- 2003-04-02 EP EP03712441.9A patent/EP1611684B3/de not_active Expired - Lifetime
-
2009
- 2009-01-12 US US12/352,157 patent/US7924099B2/en not_active Expired - Fee Related
-
2011
- 2011-03-07 US US13/041,578 patent/US8618886B2/en not_active Expired - Lifetime
-
2013
- 2013-12-13 US US14/106,229 patent/US9407429B2/en not_active Expired - Fee Related
-
2016
- 2016-07-08 US US15/205,126 patent/US9768949B2/en not_active Expired - Lifetime
-
2017
- 2017-09-07 US US15/698,465 patent/US10270585B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1611684B1 (de) | 2007-05-09 |
EP1611684B3 (de) | 2019-01-02 |
EP1811670B1 (de) | 2010-03-10 |
DE60331698D1 (de) | 2010-04-22 |
US9407429B2 (en) | 2016-08-02 |
US7924099B2 (en) | 2011-04-12 |
WO2004088845A1 (en) | 2004-10-14 |
US20090121792A1 (en) | 2009-05-14 |
US20160323095A1 (en) | 2016-11-03 |
DE60313812T2 (de) | 2008-01-24 |
US20110156820A1 (en) | 2011-06-30 |
US8618886B2 (en) | 2013-12-31 |
US20060267640A1 (en) | 2006-11-30 |
US20170373826A1 (en) | 2017-12-28 |
US9768949B2 (en) | 2017-09-19 |
DE60313812T3 (de) | 2019-04-11 |
EP1811670A1 (de) | 2007-07-25 |
EP1611684A1 (de) | 2006-01-04 |
US7495516B2 (en) | 2009-02-24 |
US10270585B2 (en) | 2019-04-23 |
US20140105345A1 (en) | 2014-04-17 |
ATE362222T1 (de) | 2007-06-15 |
ATE460774T1 (de) | 2010-03-15 |
AU2003217053A1 (en) | 2004-10-25 |
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