DE60208624D1 - Vorrichtung und Verfahren zur Verhandlung von Geschwindigkeit - Google Patents
Vorrichtung und Verfahren zur Verhandlung von GeschwindigkeitInfo
- Publication number
- DE60208624D1 DE60208624D1 DE60208624T DE60208624T DE60208624D1 DE 60208624 D1 DE60208624 D1 DE 60208624D1 DE 60208624 T DE60208624 T DE 60208624T DE 60208624 T DE60208624 T DE 60208624T DE 60208624 D1 DE60208624 D1 DE 60208624D1
- Authority
- DE
- Germany
- Prior art keywords
- negotiating
- speed
- negotiating speed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
- H04L12/16—Arrangements for providing special services to substations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Communication Control (AREA)
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US27626701P | 2001-03-15 | 2001-03-15 | |
US276267P | 2001-03-15 | ||
US09/973,563 US6999407B2 (en) | 2001-03-15 | 2001-10-09 | Speed negotiation device and method |
US973563 | 2001-10-09 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60208624D1 true DE60208624D1 (de) | 2006-04-06 |
DE60208624T2 DE60208624T2 (de) | 2006-11-09 |
Family
ID=26957884
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60208624T Expired - Lifetime DE60208624T2 (de) | 2001-03-15 | 2002-03-04 | Vorrichtung und Verfahren zur Verhandlung von Geschwindigkeit |
Country Status (6)
Country | Link |
---|---|
US (1) | US6999407B2 (de) |
EP (1) | EP1241794B1 (de) |
JP (1) | JP3941862B2 (de) |
KR (1) | KR100434497B1 (de) |
DE (1) | DE60208624T2 (de) |
TW (1) | TWI229986B (de) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6999407B2 (en) * | 2001-03-15 | 2006-02-14 | Samsung Electronics Co., Ltd. | Speed negotiation device and method |
DE10147643C2 (de) * | 2001-09-27 | 2003-10-09 | Infineon Technologies Ag | Multiplexerzelle und Multiplexer-Schaltungsanordnung |
TWI221966B (en) * | 2003-08-28 | 2004-10-11 | Sunplus Technology Co Ltd | Device for encrypting/protecting program with protection bit codes |
US20060195631A1 (en) * | 2005-01-31 | 2006-08-31 | Ramasubramanian Rajamani | Memory buffers for merging local data from memory modules |
US7734944B2 (en) * | 2006-06-27 | 2010-06-08 | International Business Machines Corporation | Mechanism for windaging of a double rate driver |
US7783911B2 (en) * | 2006-06-27 | 2010-08-24 | International Business Machines Corporation | Programmable bus driver launch delay/cycle delay to reduce elastic interface elasticity requirements |
US7739538B2 (en) * | 2006-06-27 | 2010-06-15 | International Business Machines Corporation | Double data rate chaining for synchronous DDR interfaces |
US7752475B2 (en) * | 2006-06-27 | 2010-07-06 | International Business Machines Corporation | Late data launch for a double data rate elastic interface |
US7882322B2 (en) * | 2006-06-27 | 2011-02-01 | International Business Machines Corporation | Early directory access of a double data rate elastic interface |
JP4437480B2 (ja) * | 2006-08-03 | 2010-03-24 | 富士通株式会社 | パケット伝送装置及びその制御方法 |
CN101802771B (zh) * | 2007-05-03 | 2013-03-13 | 快捷半导体有限公司 | 交错、串行化和去串行化照相机和键区数据的方法和电路 |
US7836199B2 (en) * | 2008-09-24 | 2010-11-16 | Applied Micro Circuits Corporation | System and method for multilane link rate negotiation |
US7849209B2 (en) * | 2008-09-24 | 2010-12-07 | Applied Micro Circuits Corporation | System and method for link rate negotiation |
US8826057B1 (en) * | 2012-03-30 | 2014-09-02 | Integrated Device Technology Inc. | Multiple time domain synchronizer circuits |
US8943242B1 (en) | 2012-03-30 | 2015-01-27 | Integrated Device Technology Inc. | Timing controllers having partitioned pipelined delay chains therein |
US9692418B1 (en) * | 2014-08-20 | 2017-06-27 | Altera Corporation | Pipelined interconnect circuitry with double data rate interconnections |
KR102283018B1 (ko) | 2021-02-22 | 2021-07-28 | 주식회사 금룡 | 천연 잔디 또는 하이브리드 잔디 시스템의 토양 개량용 충진재 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5159278A (en) | 1991-04-02 | 1992-10-27 | Vlsi Technology, Inc. | State machine architecture providing increased resolution of output timing |
DE4123007C2 (de) | 1991-07-11 | 1995-04-27 | Siemens Ag | Verfahren und Anordnung zur Anpassung von Datenraten |
US5726991A (en) * | 1993-06-07 | 1998-03-10 | At&T Global Information Solutions Company | Integral bit error rate test system for serial data communication links |
US5541957A (en) * | 1994-06-15 | 1996-07-30 | National Semiconductor Corporation | Apparatus for transmitting and/or receiving data at different data transfer rates especially in applications such as dual-rate ethernet local-area networks |
US5563594A (en) * | 1994-08-31 | 1996-10-08 | Motorola | Circuit and method of timing data transfers |
US5982309A (en) * | 1998-01-09 | 1999-11-09 | Iowa State University Research Foundation, Inc. | Parallel-to-serial CMOS data converter with a selectable bit width mode D flip-flop M matrix |
JP2000124913A (ja) * | 1998-10-16 | 2000-04-28 | Sony Corp | デジタルシリアルデータのインターフェース装置及びデータ転送速度選択方法 |
US6658045B1 (en) * | 1999-02-22 | 2003-12-02 | Nortel Networks Limited | CDMA communications system adaptive to mobile unit speed |
WO2001028142A1 (fr) * | 1999-10-14 | 2001-04-19 | Fujitsu Limited | Procede et dispositif de raccordement de circuit |
JP3814470B2 (ja) * | 2000-08-09 | 2006-08-30 | 富士通株式会社 | データ転送方法及びデータ転送装置 |
US6999407B2 (en) * | 2001-03-15 | 2006-02-14 | Samsung Electronics Co., Ltd. | Speed negotiation device and method |
-
2001
- 2001-10-09 US US09/973,563 patent/US6999407B2/en not_active Expired - Lifetime
-
2002
- 2002-02-08 KR KR10-2002-0007529A patent/KR100434497B1/ko not_active IP Right Cessation
- 2002-03-01 TW TW091103741A patent/TWI229986B/zh not_active IP Right Cessation
- 2002-03-04 EP EP02251491A patent/EP1241794B1/de not_active Expired - Lifetime
- 2002-03-04 DE DE60208624T patent/DE60208624T2/de not_active Expired - Lifetime
- 2002-03-15 JP JP2002072902A patent/JP3941862B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP1241794B1 (de) | 2006-01-11 |
JP3941862B2 (ja) | 2007-07-04 |
US20020130795A1 (en) | 2002-09-19 |
US6999407B2 (en) | 2006-02-14 |
KR100434497B1 (ko) | 2004-06-05 |
EP1241794A2 (de) | 2002-09-18 |
DE60208624T2 (de) | 2006-11-09 |
TWI229986B (en) | 2005-03-21 |
EP1241794A3 (de) | 2003-09-10 |
JP2002353929A (ja) | 2002-12-06 |
KR20020074063A (ko) | 2002-09-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |