DE602006004748D1 - Vierstufiger logischer decoder - Google Patents

Vierstufiger logischer decoder

Info

Publication number
DE602006004748D1
DE602006004748D1 DE602006004748T DE602006004748T DE602006004748D1 DE 602006004748 D1 DE602006004748 D1 DE 602006004748D1 DE 602006004748 T DE602006004748 T DE 602006004748T DE 602006004748 T DE602006004748 T DE 602006004748T DE 602006004748 D1 DE602006004748 D1 DE 602006004748D1
Authority
DE
Germany
Prior art keywords
data signal
bit
signals
level
input data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006004748T
Other languages
English (en)
Inventor
Robert Gruijl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Publication of DE602006004748D1 publication Critical patent/DE602006004748D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/02—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word
    • H03M7/06—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word the radix thereof being a positive integer different from two

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Error Detection And Correction (AREA)
DE602006004748T 2005-07-22 2006-07-21 Vierstufiger logischer decoder Active DE602006004748D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US70205205P 2005-07-22 2005-07-22
US73545305P 2005-11-10 2005-11-10
PCT/IB2006/052515 WO2007010503A2 (en) 2005-07-22 2006-07-21 4-level logic decoder

Publications (1)

Publication Number Publication Date
DE602006004748D1 true DE602006004748D1 (de) 2009-02-26

Family

ID=37669220

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006004748T Active DE602006004748D1 (de) 2005-07-22 2006-07-21 Vierstufiger logischer decoder

Country Status (7)

Country Link
US (1) US7550997B2 (de)
EP (1) EP1911164B1 (de)
JP (1) JP2009503927A (de)
CN (1) CN101228698B (de)
AT (1) ATE420495T1 (de)
DE (1) DE602006004748D1 (de)
WO (1) WO2007010503A2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE602004022311D1 (de) * 2004-12-13 2009-09-10 Alcatel Lucent Vorrichtung zur Identifikation eines Trägers
US7823003B1 (en) * 2007-01-23 2010-10-26 3Par, Inc. Voltage referencing clock for source-synchronous multi-level signal buses
KR100859941B1 (ko) * 2007-04-10 2008-09-23 삼성에스디아이 주식회사 인터페이스 시스템 및 이를 이용한 평판 표시장치
DE102015202219A1 (de) * 2015-02-09 2016-08-11 Robert Bosch Gmbh Teilnehmerstation für ein Bussystem und Verfahren zur zeitoptimierten Datenübertragung in einem Bussystem
CN108964634B (zh) * 2017-05-26 2022-02-18 瑞昱半导体股份有限公司 数据还原电路

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6185259B1 (en) * 1996-06-12 2001-02-06 Ericsson Inc. Transmitter/receiver for GMSK and offset-QAM
JP2000341136A (ja) * 1999-05-27 2000-12-08 Sony Corp 復号装置及びデータの復号方法
US7260155B2 (en) * 2001-08-17 2007-08-21 Synopsys, Inc. Method and apparatus for encoding and decoding digital communications data

Also Published As

Publication number Publication date
WO2007010503A2 (en) 2007-01-25
ATE420495T1 (de) 2009-01-15
US7550997B2 (en) 2009-06-23
JP2009503927A (ja) 2009-01-29
EP1911164A2 (de) 2008-04-16
EP1911164B1 (de) 2009-01-07
CN101228698B (zh) 2011-09-28
CN101228698A (zh) 2008-07-23
US20080211543A1 (en) 2008-09-04
WO2007010503A3 (en) 2007-07-05

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Legal Events

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8364 No opposition during term of opposition