DE602006001266D1 - Gekapselter Chip mit interner Induktanz - Google Patents

Gekapselter Chip mit interner Induktanz

Info

Publication number
DE602006001266D1
DE602006001266D1 DE602006001266T DE602006001266T DE602006001266D1 DE 602006001266 D1 DE602006001266 D1 DE 602006001266D1 DE 602006001266 T DE602006001266 T DE 602006001266T DE 602006001266 T DE602006001266 T DE 602006001266T DE 602006001266 D1 DE602006001266 D1 DE 602006001266D1
Authority
DE
Germany
Prior art keywords
substrate
packaging
sealing portion
circuit element
internal inductance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006001266T
Other languages
English (en)
Inventor
Dong-Ha Sim
Duck-Hwan Kim
In-Sang Song
Yun-Kwon Park
Seok-Chul Yun
Kuang-Woo Nam
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE602006001266D1 publication Critical patent/DE602006001266D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/645Inductive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/02Casings
    • H01F27/027Casings specially adapted for combination of signal type inductors or transformers with electronic circuits, e.g. mounting on printed circuit boards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Coils Or Transformers For Communication (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE602006001266T 2005-07-19 2006-07-07 Gekapselter Chip mit interner Induktanz Active DE602006001266D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050065508A KR100699488B1 (ko) 2005-07-19 2005-07-19 인덕터를 구비한 패키징 칩

Publications (1)

Publication Number Publication Date
DE602006001266D1 true DE602006001266D1 (de) 2008-07-03

Family

ID=37401294

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006001266T Active DE602006001266D1 (de) 2005-07-19 2006-07-07 Gekapselter Chip mit interner Induktanz

Country Status (6)

Country Link
US (1) US7541662B2 (de)
EP (1) EP1746866B1 (de)
JP (1) JP4448110B2 (de)
KR (1) KR100699488B1 (de)
AT (1) ATE396605T1 (de)
DE (1) DE602006001266D1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010106484A1 (en) * 2009-03-18 2010-09-23 Nxp B.V. Bond frame integrated in electronic circuit
US8824161B2 (en) 2012-06-15 2014-09-02 Medtronic, Inc. Integrated circuit packaging for implantable medical devices
DE112018007440T5 (de) * 2018-04-06 2020-12-17 Mitsubishi Electric Corporation Halbleitervorrichtung

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3349481A (en) * 1964-12-29 1967-10-31 Alpha Microelectronics Company Integrated circuit sealing method and structure
US3601522A (en) 1970-06-18 1971-08-24 American Lava Corp Composite ceramic package breakaway notch
US3760090A (en) 1971-08-19 1973-09-18 Globe Union Inc Electronic circuit package and method for making same
JPS5764953A (en) 1980-10-09 1982-04-20 Oki Electric Ind Co Ltd Semiconductor device
US4977441A (en) 1985-12-25 1990-12-11 Hitachi, Ltd. Semiconductor device and tape carrier
US5679975A (en) * 1995-12-18 1997-10-21 Integrated Device Technology, Inc. Conductive encapsulating shield for an integrated circuit
JPH09204755A (ja) 1996-01-25 1997-08-05 Sony Corp テープ状記録媒体
US5864092A (en) * 1996-05-16 1999-01-26 Sawtek Inc. Leadless ceramic chip carrier crosstalk suppression apparatus
JPH10149661A (ja) 1996-11-15 1998-06-02 Kao Corp テープカートリッジ
JP3614633B2 (ja) 1997-12-22 2005-01-26 富士写真フイルム株式会社 磁気テープカートリッジ
JP3609935B2 (ja) * 1998-03-10 2005-01-12 シャープ株式会社 高周波半導体装置
KR100516793B1 (ko) 1999-07-09 2005-09-26 후지 샤신 필름 가부시기가이샤 자기 테이프 카트리지
US6362525B1 (en) * 1999-11-09 2002-03-26 Cypress Semiconductor Corp. Circuit structure including a passive element formed within a grid array substrate and method for making the same
US6515870B1 (en) * 2000-11-27 2003-02-04 Intel Corporation Package integrated faraday cage to reduce electromagnetic emissions from an integrated circuit
US6840472B2 (en) 2001-01-30 2005-01-11 Fuji Photo Film Co., Ltd. Magnetic tape cartridge
US6856007B2 (en) * 2001-08-28 2005-02-15 Tessera, Inc. High-frequency chip packages
US6592063B2 (en) 2001-10-02 2003-07-15 Mitsumi Electric Co., Ltd. Chucking confirming method
US6724077B2 (en) * 2001-11-09 2004-04-20 Intel Corporation Semiconductor package having multi-signal bus bars
US6911733B2 (en) * 2002-02-28 2005-06-28 Hitachi, Ltd. Semiconductor device and electronic device
US6568617B1 (en) 2002-03-28 2003-05-27 Imation Corp. Leader with smoothing indenture

Also Published As

Publication number Publication date
US20070018281A1 (en) 2007-01-25
EP1746866A1 (de) 2007-01-24
JP2007027762A (ja) 2007-02-01
ATE396605T1 (de) 2008-06-15
KR100699488B1 (ko) 2007-03-26
KR20070010711A (ko) 2007-01-24
US7541662B2 (en) 2009-06-02
EP1746866B1 (de) 2008-05-21
JP4448110B2 (ja) 2010-04-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition