DE602005017923D1 - Schreibschutz durch verwendung eines zweisignal-stlement mit parameteränderungsfähigkeit, chipauswahl und wählbares schreiben in nichtflüchtigem speicher - Google Patents

Schreibschutz durch verwendung eines zweisignal-stlement mit parameteränderungsfähigkeit, chipauswahl und wählbares schreiben in nichtflüchtigem speicher

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Publication number
DE602005017923D1
DE602005017923D1 DE602005017923T DE602005017923T DE602005017923D1 DE 602005017923 D1 DE602005017923 D1 DE 602005017923D1 DE 602005017923 T DE602005017923 T DE 602005017923T DE 602005017923 T DE602005017923 T DE 602005017923T DE 602005017923 D1 DE602005017923 D1 DE 602005017923D1
Authority
DE
Germany
Prior art keywords
write
volatile memory
parameter
changeability
chip selection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005017923T
Other languages
English (en)
Inventor
James Simons
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microchip Technology Inc
Original Assignee
Microchip Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microchip Technology Inc filed Critical Microchip Technology Inc
Publication of DE602005017923D1 publication Critical patent/DE602005017923D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1731—Optimisation thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Security & Cryptography (AREA)
  • Read Only Memory (AREA)
  • Storage Device Security (AREA)
DE602005017923T 2004-09-30 2005-09-01 Schreibschutz durch verwendung eines zweisignal-stlement mit parameteränderungsfähigkeit, chipauswahl und wählbares schreiben in nichtflüchtigem speicher Active DE602005017923D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/954,584 US7091740B2 (en) 2004-07-30 2004-09-30 Write protection using a two signal control protocol for an integrated circuit device having parameter change capability, chip select and selectable write to non-volatile memory
PCT/US2005/031917 WO2006039075A1 (en) 2004-09-30 2005-09-01 Write protection using a two signal control protocol for an integrated circuit device having parameter change capability, chip select and selectable write to non-volatile memory

Publications (1)

Publication Number Publication Date
DE602005017923D1 true DE602005017923D1 (de) 2010-01-07

Family

ID=35788065

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005017923T Active DE602005017923D1 (de) 2004-09-30 2005-09-01 Schreibschutz durch verwendung eines zweisignal-stlement mit parameteränderungsfähigkeit, chipauswahl und wählbares schreiben in nichtflüchtigem speicher

Country Status (7)

Country Link
US (1) US7091740B2 (de)
EP (1) EP1805768B1 (de)
CN (1) CN100514497C (de)
AT (1) ATE450045T1 (de)
DE (1) DE602005017923D1 (de)
TW (1) TWI305647B (de)
WO (1) WO2006039075A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7199603B2 (en) * 2004-07-30 2007-04-03 Microchip Technology Incorporated Increment/decrement, chip select and selectable write to non-volatile memory using a two signal control protocol for an integrated circuit device
JP2006139661A (ja) * 2004-11-15 2006-06-01 Kumiko Mito 記憶装置
US20080061817A1 (en) * 2004-12-17 2008-03-13 International Business Machines Corporation Changing Chip Function Based on Fuse States
US7652893B2 (en) * 2005-04-28 2010-01-26 Ati Technologies Ulc Single or dual electronic package with footprint and pin sharing
DE102006021745A1 (de) * 2006-05-10 2007-11-15 Robert Bosch Gmbh Nichtflüchtiger Speicherbaustein
US8117378B2 (en) * 2008-10-29 2012-02-14 Microchip Technology Incorporated Preventing unintended permanent write-protection
US8806144B2 (en) 2009-05-12 2014-08-12 Stec, Inc. Flash storage device with read cache
KR101373469B1 (ko) * 2009-11-27 2014-03-13 엘지디스플레이 주식회사 액정표시장치 및 그 구동방법
TWI503818B (zh) * 2013-01-21 2015-10-11 Richtek Technology Corp 具共用腳位之馬達控制器與相關控制方法
CN105741230A (zh) * 2016-01-29 2016-07-06 宇龙计算机通信科技(深圳)有限公司 一种图像处理的方法及移动终端

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0695971A (ja) 1992-07-30 1994-04-08 Rohm Co Ltd データ保存回路
JPH0844628A (ja) * 1994-08-03 1996-02-16 Hitachi Ltd 不揮発性メモリ、およびそれを用いたメモリカード、情報処理装置、ならびに不揮発性メモリのソフトウェアライトプロテクト制御方法
US5617559A (en) * 1994-08-31 1997-04-01 Motorola Inc. Modular chip select control circuit and method for performing pipelined memory accesses
US6031757A (en) * 1996-11-22 2000-02-29 Macronix International Co., Ltd. Write protected, non-volatile memory device with user programmable sector lock capability
US6385074B1 (en) * 1998-11-16 2002-05-07 Matrix Semiconductor, Inc. Integrated circuit structure including three-dimensional memory array
US6757832B1 (en) 2000-02-15 2004-06-29 Silverbrook Research Pty Ltd Unauthorized modification of values in flash memory
US6556476B1 (en) * 2002-03-11 2003-04-29 Unigen Corporation Non-volatile memory data protection
US7199603B2 (en) * 2004-07-30 2007-04-03 Microchip Technology Incorporated Increment/decrement, chip select and selectable write to non-volatile memory using a two signal control protocol for an integrated circuit device

Also Published As

Publication number Publication date
ATE450045T1 (de) 2009-12-15
EP1805768B1 (de) 2009-11-25
WO2006039075A1 (en) 2006-04-13
US20060022707A1 (en) 2006-02-02
CN100514497C (zh) 2009-07-15
US7091740B2 (en) 2006-08-15
EP1805768A1 (de) 2007-07-11
TWI305647B (en) 2009-01-21
CN1926636A (zh) 2007-03-07
TW200631022A (en) 2006-09-01

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