DE602004023174D1 - Fehlerzulassende Schaltung mit Redundanz - Google Patents

Fehlerzulassende Schaltung mit Redundanz

Info

Publication number
DE602004023174D1
DE602004023174D1 DE602004023174T DE602004023174T DE602004023174D1 DE 602004023174 D1 DE602004023174 D1 DE 602004023174D1 DE 602004023174 T DE602004023174 T DE 602004023174T DE 602004023174 T DE602004023174 T DE 602004023174T DE 602004023174 D1 DE602004023174 D1 DE 602004023174D1
Authority
DE
Germany
Prior art keywords
redundancy
failed circuit
failed
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004023174T
Other languages
English (en)
Inventor
John E Nickolls
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nvidia Corp
Original Assignee
Nvidia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nvidia Corp filed Critical Nvidia Corp
Publication of DE602004023174D1 publication Critical patent/DE602004023174D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/848—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by adjacent switching
DE602004023174T 2003-12-18 2004-12-16 Fehlerzulassende Schaltung mit Redundanz Active DE602004023174D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/741,243 US6879207B1 (en) 2003-12-18 2003-12-18 Defect tolerant redundancy

Publications (1)

Publication Number Publication Date
DE602004023174D1 true DE602004023174D1 (de) 2009-10-29

Family

ID=34423517

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004023174T Active DE602004023174D1 (de) 2003-12-18 2004-12-16 Fehlerzulassende Schaltung mit Redundanz

Country Status (7)

Country Link
US (2) US6879207B1 (de)
EP (1) EP1544741B1 (de)
CN (1) CN100476746C (de)
DE (1) DE602004023174D1 (de)
HK (1) HK1072997A1 (de)
SG (1) SG112988A1 (de)
TW (1) TWI268596B (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8732644B1 (en) 2003-09-15 2014-05-20 Nvidia Corporation Micro electro mechanical switch system and method for testing and configuring semiconductor functional circuits
US8775997B2 (en) * 2003-09-15 2014-07-08 Nvidia Corporation System and method for testing and configuring semiconductor functional circuits
US8872833B2 (en) 2003-09-15 2014-10-28 Nvidia Corporation Integrated circuit configuration system and method
US6880940B1 (en) * 2003-11-10 2005-04-19 Honda Motor Co., Ltd. Magnesium mirror base with countermeasures for galvanic corrosion
US8711161B1 (en) 2003-12-18 2014-04-29 Nvidia Corporation Functional component compensation reconfiguration system and method
US8723231B1 (en) 2004-09-15 2014-05-13 Nvidia Corporation Semiconductor die micro electro-mechanical switch management system and method
US8711156B1 (en) 2004-09-30 2014-04-29 Nvidia Corporation Method and system for remapping processing elements in a pipeline of a graphics processing unit
US7301242B2 (en) 2004-11-04 2007-11-27 Tabula, Inc. Programmable system in package
US8201124B1 (en) 2005-03-15 2012-06-12 Tabula, Inc. System in package and method of creating system in package
US8021193B1 (en) 2005-04-25 2011-09-20 Nvidia Corporation Controlled impedance display adapter
US7793029B1 (en) 2005-05-17 2010-09-07 Nvidia Corporation Translation device apparatus for configuring printed circuit board connectors
US8412872B1 (en) 2005-12-12 2013-04-02 Nvidia Corporation Configurable GPU and method for graphics processing using a configurable GPU
US8417838B2 (en) 2005-12-12 2013-04-09 Nvidia Corporation System and method for configurable digital communication
US7839397B2 (en) * 2007-02-08 2010-11-23 Panasonic Corporation Display driver and display panel module
US8724483B2 (en) 2007-10-22 2014-05-13 Nvidia Corporation Loopback configuration for bi-directional interfaces
US8687639B2 (en) * 2009-06-04 2014-04-01 Nvidia Corporation Method and system for ordering posted packets and non-posted packets transfer
US9176909B2 (en) 2009-12-11 2015-11-03 Nvidia Corporation Aggregating unoccupied PCI-e links to provide greater bandwidth
US9331869B2 (en) 2010-03-04 2016-05-03 Nvidia Corporation Input/output request packet handling techniques by a device specific kernel mode driver
WO2012056574A1 (ja) * 2010-10-29 2012-05-03 富士通株式会社 半導体回路の切替装置及び切替方法
US9330031B2 (en) 2011-12-09 2016-05-03 Nvidia Corporation System and method for calibration of serial links using a serial-to-parallel loopback
US9172373B2 (en) * 2013-09-06 2015-10-27 Globalfoundries U.S. 2 Llc Verifying partial good voltage island structures
US9946658B2 (en) 2013-11-22 2018-04-17 Nvidia Corporation Memory interface design having controllable internal and external interfaces for bypassing defective memory

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3897626A (en) * 1971-06-25 1975-08-05 Ibm Method of manufacturing a full capacity monolithic memory utilizing defective storage cells
US5134584A (en) 1988-07-22 1992-07-28 Vtc Incorporated Reconfigurable memory
JPH0289299A (ja) * 1988-09-27 1990-03-29 Nec Corp 半導体記憶装置
JP2689768B2 (ja) * 1991-07-08 1997-12-10 日本電気株式会社 半導体集積回路装置
US5369314A (en) * 1994-02-22 1994-11-29 Altera Corporation Programmable logic device with redundant circuitry
US5670895A (en) * 1995-10-19 1997-09-23 Altera Corporation Routing connections for programmable logic array integrated circuits
WO1998028746A1 (en) * 1996-12-23 1998-07-02 Rambus, Inc. Redundancy for wide hierarchical i/o organizations
US6091258A (en) * 1997-02-05 2000-07-18 Altera Corporation Redundancy circuitry for logic circuits
JP3865789B2 (ja) * 1997-05-23 2007-01-10 アルテラ コーポレイション インタリーブされた入力回路を備えるプログラマブル論理装置のための冗長回路
DE19861088A1 (de) * 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen

Also Published As

Publication number Publication date
US7477091B2 (en) 2009-01-13
TWI268596B (en) 2006-12-11
US6879207B1 (en) 2005-04-12
EP1544741B1 (de) 2009-09-16
EP1544741A1 (de) 2005-06-22
SG112988A1 (en) 2005-07-28
TW200524130A (en) 2005-07-16
CN1694252A (zh) 2005-11-09
HK1072997A1 (en) 2005-09-16
CN100476746C (zh) 2009-04-08
US20060071701A1 (en) 2006-04-06

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Legal Events

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