DE602004022422D1 - Zeichengabe mit mehreren taktleitungen - Google Patents

Zeichengabe mit mehreren taktleitungen

Info

Publication number
DE602004022422D1
DE602004022422D1 DE602004022422T DE602004022422T DE602004022422D1 DE 602004022422 D1 DE602004022422 D1 DE 602004022422D1 DE 602004022422 T DE602004022422 T DE 602004022422T DE 602004022422 T DE602004022422 T DE 602004022422T DE 602004022422 D1 DE602004022422 D1 DE 602004022422D1
Authority
DE
Germany
Prior art keywords
reference times
communication lines
lines
sequences
takting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004022422T
Other languages
English (en)
Inventor
Larry Tate
Timothy Wig
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE602004022422D1 publication Critical patent/DE602004022422D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/493Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems by transition coding, i.e. the time-position or direction of a transition being encoded before transmission
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/08Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/08Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults
    • H04L25/085Arrangements for reducing interference in line transmission systems, e.g. by differential transmission
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0008Synchronisation information channels, e.g. clock distribution lines
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Mechanical Light Control Or Optical Switches (AREA)
  • Financial Or Insurance-Related Operations Such As Payment And Settlement (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
DE602004022422T 2003-07-28 2004-07-08 Zeichengabe mit mehreren taktleitungen Active DE602004022422D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/629,325 US7342969B2 (en) 2003-07-28 2003-07-28 Signaling with multiple clocks
PCT/US2004/021809 WO2005013547A1 (en) 2003-07-28 2004-07-08 Signaling with multiple clock lines

Publications (1)

Publication Number Publication Date
DE602004022422D1 true DE602004022422D1 (de) 2009-09-17

Family

ID=34103598

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004022422T Active DE602004022422D1 (de) 2003-07-28 2004-07-08 Zeichengabe mit mehreren taktleitungen

Country Status (8)

Country Link
US (1) US7342969B2 (de)
EP (1) EP1654826B1 (de)
KR (1) KR100825527B1 (de)
CN (1) CN1833396B (de)
AT (1) ATE438972T1 (de)
DE (1) DE602004022422D1 (de)
TW (1) TWI304683B (de)
WO (1) WO2005013547A1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI233845B (en) * 2002-09-10 2005-06-11 Nikko Materials Co Ltd Iron-based sintered compact and its production method
US7480330B2 (en) * 2004-03-30 2009-01-20 Intel Corporation Method and apparatus to perform modulation using integer timing relationships between intra symbol modulation components
US7342466B2 (en) * 2005-08-10 2008-03-11 Intel Corporation Hybrid coupler having resistive coupling and electromagnetic coupling
US7519120B2 (en) * 2005-10-20 2009-04-14 Fujitsu Limited Clock EMI reduction
US7379382B2 (en) * 2005-10-28 2008-05-27 Micron Technology, Inc. System and method for controlling timing of output signals
US20090167380A1 (en) * 2007-12-26 2009-07-02 Sotiriou Christos P System and method for reducing EME emissions in digital desynchronized circuits
TWI387203B (zh) * 2009-04-16 2013-02-21 Giga Byte Tech Co Ltd 脈衝寬度調變控制裝置以及其驅動方法
DE102011081689B4 (de) * 2011-08-26 2020-07-02 Intel Deutschland Gmbh Signalverarbeitungsvorrichtung und verfahren zur bereitstellung eines ersten analogsignals und eines zweiten analogsignals
US9599661B2 (en) 2012-09-27 2017-03-21 Intel Corporation Testing device for validating stacked semiconductor devices
TWI668970B (zh) * 2017-11-30 2019-08-11 創意電子股份有限公司 量測系統及資料傳輸介面
CN109857687B (zh) * 2017-11-30 2023-02-17 创意电子股份有限公司 量测系统及数据传输接口
KR102223031B1 (ko) 2019-03-20 2021-03-04 삼성전자주식회사 향상된 브레이드 클락 시그널링을 이용한 차동 신호 처리장치

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4785394A (en) * 1986-09-19 1988-11-15 Datapoint Corporation Fair arbitration technique for a split transaction bus in a multiprocessor computer system
GB9222914D0 (en) 1992-11-02 1992-12-16 3Com Uk Limited Ethernet repeater
US5910742A (en) * 1997-06-16 1999-06-08 Cypress Semiconductor Corp. Circuit and method for data recovery
US6463092B1 (en) * 1998-09-10 2002-10-08 Silicon Image, Inc. System and method for sending and receiving data signals over a clock signal line
JP3376315B2 (ja) * 1999-05-18 2003-02-10 日本電気株式会社 ビット同期回路
US6765975B2 (en) * 2000-12-19 2004-07-20 Intel Corporation Method and apparatus for a tracking data receiver compensating for deterministic jitter
US20030043926A1 (en) * 2001-08-31 2003-03-06 Fujitsu Limited Circuit and method for generating a timing signal, and signal transmission system performing for high-speed signal transmission and reception between LSIs
US20030061564A1 (en) * 2001-09-27 2003-03-27 Maddux John T. Serial data extraction using two cycles of edge information

Also Published As

Publication number Publication date
KR20060041291A (ko) 2006-05-11
US20050025252A1 (en) 2005-02-03
ATE438972T1 (de) 2009-08-15
CN1833396A (zh) 2006-09-13
CN1833396B (zh) 2015-04-15
TWI304683B (en) 2008-12-21
TW200511725A (en) 2005-03-16
US7342969B2 (en) 2008-03-11
KR100825527B1 (ko) 2008-04-25
EP1654826B1 (de) 2009-08-05
EP1654826A1 (de) 2006-05-10
WO2005013547A1 (en) 2005-02-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: HEYER, V., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 806