DE602004002188D1 - Absicherung des Testmodus einer integrierten Schaltung - Google Patents

Absicherung des Testmodus einer integrierten Schaltung

Info

Publication number
DE602004002188D1
DE602004002188D1 DE602004002188T DE602004002188T DE602004002188D1 DE 602004002188 D1 DE602004002188 D1 DE 602004002188D1 DE 602004002188 T DE602004002188 T DE 602004002188T DE 602004002188 T DE602004002188 T DE 602004002188T DE 602004002188 D1 DE602004002188 D1 DE 602004002188D1
Authority
DE
Germany
Prior art keywords
securing
integrated circuit
test mode
test
mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004002188T
Other languages
English (en)
Other versions
DE602004002188T2 (de
Inventor
Frederic Bancel
David Hely
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Publication of DE602004002188D1 publication Critical patent/DE602004002188D1/de
Application granted granted Critical
Publication of DE602004002188T2 publication Critical patent/DE602004002188T2/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31719—Security aspects, e.g. preventing unauthorised access during test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Logic Circuits (AREA)
DE602004002188T 2004-01-29 2004-12-22 Absicherung des Testmodus einer integrierten Schaltung Active DE602004002188T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0400836A FR2865827A1 (fr) 2004-01-29 2004-01-29 Securisation du mode de test d'un circuit integre
FR0400836 2004-01-29

Publications (2)

Publication Number Publication Date
DE602004002188D1 true DE602004002188D1 (de) 2006-10-12
DE602004002188T2 DE602004002188T2 (de) 2007-07-26

Family

ID=34639798

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004002188T Active DE602004002188T2 (de) 2004-01-29 2004-12-22 Absicherung des Testmodus einer integrierten Schaltung

Country Status (4)

Country Link
US (2) US7512852B2 (de)
EP (1) EP1560031B1 (de)
DE (1) DE602004002188T2 (de)
FR (1) FR2865827A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2897440A1 (fr) 2006-02-10 2007-08-17 St Microelectronics Sa Circuit electronique comprenant un mode de test securise par rupture d'une chaine de test, et procede associe.
FR2897439A1 (fr) * 2006-02-15 2007-08-17 St Microelectronics Sa Circuit elelctronique comprenant un mode de test securise par l'utilisation d'un identifiant, et procede associe
US7975307B2 (en) * 2007-09-07 2011-07-05 Freescale Semiconductor, Inc. Securing proprietary functions from scan access
US8756391B2 (en) * 2009-05-22 2014-06-17 Raytheon Company Multi-level security computing system
FR2948795A1 (fr) * 2009-07-30 2011-02-04 St Microelectronics Rousset Detecteur d'injection de fautes dans un circuit integre
US9026873B2 (en) * 2013-07-23 2015-05-05 Altera Coporation Method and apparatus for securing configuration scan chains of a programmable device
DE102015110144B8 (de) * 2015-06-24 2018-06-28 Infineon Technologies Ag Chip und Verfahren zum Testen einer Verarbeitungskomponente eines Chips
US10984108B2 (en) 2018-10-05 2021-04-20 International Business Machines Corporation Trusted computing attestation of system validation state

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03278150A (ja) * 1990-03-27 1991-12-09 Nec Corp マイクロコンピュータ
EP0585601B1 (de) * 1992-07-31 1999-04-28 Hughes Electronics Corporation Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen
US5357572A (en) * 1992-09-22 1994-10-18 Hughes Aircraft Company Apparatus and method for sensitive circuit protection with set-scan testing
US5452355A (en) * 1994-02-02 1995-09-19 Vlsi Technology, Inc. Tamper protection cell
EP0743602B1 (de) * 1995-05-18 2002-08-14 Hewlett-Packard Company, A Delaware Corporation Schaltungsanordnung zur Überwachung der Benutzung von Funktionen in einem integrierten Schaltungkreis
US6005814A (en) * 1998-04-03 1999-12-21 Cypress Semiconductor Corporation Test mode entrance through clocked addresses
DE19845830A1 (de) * 1998-09-24 2000-03-30 Schering Ag Aminoalkyl-3,4-dihydrochinolin-Derivate und ihre Verwendung in Arzneimitteln
KR100710936B1 (ko) 1998-11-05 2007-04-24 인피니언 테크놀로지스 아게 집적 회로용 보호 회로
JP3602984B2 (ja) * 1999-07-09 2004-12-15 富士通株式会社 メモリ装置
US6289455B1 (en) * 1999-09-02 2001-09-11 Crypotography Research, Inc. Method and apparatus for preventing piracy of digital content
EP1089083A1 (de) * 1999-09-03 2001-04-04 Sony Corporation Halbleiterschaltung mit Abtastpfadschaltungen
US7003707B2 (en) * 2000-04-28 2006-02-21 Texas Instruments Incorporated IC tap/scan test port access with tap lock circuitry
DE10044837C1 (de) 2000-09-11 2001-09-13 Infineon Technologies Ag Schaltungsanordnung und Verfahren zum Detektieren eines unerwünschten Angriffs auf eine integrierte Schaltung
JP3677215B2 (ja) 2001-03-13 2005-07-27 松下電器産業株式会社 Ｉｃカード
US6829730B2 (en) * 2001-04-27 2004-12-07 Logicvision, Inc. Method of designing circuit having multiple test access ports, circuit produced thereby and method of using same
US6466048B1 (en) * 2001-05-23 2002-10-15 Mosaid Technologies, Inc. Method and apparatus for switchably selecting an integrated circuit operating mode
JP2002365337A (ja) * 2001-06-07 2002-12-18 Sony Corp テスト回路およびデジタル回路
JP3898481B2 (ja) * 2001-10-03 2007-03-28 富士通株式会社 半導体記憶装置
US7185249B2 (en) 2002-04-30 2007-02-27 Freescale Semiconductor, Inc. Method and apparatus for secure scan testing
US7155644B2 (en) * 2003-05-08 2006-12-26 Micron Technology, Inc. Automatic test entry termination in a memory device
JP2007516486A (ja) * 2003-05-08 2007-06-21 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ サービス品質を低減させることによって電子装置の盗難を防止するシステム及び方法
US20050166002A1 (en) * 2004-01-26 2005-07-28 Adtran, Inc. Memory intrusion protection circuit

Also Published As

Publication number Publication date
DE602004002188T2 (de) 2007-07-26
EP1560031A1 (de) 2005-08-03
US20050169076A1 (en) 2005-08-04
EP1560031B1 (de) 2006-08-30
US7725786B2 (en) 2010-05-25
US20090164858A1 (en) 2009-06-25
FR2865827A1 (fr) 2005-08-05
US7512852B2 (en) 2009-03-31

Similar Documents

Publication Publication Date Title
DE602006012282D1 (de) Platzierung einer rfid-schaltung
DE502006000019D1 (de) Integrieter Schaltkreis
DE602005025951D1 (de) Integrierter Halbleiterschaltkreis
DE602005027162D1 (de) Elektronisches Blutdruckmessgerät
FI20041455A0 (fi) Antennikomponentti
DE602005012654D1 (de) Turbinenbauteil
DE602005015463D1 (de) Testvorrichtung & -verfahren
DE602005005430D1 (de) Integrierte Halbleiterschaltungsanordnung
DE602006010453D1 (de) Verwürfelung der Strom-Signatur eines integrierten Schaltkreises
DE502005005196D1 (de) Direktional verfestigte bauteile
DE602005017454D1 (de) Siliziumverbindung
DE502005005664D1 (de) Chronograph
DE602004025215D1 (de) Tastsonde
DK1789800T3 (da) Ileitis-diagnosetest
FR2870042B1 (fr) Structure capacitive de circuit integre
DE502005000300D1 (de) Tastkopf
DE602004022994D1 (de) Wandlerschaltung
DE602004002188D1 (de) Absicherung des Testmodus einer integrierten Schaltung
DE602005026256D1 (de) Serien-brückenschaltung
DK1795984T3 (da) Funktionalitetstestfremgangsmåde
DE602006009321D1 (de) Sicherung des Testmodus eines integrierten Schaltkreises
DE602004010589D1 (de) Integrierter Koppler
FI20050976A (fi) Sähköinen liitäntäkomponentti
DE502005009783D1 (de) Schaltung einer Registeraufladung
SE0400476L (sv) Komponent

Legal Events

Date Code Title Description
8364 No opposition during term of opposition