DE60132804D1 - Datenübertragungsverfahren, datenübertragungsgerät, übertragungsschnittstellenverfahren, übertragungsschnittstellengerät - Google Patents

Datenübertragungsverfahren, datenübertragungsgerät, übertragungsschnittstellenverfahren, übertragungsschnittstellengerät

Info

Publication number
DE60132804D1
DE60132804D1 DE60132804T DE60132804T DE60132804D1 DE 60132804 D1 DE60132804 D1 DE 60132804D1 DE 60132804 T DE60132804 T DE 60132804T DE 60132804 T DE60132804 T DE 60132804T DE 60132804 D1 DE60132804 D1 DE 60132804D1
Authority
DE
Germany
Prior art keywords
procedure
transmission
data transmission
transmission interface
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60132804T
Other languages
English (en)
Other versions
DE60132804T2 (de
Inventor
Koichi Sugiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of DE60132804D1 publication Critical patent/DE60132804D1/de
Application granted granted Critical
Publication of DE60132804T2 publication Critical patent/DE60132804T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
DE60132804T 2000-12-04 2001-12-03 Datenübertragungsverfahren, Datenübertragungsgerät, Kommunikations-Interface-Verfahren und Kommunikations-Interface-Gerät Expired - Lifetime DE60132804T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000368363 2000-12-04
JP2000368363A JP4505985B2 (ja) 2000-12-04 2000-12-04 データ転送方法、データ転送装置、通信インターフェース方法および通信インターフェース装置
PCT/JP2001/010537 WO2002046939A1 (fr) 2000-12-04 2001-12-03 Procede et dispositif de transfert de donnees et procede et dispositif d'interface de communication

Publications (2)

Publication Number Publication Date
DE60132804D1 true DE60132804D1 (de) 2008-03-27
DE60132804T2 DE60132804T2 (de) 2009-02-05

Family

ID=18838621

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60132804T Expired - Lifetime DE60132804T2 (de) 2000-12-04 2001-12-03 Datenübertragungsverfahren, Datenübertragungsgerät, Kommunikations-Interface-Verfahren und Kommunikations-Interface-Gerät

Country Status (5)

Country Link
US (1) US7174395B2 (de)
EP (1) EP1343089B1 (de)
JP (1) JP4505985B2 (de)
DE (1) DE60132804T2 (de)
WO (1) WO2002046939A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10211054A1 (de) * 2002-03-13 2003-10-09 Advanced Micro Devices Inc USB-Hostcontroller
JP4563829B2 (ja) * 2005-01-27 2010-10-13 富士通株式会社 ダイレクトメモリアクセス制御方法、ダイレクトメモリアクセス制御装置、情報処理システム、プログラム
US20130111104A1 (en) * 2011-10-31 2013-05-02 Moon J. Kim Asynchronous data shift and backup between asymmetric data sources

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL116989A (en) * 1996-01-31 1999-10-28 Galileo Technology Ltd Switching ethernet controller
JP4181645B2 (ja) * 1996-02-29 2008-11-19 富士通株式会社 データ処理装置
SG77135A1 (en) * 1996-04-26 2000-12-19 Texas Instruments Inc Method and system for assigning a channel number to a received data packet
EP0804033A3 (de) * 1996-04-26 2003-12-10 Texas Instruments Incorporated Verbesserungen an oder in Bezug auf elektronischen Bauelementen
US5991817A (en) * 1996-09-06 1999-11-23 Cisco Systems, Inc. Apparatus and method for a network router
JP3731283B2 (ja) * 1997-04-01 2006-01-05 ソニー株式会社 信号処理回路およびその方法
JP2955561B1 (ja) * 1998-05-29 1999-10-04 株式会社ディジタル・ビジョン・ラボラトリーズ ストリーム通信システム及びストリーム転送制御方法
JP3494040B2 (ja) * 1998-10-27 2004-02-03 セイコーエプソン株式会社 データ転送制御装置及び電子機器
JP3543647B2 (ja) * 1998-10-27 2004-07-14 セイコーエプソン株式会社 データ転送制御装置及び電子機器
US6643716B2 (en) * 1999-03-29 2003-11-04 Intel Corporation Method and apparatus for processing serial data using a single receive fifo
US6691178B1 (en) * 2000-02-22 2004-02-10 Stmicroelectronics, Inc. Fencepost descriptor caching mechanism and method therefor

Also Published As

Publication number Publication date
JP2002169767A (ja) 2002-06-14
US7174395B2 (en) 2007-02-06
DE60132804T2 (de) 2009-02-05
EP1343089B1 (de) 2008-02-13
EP1343089A4 (de) 2006-11-15
US20030014547A1 (en) 2003-01-16
WO2002046939A1 (fr) 2002-06-13
JP4505985B2 (ja) 2010-07-21
EP1343089A1 (de) 2003-09-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition