DE60132037D1 - Gegossene Verpackung für integrierte Schaltung - Google Patents

Gegossene Verpackung für integrierte Schaltung

Info

Publication number
DE60132037D1
DE60132037D1 DE60132037T DE60132037T DE60132037D1 DE 60132037 D1 DE60132037 D1 DE 60132037D1 DE 60132037 T DE60132037 T DE 60132037T DE 60132037 T DE60132037 T DE 60132037T DE 60132037 D1 DE60132037 D1 DE 60132037D1
Authority
DE
Germany
Prior art keywords
chip
tape
mould
housing
reinforcement plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60132037T
Other languages
English (en)
Other versions
DE60132037T2 (de
Inventor
Patrick Courant
Yves Stricot
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SA
Original Assignee
Bull SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SA filed Critical Bull SA
Application granted granted Critical
Publication of DE60132037D1 publication Critical patent/DE60132037D1/de
Publication of DE60132037T2 publication Critical patent/DE60132037T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49572Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Transmitters (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
DE60132037T 2000-02-17 2001-02-15 Gegossene Verpackung für integrierte Schaltung Expired - Lifetime DE60132037T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0001965A FR2805392B1 (fr) 2000-02-17 2000-02-17 Boitier de circuit integre surmoule
FR0001965 2000-02-17

Publications (2)

Publication Number Publication Date
DE60132037D1 true DE60132037D1 (de) 2008-02-07
DE60132037T2 DE60132037T2 (de) 2008-12-18

Family

ID=8847093

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60132037T Expired - Lifetime DE60132037T2 (de) 2000-02-17 2001-02-15 Gegossene Verpackung für integrierte Schaltung

Country Status (4)

Country Link
EP (1) EP1130641B1 (de)
AT (1) ATE382191T1 (de)
DE (1) DE60132037T2 (de)
FR (1) FR2805392B1 (de)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5827350A (ja) * 1981-08-11 1983-02-18 Citizen Watch Co Ltd Icの実装方法
JPH01135050A (ja) * 1987-11-20 1989-05-26 Hitachi Ltd 半導体装置
JP2531382B2 (ja) * 1994-05-26 1996-09-04 日本電気株式会社 ボ―ルグリッドアレイ半導体装置およびその製造方法
JPH10242333A (ja) * 1997-03-01 1998-09-11 Nitto Denko Corp 半導体装置及び半導体装置の製造方法

Also Published As

Publication number Publication date
ATE382191T1 (de) 2008-01-15
FR2805392A1 (fr) 2001-08-24
EP1130641B1 (de) 2007-12-26
EP1130641A1 (de) 2001-09-05
DE60132037T2 (de) 2008-12-18
FR2805392B1 (fr) 2003-08-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition