DE60101253D1 - Arbiter für ein System zum Verwalten von Warteschlangen - Google Patents

Arbiter für ein System zum Verwalten von Warteschlangen

Info

Publication number
DE60101253D1
DE60101253D1 DE60101253T DE60101253T DE60101253D1 DE 60101253 D1 DE60101253 D1 DE 60101253D1 DE 60101253 T DE60101253 T DE 60101253T DE 60101253 T DE60101253 T DE 60101253T DE 60101253 D1 DE60101253 D1 DE 60101253D1
Authority
DE
Germany
Prior art keywords
arbiter
management system
queue management
bus
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60101253T
Other languages
English (en)
Other versions
DE60101253T2 (de
Inventor
Alistair I Goudie
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsemi Semiconductor Ltd
Original Assignee
Zarlink Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zarlink Semiconductor Ltd filed Critical Zarlink Semiconductor Ltd
Application granted granted Critical
Publication of DE60101253D1 publication Critical patent/DE60101253D1/de
Publication of DE60101253T2 publication Critical patent/DE60101253T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W28/00—Network traffic management; Network resource management
    • H04W28/02—Traffic management, e.g. flow control or congestion control
    • H04W28/10—Flow control between communication endpoints
    • H04W28/14—Flow control between communication endpoints using intermediate storage
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W28/00—Network traffic management; Network resource management
    • H04W28/16—Central resource management; Negotiation of resources or communication parameters, e.g. negotiating bandwidth or QoS [Quality of Service]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Communication Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Air-Conditioning For Vehicles (AREA)
  • Image Processing (AREA)
DE60101253T 2000-12-29 2001-12-19 Arbiter für ein Warteschlangenverwaltungssystem Expired - Fee Related DE60101253T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB0031763.6A GB0031763D0 (en) 2000-12-29 2000-12-29 Arbiter for a queue management system
GB0031763 2000-12-29

Publications (2)

Publication Number Publication Date
DE60101253D1 true DE60101253D1 (de) 2003-12-24
DE60101253T2 DE60101253T2 (de) 2004-09-02

Family

ID=9905972

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60101253T Expired - Fee Related DE60101253T2 (de) 2000-12-29 2001-12-19 Arbiter für ein Warteschlangenverwaltungssystem

Country Status (5)

Country Link
US (1) US6898649B2 (de)
EP (1) EP1220103B1 (de)
AT (1) ATE254780T1 (de)
DE (1) DE60101253T2 (de)
GB (2) GB0031763D0 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7421273B2 (en) * 2002-11-13 2008-09-02 Agere Systems Inc. Managing priority queues and escalation in wireless communication systems
US7149829B2 (en) * 2003-04-18 2006-12-12 Sonics, Inc. Various methods and apparatuses for arbitration among blocks of functionality
JP4313607B2 (ja) * 2003-05-08 2009-08-12 富士通株式会社 バス接続回路及びバス接続システム
US8386648B1 (en) 2003-06-26 2013-02-26 Nvidia Corporation Hardware support system for accelerated disk I/O
US7155553B2 (en) * 2003-08-14 2006-12-26 Texas Instruments Incorporated PCI express to PCI translation bridge
US8683132B1 (en) 2003-09-29 2014-03-25 Nvidia Corporation Memory controller for sequentially prefetching data for a processor of a computer system
US7296105B2 (en) * 2003-10-03 2007-11-13 Sonics, Inc. Method and apparatus for configuring an interconnect to implement arbitration
US8356142B1 (en) 2003-11-12 2013-01-15 Nvidia Corporation Memory controller for non-sequentially prefetching data for a processor of a computer system
US8700808B2 (en) * 2003-12-01 2014-04-15 Nvidia Corporation Hardware support system for accelerated disk I/O
US8356143B1 (en) 2004-10-22 2013-01-15 NVIDIA Corporatin Prefetch mechanism for bus master memory access
US7739436B2 (en) * 2004-11-01 2010-06-15 Sonics, Inc. Method and apparatus for round robin resource arbitration with a fast request to grant response
US7248587B1 (en) * 2005-04-11 2007-07-24 Azul Systems, Inc. Error recovery of variable-length packets without sequence numbers or special symbols used for synchronizing transmit retry-buffer pointer
DE102006009034B3 (de) * 2006-02-27 2007-08-02 Infineon Technologies Ag Verfahren zum Betreiben eines Bussystems sowie Halbleiter-Bauelement, insbesondere Mikroprozessor- bzw. Mikrocontroller
US8156273B2 (en) * 2007-05-10 2012-04-10 Freescale Semiconductor, Inc. Method and system for controlling transmission and execution of commands in an integrated circuit device
US8356128B2 (en) * 2008-09-16 2013-01-15 Nvidia Corporation Method and system of reducing latencies associated with resource allocation by using multiple arbiters
US8370552B2 (en) * 2008-10-14 2013-02-05 Nvidia Corporation Priority based bus arbiters avoiding deadlock and starvation on buses that support retrying of transactions
WO2010086906A1 (ja) * 2009-02-02 2010-08-05 富士通株式会社 調停装置
US8698823B2 (en) * 2009-04-08 2014-04-15 Nvidia Corporation System and method for deadlock-free pipelining
KR101861768B1 (ko) 2011-09-16 2018-05-28 삼성전자주식회사 시스템 온칩, 이를 포함하는 전자 시스템, 및 그 동작 방법
US8793421B2 (en) * 2011-10-31 2014-07-29 Apple Inc. Queue arbitration using non-stalling request indication
CN105515925A (zh) * 2014-09-26 2016-04-20 深圳中德世纪新能源有限公司 一种uart多主实时通信系统
KR101915944B1 (ko) * 2017-05-08 2018-11-08 주식회사 애포샤 클러스터 시스템에서의 클라이언트 요청 처리 방법, 상기 클라이언트 요청에 따른 입출력 처리 방법 및 장치
US11954518B2 (en) * 2019-12-20 2024-04-09 Nvidia Corporation User-defined metered priority queues

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4491916A (en) * 1979-11-05 1985-01-01 Litton Resources Systems, Inc. Large volume, high speed data processor
US4969120A (en) * 1989-02-13 1990-11-06 International Business Machines Corporation Data processing system for time shared access to a time slotted bus
JP2705709B2 (ja) * 1991-06-17 1998-01-28 大日本スクリーン製造株式会社 データの時分割転送装置
JPH0594409A (ja) * 1991-10-02 1993-04-16 Nec Eng Ltd バス調停システム
US5485586A (en) * 1992-01-10 1996-01-16 Digital Equipment Corporation Queue based arbitration using a FIFO data structure
US5241632A (en) * 1992-01-30 1993-08-31 Digital Equipment Corporation Programmable priority arbiter
SE9203016L (sv) * 1992-10-14 1994-04-15 Ericsson Telefon Ab L M Signalbehandlingssystem med delat dataminne
JPH07244635A (ja) * 1994-01-14 1995-09-19 Fujitsu Ltd バス使用権調停回路及び方法
US5533205A (en) * 1994-03-30 1996-07-02 International Business Machines Corporation Method and system for efficient bus allocation in a multimedia computer system
US5463624A (en) * 1994-04-15 1995-10-31 Dsc Communications Corporation Bus arbitration method for telecommunications switching
US5787264A (en) * 1995-05-08 1998-07-28 Apple Computer, Inc. Method and apparatus for arbitrating access to a shared bus
US5740380A (en) * 1996-07-15 1998-04-14 Micron Electronics, Inc. Method and system for apportioning computer bus bandwidth
US6385678B2 (en) * 1996-09-19 2002-05-07 Trimedia Technologies, Inc. Method and apparatus for bus arbitration with weighted bandwidth allocation
US5784569A (en) * 1996-09-23 1998-07-21 Silicon Graphics, Inc. Guaranteed bandwidth allocation method in a computer system for input/output data transfers
EP0924623A3 (de) * 1997-12-22 2000-07-05 Compaq Computer Corporation Rechnersystem mit Arbitrierungsvorrichtung, die mehrere Bus-Master befähigt, auf einen Grafikbus zuzugreifen
US6363445B1 (en) * 1998-10-15 2002-03-26 Micron Technology, Inc. Method of bus arbitration using requesting device bandwidth and priority ranking

Also Published As

Publication number Publication date
DE60101253T2 (de) 2004-09-02
EP1220103B1 (de) 2003-11-19
GB0130375D0 (en) 2002-02-06
GB0031763D0 (en) 2001-02-07
US6898649B2 (en) 2005-05-24
GB2374499A (en) 2002-10-16
US20020166007A1 (en) 2002-11-07
EP1220103A1 (de) 2002-07-03
ATE254780T1 (de) 2003-12-15

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee