DE50012965D1 - Differentieller Analog-Digitalwandler - Google Patents
Differentieller Analog-DigitalwandlerInfo
- Publication number
- DE50012965D1 DE50012965D1 DE50012965T DE50012965T DE50012965D1 DE 50012965 D1 DE50012965 D1 DE 50012965D1 DE 50012965 T DE50012965 T DE 50012965T DE 50012965 T DE50012965 T DE 50012965T DE 50012965 D1 DE50012965 D1 DE 50012965D1
- Authority
- DE
- Germany
- Prior art keywords
- digital converter
- differential analog
- differential
- analog
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
- H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
- H03M1/068—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
- H03M1/0682—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
- H03M1/466—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors
- H03M1/468—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors in which the input S/H circuit is merged with the feedback DAC array
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/80—Simultaneous conversion using weighted impedances
- H03M1/802—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
- H03M1/804—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices with charge redistribution
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AT0071699U AT3853U1 (de) | 1999-10-15 | 1999-10-15 | Differentieller analog-digitalwandler |
Publications (1)
Publication Number | Publication Date |
---|---|
DE50012965D1 true DE50012965D1 (de) | 2006-07-27 |
Family
ID=3497939
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE50012965T Expired - Lifetime DE50012965D1 (de) | 1999-10-15 | 2000-10-06 | Differentieller Analog-Digitalwandler |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1093229B1 (de) |
AT (2) | AT3853U1 (de) |
DE (1) | DE50012965D1 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3657218B2 (ja) * | 2001-11-12 | 2005-06-08 | Necマイクロシステム株式会社 | 差動入力a/d変換器 |
DE102005030562B4 (de) | 2005-06-30 | 2012-04-26 | Infineon Technologies Ag | Sukzessiv approximierender Analog/Digital-Wandler |
DE102006015762B4 (de) * | 2006-04-04 | 2013-05-08 | Austriamicrosystems Ag | Analog/Digital-Wandleranordnung und Verfahren |
DE102006025116B4 (de) | 2006-05-30 | 2020-06-04 | Austriamicrosystems Ag | Einstellbare Analog-Digital-Wandleranordnung und Verfahren zur Analog-Digital-Wandlung |
CN113922820B (zh) * | 2021-12-15 | 2022-05-13 | 之江实验室 | 一种基于后台校准的间断式缓冲电路及模数转换器 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4831381A (en) * | 1987-08-11 | 1989-05-16 | Texas Instruments Incorporated | Charge redistribution A/D converter with reduced small signal error |
US4803462A (en) * | 1987-08-11 | 1989-02-07 | Texas Instruments Incorporated | Charge redistribution A/D converter with increased common mode rejection |
US5920275A (en) * | 1996-09-09 | 1999-07-06 | Iowa State University Research Foundation, Inc. | Analog-to-digital converter using weighted capacitor array and interpolating comparator |
-
1999
- 1999-10-15 AT AT0071699U patent/AT3853U1/de not_active IP Right Cessation
- 1999-10-15 AT AT00890303T patent/ATE330365T1/de not_active IP Right Cessation
-
2000
- 2000-10-06 EP EP00890303A patent/EP1093229B1/de not_active Expired - Lifetime
- 2000-10-06 DE DE50012965T patent/DE50012965D1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1093229A3 (de) | 2003-11-05 |
EP1093229B1 (de) | 2006-06-14 |
EP1093229A2 (de) | 2001-04-18 |
ATE330365T1 (de) | 2006-07-15 |
AT3853U1 (de) | 2000-08-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8327 | Change in the person/name/address of the patent owner |
Owner name: AUSTRIAMICROSYSTEMS AG, UNTERPREMSTäTTEN, AT |
|
8364 | No opposition during term of opposition |