DE50012965D1 - Differentieller Analog-Digitalwandler - Google Patents

Differentieller Analog-Digitalwandler

Info

Publication number
DE50012965D1
DE50012965D1 DE50012965T DE50012965T DE50012965D1 DE 50012965 D1 DE50012965 D1 DE 50012965D1 DE 50012965 T DE50012965 T DE 50012965T DE 50012965 T DE50012965 T DE 50012965T DE 50012965 D1 DE50012965 D1 DE 50012965D1
Authority
DE
Germany
Prior art keywords
digital converter
differential analog
differential
analog
converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE50012965T
Other languages
English (en)
Inventor
Gilbert Dipl Ing Promitzer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ams AG
Original Assignee
Austriamicrosystems AG
Austria Mikro Systeme International GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Austriamicrosystems AG, Austria Mikro Systeme International GmbH filed Critical Austriamicrosystems AG
Application granted granted Critical
Publication of DE50012965D1 publication Critical patent/DE50012965D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H03M1/0678Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
    • H03M1/068Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
    • H03M1/0682Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/38Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/46Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
    • H03M1/466Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors
    • H03M1/468Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors in which the input S/H circuit is merged with the feedback DAC array
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/74Simultaneous conversion
    • H03M1/80Simultaneous conversion using weighted impedances
    • H03M1/802Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
    • H03M1/804Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices with charge redistribution

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
DE50012965T 1999-10-15 2000-10-06 Differentieller Analog-Digitalwandler Expired - Lifetime DE50012965D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
AT0071699U AT3853U1 (de) 1999-10-15 1999-10-15 Differentieller analog-digitalwandler

Publications (1)

Publication Number Publication Date
DE50012965D1 true DE50012965D1 (de) 2006-07-27

Family

ID=3497939

Family Applications (1)

Application Number Title Priority Date Filing Date
DE50012965T Expired - Lifetime DE50012965D1 (de) 1999-10-15 2000-10-06 Differentieller Analog-Digitalwandler

Country Status (3)

Country Link
EP (1) EP1093229B1 (de)
AT (2) AT3853U1 (de)
DE (1) DE50012965D1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3657218B2 (ja) * 2001-11-12 2005-06-08 Necマイクロシステム株式会社 差動入力a/d変換器
DE102005030562B4 (de) 2005-06-30 2012-04-26 Infineon Technologies Ag Sukzessiv approximierender Analog/Digital-Wandler
DE102006015762B4 (de) * 2006-04-04 2013-05-08 Austriamicrosystems Ag Analog/Digital-Wandleranordnung und Verfahren
DE102006025116B4 (de) 2006-05-30 2020-06-04 Austriamicrosystems Ag Einstellbare Analog-Digital-Wandleranordnung und Verfahren zur Analog-Digital-Wandlung
CN113922820B (zh) * 2021-12-15 2022-05-13 之江实验室 一种基于后台校准的间断式缓冲电路及模数转换器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4831381A (en) * 1987-08-11 1989-05-16 Texas Instruments Incorporated Charge redistribution A/D converter with reduced small signal error
US4803462A (en) * 1987-08-11 1989-02-07 Texas Instruments Incorporated Charge redistribution A/D converter with increased common mode rejection
US5920275A (en) * 1996-09-09 1999-07-06 Iowa State University Research Foundation, Inc. Analog-to-digital converter using weighted capacitor array and interpolating comparator

Also Published As

Publication number Publication date
EP1093229A3 (de) 2003-11-05
EP1093229B1 (de) 2006-06-14
EP1093229A2 (de) 2001-04-18
ATE330365T1 (de) 2006-07-15
AT3853U1 (de) 2000-08-25

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: AUSTRIAMICROSYSTEMS AG, UNTERPREMSTäTTEN, AT

8364 No opposition during term of opposition