DE4390256T1 - Analog video adapter for a digital video display - Google Patents

Analog video adapter for a digital video display

Info

Publication number
DE4390256T1
DE4390256T1 DE4390256T DE4390256T DE4390256T1 DE 4390256 T1 DE4390256 T1 DE 4390256T1 DE 4390256 T DE4390256 T DE 4390256T DE 4390256 T DE4390256 T DE 4390256T DE 4390256 T1 DE4390256 T1 DE 4390256T1
Authority
DE
Germany
Prior art keywords
adapter
digital video
analog
video display
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE4390256T
Other languages
German (de)
Inventor
Jarmo Kurikko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ICL Personal Systems Oy
Original Assignee
ICL Personal Systems Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ICL Personal Systems Oy filed Critical ICL Personal Systems Oy
Publication of DE4390256T1 publication Critical patent/DE4390256T1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006Details of the interface to the display terminal
    • G09G5/008Clock recovery
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/147Digital output to display device ; Cooperation and interconnection of the display device with other functional units using display panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/005Adapting incoming signals to the display format of the display terminal
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0271Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006Details of the interface to the display terminal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
DE4390256T 1992-01-30 1993-01-29 Analog video adapter for a digital video display Withdrawn DE4390256T1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI920416A FI96647C (en) 1992-01-30 1992-01-30 Analog video connection for digital video screen
PCT/FI1993/000031 WO1993015497A1 (en) 1992-01-30 1993-01-29 Analog video interface for a digital video display

Publications (1)

Publication Number Publication Date
DE4390256T1 true DE4390256T1 (en) 1995-07-20

Family

ID=8534327

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4390256T Withdrawn DE4390256T1 (en) 1992-01-30 1993-01-29 Analog video adapter for a digital video display

Country Status (5)

Country Link
JP (1) JPH07503327A (en)
DE (1) DE4390256T1 (en)
FI (1) FI96647C (en)
GB (1) GB2278525B (en)
WO (1) WO1993015497A1 (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5715029A (en) * 1994-10-25 1998-02-03 Fergason; James L. Optical dithering system using birefringence for optical displays and method
US6184969B1 (en) 1994-10-25 2001-02-06 James L. Fergason Optical display system and method, active and passive dithering using birefringence, color image superpositioning and display enhancement
JPH08234701A (en) * 1995-02-28 1996-09-13 Sony Corp Video display device
EP0842579A1 (en) * 1995-07-28 1998-05-20 Litton Systems Canada Limited Method and apparatus for digitizing video signals especially for flat panel lcd displays
US5917461A (en) * 1996-04-26 1999-06-29 Matsushita Electric Industrial Co., Ltd. Video adapter and digital image display apparatus
JP3487119B2 (en) * 1996-05-07 2004-01-13 松下電器産業株式会社 Dot clock regeneration device
WO1997050242A2 (en) 1996-06-26 1997-12-31 Sony Electronics Inc. System and method for overlay of a motion video signal on an analog video signal
US5953074A (en) * 1996-11-18 1999-09-14 Sage, Inc. Video adapter circuit for detection of analog video scanning formats
WO1998023094A2 (en) * 1996-11-18 1998-05-28 Sage, Inc. Adapter circuit for a flat panel display monitor
US6195079B1 (en) 1996-11-18 2001-02-27 Sage, Inc. On-screen user interface for a video adapter circuit
US6078361A (en) * 1996-11-18 2000-06-20 Sage, Inc Video adapter circuit for conversion of an analog video signal to a digital display image
JPH10198302A (en) * 1997-01-10 1998-07-31 Matsushita Electric Ind Co Ltd Multi-scan type display device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63132288A (en) * 1986-11-21 1988-06-04 三菱電機株式会社 Sampling clock generator for image display unit

Also Published As

Publication number Publication date
FI96647B (en) 1996-04-15
FI920416A (en) 1993-07-31
GB2278525B (en) 1995-08-02
FI920416A0 (en) 1992-01-30
FI96647C (en) 1996-07-25
JPH07503327A (en) 1995-04-06
GB2278525A (en) 1994-11-30
GB9414763D0 (en) 1994-09-28
WO1993015497A1 (en) 1993-08-05

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Legal Events

Date Code Title Description
8133 Disposal/non-payment of the application fee
8170 Reinstatement of the former position
8110 Request for examination paragraph 44
8139 Disposal/non-payment of the annual fee