DE4021031C2 - Method of manufacturing a semiconductor device - Google Patents

Method of manufacturing a semiconductor device

Info

Publication number
DE4021031C2
DE4021031C2 DE4021031A DE4021031A DE4021031C2 DE 4021031 C2 DE4021031 C2 DE 4021031C2 DE 4021031 A DE4021031 A DE 4021031A DE 4021031 A DE4021031 A DE 4021031A DE 4021031 C2 DE4021031 C2 DE 4021031C2
Authority
DE
Germany
Prior art keywords
ball
chip
wire
bonding
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE4021031A
Other languages
German (de)
Other versions
DE4021031A1 (en
Inventor
Kiyoaki Tsumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE4021031A1 publication Critical patent/DE4021031A1/en
Application granted granted Critical
Publication of DE4021031C2 publication Critical patent/DE4021031C2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H01L21/603—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving the application of pressure, e.g. thermo-compression bonding
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  • Wire Bonding (AREA)

Description

Die Erfindung betrifft ein Verfahren zur Herstellung eines Halbleiterbauelements nach dem Oberbegriff des Patentanspruches 1.The invention relates to a method for producing a semiconductor component according to the preamble of claim 1.

Fig. 1 zeigt im Querschnitt eine Seitenansicht eines kon­ ventionellen Halbleiterbauelements. Dabei ist ein Halblei­ terchip 1 auf eine Bondinsel 3, die als Leiterrahmen dient, mit einem Epoxidharz 4, das als Chipbondmaterial dient, gebondet. Ein Al-Elektrodenkontaktfleck 5 ist auf der Ober­ fläche des Halbleiterchips 1 vorgesehen, und die Oberfläche des den Al-Elektrodenkontaktfleck 5 nicht aufweisenden Teils ist mit einem SiO2-Glasüberzug versehen, um eine Kor­ rosion der Al-Leiter aufgrund von Verunreinigungen im Gieß­ harz des Chips 1 zu verhindern. Der Al-Elektrodenkontakt­ fleck 5 und ein Innenanschluß 7 sind mit einem Cu-Draht 8 elektrisch miteinander verbunden. Eine Silberschicht 9 und 2 ist auf die Oberfläche des Innenanschlusses 7 und der Bondinsel abgeschie­ den, und sowohl die Bondinsel 3 als auch der Innenanschluß 7 sind unter Verwendung einer Kupferlegierung oder einer Eisen-Nickellegierung gebildet. Fig. 1 shows in cross section a side view of a conventional semiconductor device. Here, a semiconductor terchip 1 is bonded to a bonding island 3 , which serves as a lead frame, with an epoxy resin 4 , which serves as a chip bonding material. An Al electrode pad 5 is provided on the upper surface of the semiconductor chip 1 , and the surface of the part not having the Al electrode pad 5 is provided with an SiO 2 glass coating to prevent corrosion of the Al conductor due to impurities in the casting resin to prevent the chip 1 . The Al electrode contact spot 5 and an inner connection 7 are electrically connected to one another with a Cu wire 8 . A silver layer 9 and 2 is deposited on the surface of the inner terminal 7 and the bonding pad, and both the bonding pad 3 and the inner pad 7 are formed using a copper alloy or an iron-nickel alloy.

Fig. 2 ist ein Querschnitt durch ein anderes konventionel­ les Halbleiterbauelement, das ebenso wie in Fig. 1 aufge­ baut ist, wobei jedoch als Chipbondmaterial ein Au-Si-Lot 10 eingesetzt ist. Fig. 2 is a cross section through another conventional les semiconductor device, which is constructed in the same way as in Fig. 1, however, an Au-Si solder 10 is used as chip bond material.

Bei den vorstehend beschriebenen konventionellen Halblei­ terbauelementen ist es allgemein notwendig, ein geeignetes Chipbondmaterial auszuwählen. Ein ungeeignetes Material führt zu einer Verschlechterung des Halbleiterchips durch die Erwärmungstemperatur beim Bondvorgang und durch Über­ gangsstellenfehler beim Drahtbonden. Die Einzelheiten wer­ den nachstehend erläutert.In the conventional half lead described above It is generally necessary to use a suitable component Select chip bond material. An unsuitable material leads to deterioration of the semiconductor chip the heating temperature during the bonding process and by over Gang point error when wire bonding. The details of who explained below.

Wenn das Chipbondmaterial das Epoxidharz 4 (Fig. 1) ist, wird das Epoxidharz 4 bei niedriger Temperatur von 150-250°C ausgehärtet, wodurch der Halbleiterchip 1 nicht verschlechtert wird. Allerdings tritt ein Problem beim Drahtbonden auf.When the chip bonding material is the epoxy resin 4 ( Fig. 1), the epoxy resin 4 is cured at a low temperature of 150-250 ° C, whereby the semiconductor chip 1 is not deteriorated. However, there is a problem with wire bonding.

Die Fig. 3A und 3B sind eine Draufsicht bzw. eine Seiten­ ansicht im Querschnitt des Al-Elektrodenkontaktflecks 5 des Halbleiterchips 1, der mit dem Epoxidharz 4 auf die Chip­ bondinsel 3 gebondet ist, wenn der Al-Elektrodenkontakt­ fleck 5 mittels Salpetersäure (HNO3) ausgeätzt wird, nach­ dem eine Cu-Kugel auf den Al-Elektrodenkontaktfleck 5 ge­ bondet wurde. In diesen Zeichnungen ist zu viel Al entfernt unter Bildung eines Al-freien Teils 11, und damit wird ein SiO2-Film 13, der eine Unterschicht eines Al-Films 12 ist, freigelegt. Infolgedessen verschlechtert sich beispiels­ weise die Zuverlässigkeit einer Hochtemperatur-Lebensdauer­ prüfung, wie in der JP-OS 1-143 332 beschrieben ist. Wenn die zum Entfernen von Al führende Ultraschallenergie ver­ ringert wird, wird eine Cu-Al-Legierungsschicht nicht so gut ausgebildet, so daß die Zuverlässigkeit einer Hochtem­ peratur-Lebensdauerprüfung ebenfalls verschlechtert wird. FIGS. 3A and 3B are a plan view and a side view in cross section of the Al electrode pad 5 of the semiconductor chip 1, the bonding pad on the chip with the epoxy resin 4 is bonded 3, when the Al electrode pad 5 by means of nitric acid (HNO 3 ) is etched out after a Cu ball has been bonded to the Al electrode contact pad 5 . In these drawings, too much Al is removed to form an Al-free part 11 , and thus an SiO 2 film 13 , which is an under layer of an Al film 12, is exposed. As a result, for example, the reliability of a high-temperature life test deteriorates, as described in JP-OS 1-143 332. If the ultrasonic energy leading to Al removal is reduced, a Cu-Al alloy layer is not formed so well, so that the reliability of a high temperature life test is also deteriorated.

Als Grund hierfür wird die Tatsache angenommen, daß die Drahtbondtemperatur bei 250-300°C und die Glasübergangs­ temperatur Tg des Epoxidharzes bei 110-150°C liegt und die Cu-Kugel auf dem Al-Elektrodenkontaktfleck 5 durch Aufbrin­ gen der Ultraschallschwingungsenergie, die höher als im Fall einer allgemein verwendeten Au-Kugel ist, plastisch verformt wird. Ferner findet eine stärkere Kaltverfestigung der Cu-Kugel als im Fall der Au-Kugel statt.The reason for this is believed to be the fact that the wire bonding temperature is 250-300 ° C and the glass transition temperature Tg of the epoxy resin is 110-150 ° C and the Cu ball on the Al electrode pad 5 by applying the ultrasonic vibration energy to the higher than in the case of a commonly used Au ball, is plastically deformed. Furthermore, there is a stronger strain hardening of the Cu ball than in the case of the Au ball.

Wenn das Chipbondmaterial das Au-Si-Lot 10 (Fig. 2) ist, ist die Bondtemperatur höher als die bei 370°C liegende Liquidustemperatur des Au-Si-Lots. Dadurch entstehen Risse im Glasüberzug 6, und der Halbleiterchip 1 wird verschlech­ tert; Einzelheiten werden nachstehend erläutert.If the chip bonding material is Au-Si solder 10 ( FIG. 2), the bonding temperature is higher than the liquidus temperature of the Au-Si solder, which is 370 ° C. This causes cracks in the glass coating 6 , and the semiconductor chip 1 is deteriorated; Details are explained below.

Fig. 4A zeigt perspektivisch den Halbleiterchip 1 und die Bondinsel 3, und Fig. 4B ist im Querschnitt eine Seitenan­ sicht entlang der Linie A-A von Fig. 4A. Fig. 5 ist eine Draufsicht auf den Halbleiterchip 1, der einer Struktur­ analyse unterzogen wurde. In der Zeichnung ist ein Al-Lei­ ter 14 vollständig mit dem Glasüberzug 6 versehen. In der Strukturanalyse nach dem Bonden von Proben findet sich ein Riß im Glasüberzug 6 des Halbleiterchips 1, der mit dem Au-Si-Lot 10 auf die Bondinsel 3 gebondet ist und für die Dauer von 20 min in eine Lösung aus Phosphorsäure (H3PO4) bei 80-90°C getaucht wurde, wobei der Al-Leiter 14 unter dem Glasüberzug 6 ausgeätzt wurde. Dann verschlechtert sich im Dampfdrucktest der harzumspritzte Chip nach Verschlech­ terung des zum Umspritzen eingesetzten Harzes. Der Grund hierfür wird darin gesehen, daß der Riß 15 durch die Kon­ zentration von Beanspruchungen in einem bestimmten Teil des Glasüberzugs 6 über dem Al-Leiter 14 entsteht, weil die Wärmeausdehnungszahlen des Glasüberzugs 6 und des Halblei­ terchips 1 verschieden sind (0,65×10-6/°C für den SiO2-Überzug und 3,5×10-6/°C für den Si-Halbleiterchip). Der Grund für die Verwendung von Au-Si-Lot 10 als Chipbond­ material ist, daß die Drahtbondtemperatur höher als die­ jenige eines Au-Drahts gemacht werden sollte, um das gegen­ seitige Diffundieren zwischen dem Cu-Draht und der Al-Elek­ trode zu unterstützen. Fig. 4A shows a perspective view of the semiconductor chip 1 and the bonding pad 3, and Fig. 4B is view taken along line AA of Figure in cross section a Seitenan. 4A. Fig. 5 is a plan view of the semiconductor chip 1 which has been subjected to a structure analysis. In the drawing, an Al-Lei ter 14 is completely provided with the glass coating 6 . In the structural analysis after the bonding of samples, there is a crack in the glass coating 6 of the semiconductor chip 1 , which is bonded to the bonding island 3 with the Au-Si solder 10 and into a solution of phosphoric acid (H 3 PO 4 ) immersed at 80-90 ° C., the Al conductor 14 being etched out under the glass coating 6 . Then, in the vapor pressure test, the resin-encapsulated chip deteriorates after the resin used for the encapsulation deteriorates. The reason for this is seen in the fact that the crack 15 is caused by the concentration of stresses in a certain part of the glass coating 6 over the Al conductor 14 because the thermal expansion coefficients of the glass coating 6 and the semiconductor chip 1 are different (0.65 × 10 -6 / ° C for the SiO 2 coating and 3.5 × 10 -6 / ° C for the Si semiconductor chip). The reason for using Au-Si solder 10 as the chip bonding material is that the wire bonding temperature should be made higher than that of an Au wire in order to support the mutual diffusion between the Cu wire and the Al electrode .

Bei dem oben beschriebenen Halbleiterbauelement wird bei Verwendung von Epoxidharz als Chipbondmaterial der Halblei­ terchip nicht ausreichend fest gebondet, weil die Erwär­ mungstemperatur zum Drahtbonden höher als die Glasüber­ gangstemperatur des Epoxidharzes ist. Ferner wird die Cu- Kugel auf dem Al-Elektrodenkontaktfleck durch Aufbringen der Ultraschallschwingungsenergie, die höher als im Fall einer Au-Kugel ist, plastisch verformt, weil die Kaltver­ festigungseigenschaft der Cu-Kugel größer als diejenige der Au-Kugel ist. Dies führt zu einem Ausschluß von Al im Al- Elektrodenkontaktfleck, der darunter befindliche SiO2-Film wird freigelegt, und bei der Hochtemperatur-Lebensdauer­ prüfung verschlechtert sich die Lebensdauer des Halbleiter­ bauelements.In the semiconductor device described above, when using epoxy resin as the chip bonding material, the semiconductor chip is not bonded sufficiently because the heating temperature for wire bonding is higher than the glass transition temperature of the epoxy resin. Furthermore, the Cu ball on the Al electrode pad is plastically deformed by applying the ultrasonic vibration energy, which is higher than that in the case of an Au ball, because the work hardening property of the Cu ball is larger than that of the Au ball. This leads to an exclusion of Al in the Al electrode contact spot, the SiO 2 film underneath is exposed, and the high-temperature life test deteriorates the life of the semiconductor component.

Wenn das Au-Si-Lot eingesetzt wird, um eine höhere Erwär­ mungstemperatur zum Drahtbonden als im Fall eines Au-Drahts vorzugeben, treten Risse im Glasüberzug des Halbleiterchips bei der Erwärmungstemperatur des Chipbondvorgangs auf, und damit verschlechtert sich der harzumspritzte Chip im Dampf­ drucktest, und auch die Wirtschaftlichkeit ist nicht mehr gegeben. If the Au-Si solder is used, a higher heating temperature for wire bonding than in the case of Au wire cracks occur in the glass coating of the semiconductor chip at the heating temperature of the chip bonding process, and this deteriorates the resin-encapsulated chip in the steam pressure test, and the economy is no longer given.  

Aus der DE 34 46 780 A1 ist ein Verfahren zur metallischen Verbindung von Bauelementen, die durch Halbleiterbauelemente mit wenigstens einseitiger Metallisierung oder durch metalli­ sche Bauelemente bzw. metallische Substrate gebildet werden, bekannt, wobei zwischen den zu verbindenden Bauteilen ein mehrschichtiger Verbundwerkstoff angeordnet ist. Beim eigent­ lichen Verbindungsprozeß wird unter Wärmeeinwirkung eine Ver­ bindung der Bauteile dadurch erzielt, daß nur die den Bauteilen direkt zugewandten Oberflächenschichten des Verbundwerkstoffes angelöst werden. Ein derartiges Verfahren wird zur Chipkontak­ tierung bei Leistungshalbleiter-Bauelementen verwendet und dient der Erhöhung der Wechsellast-Festigkeit zwischen dem Halbleiterbauelement und einem Basissubstrat. Durch die ge­ wählten Verbindungswerkstoffe im Zusammenhang mit dem Lottem­ peraturbereich wird nur ein schmaler Oberflächenbereich aufge­ schmolzen. Die Problematik des Beeinflussens der Glasober­ flächenpassivierung eines Bauelementes durch den eigentlichen Verbindungs- oder Lötprozeß ist nicht angesprochen. Ebenso wenig ist dargelegt, wie sich die ausgebildete Verbindung bzw. der Verbindungswerkstoff bei einem nachfolgenden Drahtbon­ dungsprozeß unter Temperatur-Ultraschalleinfluß verhält.DE 34 46 780 A1 describes a method for metallic Connection of components by semiconductor components with at least one-sided metallization or by metalli cal components or metallic substrates are formed, known, a between the components to be connected multilayer composite material is arranged. When actually union process under heat is a Ver Binding of the components achieved in that only the components directly facing surface layers of the composite material be resolved. Such a method becomes chip contact used in power semiconductor components and serves to increase the alternating load strength between the Semiconductor device and a base substrate. By the ge chose connection materials in connection with the Lottem only a narrow surface area is applied melted. The problem of influencing the glass top surface passivation of a component by the actual one Connection or soldering process is not addressed. As well little is shown how the trained connection or the connecting material for a subsequent wire receipt development process under the influence of temperature-ultrasound.

Die DE 36 41 689 A1 lehrt ein Verfahren zur Herstellung eines Halbleiterbauelementes, das eine Elektrode aufweist, auf der ein Kontaktdraht gebondet wird. Im einzelnen wird dort offen­ bart, einen Kupferbonddraht mit einer Aluminium-Anschlußkon­ taktierung mittels eines Drahtbondverfahrens zu verbinden. Ziel ist es, gemäß der dort vorgeschlagenen Lösung einen verbesser­ ten Bondkontakt zwischen der Elektrode eines Halbleiterchips und dem Bonddraht zu schaffen, sowie die Gefahr der Beschä­ digung des Chips selbst und der Anschlußelektrode zu mini­ mieren. Hierfür wird im Sinne der Optimierung der Anschluß­ kontaktierung eine spezielle Beschaffenheit der Aluminium- Anschlußkontaktierungsschicht eingestellt. Die Kontaktie­ rungsfähigkeit der Aluminium-Anschlußkontaktierungsschicht wird durch Untersuchung des sich verändernden Querschnitts des Bondkontaktbereichs nach entsprechender Krafteinwirkung fest­ gestellt. Daraus ist jedoch bestenfalls feststellbar, welche Anpreßkräfte in einem Großserien-Drahtbondungsprozeß bei entsprechenden Aluminium-Kontaktschichteigenschaften einzu­ stellen sind, bzw. in welchem Maße die Eigenschaften, insbe­ sondere die Härte der jeweiligen Aluminium-Kontaktschichten zu wählen sind.DE 36 41 689 A1 teaches a method for producing a Semiconductor component which has an electrode on the a contact wire is bonded. The details are open there bart, a copper bond wire with an aluminum connection con to connect clocking using a wire bonding process. target is to improve according to the solution proposed there th bond contact between the electrode of a semiconductor chip and to create the bond wire, as well as the risk of damage damage to the chip itself and the connecting electrode to mini lubricate. For the purpose of optimization, this is the connection contacting a special nature of aluminum Terminal contact layer set. The contact ability of the aluminum connection contact layer by examining the changing cross section of the  Bond contact area after appropriate force posed. At best, however, it can be determined from this Contact forces in a large-volume wire bonding process appropriate aluminum contact layer properties are, or to what extent the properties, esp especially the hardness of the respective aluminum contact layers are choosing.

Aus der US-PS 4,886,200 ist es zum einen bekannt, in welchem Verhältnis der Durchmesser einer durch Flammabriß gebildeten Kugel eines Bonddrahtes bezogen auf den Durchmesser bzw. die Höhe des Bondkontaktes auszubilden ist, und wie zum anderen der Preßstempel bzw. Bondkopf hinsichtlich bestimmter Krümmungs­ radien im Übergangsbereich vom Bonddraht hin zum Nagelkopf zu gestalten ist.On the one hand, it is known from US Pat. No. 4,886,200 in which Ratio of the diameters of a flame formed Ball of a bond wire related to the diameter or Height of the bond contact is to be trained, and how is the other Press die or bond head with regard to certain curvature radii in the transition area from the bond wire to the nail head design is.

Offen bleibt dort, welche Maßnahmen zu treffen sind, um einer­ seits die im Zyklus 2 bereits erfolgte Chipkontaktierung durch nachträgliche thermische Prozesse beim Drahtbonden nicht zu gefährden und um andererseits eine bereits aufgebrachte Glas­ passivierung, die einen Aluminium-Anschlußelektrodenfleck teilweise umfaßt, beim Drahtbondungsprozeß nicht zu beschä­ digen.It remains unanswered what measures have to be taken to achieve one on the one hand, the chip contacting already made in cycle 2 subsequent thermal processes during wire bonding do not endanger and on the other hand an already applied glass passivation, which has an aluminum connection electrode spot partially included, not to be damaged in the wire bonding process dig.

Aufgabe der Erfindung ist daher die Angabe eines Verfahrens zur Herstellung eines Halbleiterbauelementes, wobei das Halblei­ terbauelement auf einen Leiterrahmen chipgebondet ist und anschließend eine Drahtkontaktierung derart erfolgt, daß ein sicheres Drahtbonden mittels Kupferbonddraht und eine ausrei­ chende Langzeitstabilität des chip- und drahtgebondeten Bauelementes gegeben ist.The object of the invention is therefore to provide a method for Manufacture of a semiconductor device, the half lead terbauelement is chip-bonded on a lead frame and then a wire contact is made such that a secure wire bonding using copper bond wire and one sufficient Long-term stability of the chip and wire bonded Component is given.

Die Lösung der Aufgabe der Erfindung erfolgt mit den Merkmalen des Patentanspruches 1, wobei Ausgestaltungen und Weiterbil­ dungen der Erfindung in den Unteransprüchen umfaßt sind.The object of the invention is achieved with the features of claim 1, wherein refinements and refinement end of the invention in the dependent claims are included.

Die Erfindung wird nachstehend anhand der Beschreibung von Ausfüh­ rungsbeispielen und unter Bezugnahme auf die beiliegenden Zeichnungen näher erläutert. Die Zeichnungen zeigen inThe invention is as follows based on the description of exec example and with reference to the enclosed Drawings explained in more detail. The drawings show in

Fig. 1 und 2 seitliche Querschnittsansichten konventionel­ ler Halbleiterbauelemente; Fig. 1 and 2 cross-sectional side views konvent ionel ler semiconductor devices;

Fig. 3A und 3B eine Draufsicht bzw. eine seitliche Quer­ schnittsansicht des Al-Elektrodenkontaktflecks eines konventionellen Halbleiterbauelements, das einer Strukturanalyse unterzogen wurde; . 3A and 3B are a plan view and a side cross-sectional view of the Al electrode pad of a conventional semiconductor device which has been subjected to structural analysis;

Fig. 4A und 4B eine Perspektivansicht bzw. eine seitliche Querschnittsansicht eines konventionellen Halbleiterbauelements nach dem Chipbonden; FIGS. 4A and 4B are a perspective view and a side cross-sectional view of a conventional semiconductor device after the die-bonding;

Fig. 5 eine Draufsicht auf einen Halbleiterchip, bei dem ein Riß in einem Glasüberzug nach dem Chipbonden und dem Eintauchen in eine Phos­ phorsäurelösung einer Strukturanalyse unter­ zogen wurde; Fig. 5 is a plan view of a semiconductor chip in which a crack in a glass coating after chip bonding and immersion in a phosphoric acid solution was subjected to a structural analysis;

Fig. 6 eine seitliche Querschnittsansicht eines Halb­ leiterbauelements gemäß einem Ausführungsbei­ spiel der Erfindung; Fig. 6 is a side cross-sectional view of a semiconductor component according to an embodiment of the invention;

Fig. 7 eine schematische Darstellung der Anordnung bei einem Drahtbondschritt nach Bildung einer Cu-Kugel; Fig. 7 is a schematic representation of the arrangement for a wire bonding step after formation of a Cu-ball;

Fig. 8 und 10 jeweils seitliche Querschnittsansichten, wobei eine Cu-Kugel mit einem Al-Elektrodenkontakt­ fleck verbunden ist; Figures 8 and 10 are side cross-sectional views, wherein a Cu ball is connected to an Al electrode contact spot;

Fig. 9 ein Diagramm, das die Beziehung zwischen der Höhe einer Cu-Kugel und der Zeit zwischen der Bildung der Cu-Kugel und deren Kontakt mit einem Al-Elektrodenkontaktfleck zeigt; Fig. 9 is a graph showing the relationship between the height of a Cu ball and the time between the formation of the Cu ball and its contact with an Al electrode pad;

Fig. 11 ein Weibull-Diagramm, das die Ergebnisse der Hochtemperatur-Lebensdauerprüfung eines Halb­ leiterbauelements nach einem Ausführungsbeispiel der Erfindung und eines konventionellen Halbleiterbauelements zeigt; FIG. 11 is a Weibull chart showing the results of high-temperature life test of a semiconductor device according to an embodiment of the invention and of a conventional semiconductor device;

Fig. 12 ein Weibull-Diagramm, das die Ergebnisse eines Dampfdrucktests eines Halbleiterbauelements nach einem Ausführungsbeispiel der Erfindung und eines konventionellen Halbleiterbauelements zeigt; Figure 12 is a Weibull chart showing the results of a vapor pressure test of a semiconductor device according to an embodiment of the invention and a conventional semiconductor device.

Fig. 13A und 13B jeweils eine Draufsicht und eine seitliche Querschnittsansicht eines Al-Elektrodenkon­ taktflecks nach dem Ätzen einer darauf befind­ lichen Cu-Kugel mit Salpetersäure; und 13A and 13B are respectively a plan view and a side cross-sectional view of an Al-Elektrodenkon clock flecks after etching thereon befind union Cu-ball with nitric acid. and

Fig. 14 eine Draufsicht auf einen Halbleiterchip, an dem eine Strukturanalyse eines Risses im Glas­ überzug beim Chipbonden und Eintauchen in einer Phosphorsäurelösung durchgeführt wurde. Shows a plan view was performed on a semiconductor chip, on which a structural analysis of a crack in the glass coating in the die bonding, and immersing in a phosphoric acid solution. 14,.

Die Erfindung unterscheidet sich vom Stand der Technik erstens dadurch, daß ungeachtet der Änderung eines Leiter­ materials von Au zu Cu ein zu lösendes Problem beim Stand der Technik nicht deutlich analysiert ist, und zwar war es dort nicht möglich, die Zuverlässigkeit eines Bauelements zu verbessern und die Massenfertigung zu erlauben. The invention differs from the prior art firstly, regardless of the change in a ladder materials from Au to Cu a problem to be solved at the stand technology is not clearly analyzed, and it was not possible there the reliability of a component to improve and allow mass production.  

Die Liquidustemperatur des Chipbondmaterials, z. B. von Pb-5-%-Sn-Lot, das allgemein vorteilhaft ist, wird so gewählt, daß sie bei 370°C oder darunter liegt, so daß die Ausbildung von Rissen im Glasüberzug bei der Erwärmungs­ temperatur des Halbleiterchips vermieden wird.The liquidus temperature of the chip bond material, e.g. B. Pb-5% - Sn-Lot, which is generally advantageous, so chosen to be 370 ° C or below so that the Formation of cracks in the glass coating during heating temperature of the semiconductor chip is avoided.

Schließlich ist die Zeitdauer zwischen der Ausbildung der Cu-Kugel und deren Kontakt mit dem Al-Elektrodenkontakt­ fleck mit 150 ms oder weniger vorgegeben, denn je länger diese Zeitdauer ist, desto dicker wächst die Oxidschicht auf die Oberfläche der Cu-Kugel auf, wodurch die Kaltver­ festigungseigenschaft der Cu-Kugel verschlechtert und die Wärmeenergie in der Cu-Kugel selbst vermindert wird. Ferner ist die Höhe der flachgepreßten Cu-Kugel nach dem Preßvor­ gang möglichst klein, d. h. mit 25 µm oder weniger, vorge­ geben.After all, the period between training the Cu ball and its contact with the Al electrode contact Spot specified with 150 ms or less, because the longer the longer the oxide layer grows on the surface of the Cu ball, causing the cold ver strengthening property of the Cu ball deteriorated and the Thermal energy in the Cu ball itself is reduced. Further is the height of the flat-pressed copper ball after the pressing gear as small as possible, d. H. with 25 µm or less, pre give.

Die Erfindung wird nachstehend im einzelnen erläutert. Fig. 6 ist eine seitliche Querschnittsansicht eines Ausführungs­ beispiels, wobei die Bezugszeichen 1-3 und 5-9 denjenigen des konventionellen Halbleiterbauelements entsprechen. Beispielsweise ist eine Ti-Ni-Au-Schicht als Au-Metalli­ sierungsschicht 16 auf der Rückseite des Halbleiterchips 1 vorgesehen, und Pb-5-%-Sn-Lot befindet sich als Lot 17 zwi­ schen der Metallisierungsschicht 16 und der abgeschiedenen Silberschicht 2 auf der Bondinsel 3, so daß der Halbleiter­ chip 1 mit der Bondinsel 3 verbindbar ist.The invention is explained in detail below. Fig. 6 is a side cross-sectional view of an embodiment, wherein the reference numerals 1-3 and 5-9 correspond to those of the conventional semiconductor device. For example, a Ti-Ni-Au layer is provided as the Au metallization layer 16 on the rear side of the semiconductor chip 1 , and Pb-5% - Sn solder is present as solder 17 between the metallization layer 16 and the deposited silver layer 2 the bond pad 3 so that the semiconductor chip 1 can be connected to the bond pad 3 .

Fig. 7 zeigt schematisch die Anordnung bei einem Drahtbond­ vorgang nach der Bildung einer Cu-Kugel. Dabei wird über dem Halbleiterchip 1 eine Thermokompressionskapillare 18 gehalten, um die Cu-Kugel 8a auf den Al-Elektrodenkontakt­ fleck 5 zu pressen, und unter der Bondinsel 3 befindet sich ein Heizblock 19 zum Erwärmen der Bondinsel 3. Fig. 7 shows schematically the arrangement in a wire bond process after the formation of a Cu ball. Here, a Thermokompressionskapillare 18 is held above the semiconductor chip 1 to the Cu ball 8a on the Al electrode pad 5 to press and below the bonding pad 3 there is a heat block 19 for heating the bonding pad. 3

Bei diesem Halbleiterbauelement wird die Cu-Kugel 8a ge­ meinsam mit der Thermokompressionskapillare 18 nach unten auf den Al-Elektrodenkontaktfleck 5 bewegt, wie Fig. 8 zeigt, eine Kraft von ca. 150 g wird auf den Al-Elektro­ denkontaktfleck 5 aufgebracht, Ultraschallenergie wird durch die Thermokompressionskapillare 18 zugeführt, und Heizenergie (ca. 280°C) wird vom Heizblock 19 zugeführt.In this semiconductor device, the Cu ball 8 a is moved together with the thermocompression capillary 18 down to the Al electrode contact pad 5 , as shown in FIG. 8, a force of approximately 150 g is applied to the Al electrode contact pad 5 , ultrasonic energy is supplied through the thermocompression capillary 18 , and heating energy (approx. 280 ° C.) is supplied from the heating block 19 .

Um den quantitativen Wert der plastischen Verformung der Cu-Kugel 8a zu verdeutlichen, sei gesagt, daß die Cu-Kugel 8a mit dem Al-Elektrodenkontaktfleck 5 unter Aufbringen der gleichen Ultraschallenergiemenge durch die Thermokompres­ sionskapillare 18 verbunden wurde, wobei die Höhe der Cu- Kugel 8a (flachgepreßt) gemessen wurde, während die Zeit­ dauer t zwischen der Ausbildung der Cu-Kugel 8a und deren Kontakt mit dem Al-Elektrodenkontaktfleck 5 variiert wurde.In order to clarify the quantitative value of the plastic deformation of the Cu ball 8 a, it should be said that the Cu ball 8 a was connected to the Al electrode contact pad 5 by applying the same amount of ultrasonic energy through the thermocompression capillary 18 , the height of the Cu - Ball 8 a (flattened) was measured, while the time t between the formation of the Cu ball 8 a and its contact with the Al electrode contact pad 5 was varied.

Die Meßergebnisse sind in Fig. 9 gezeigt. Aus dem Diagramm ist ersichtlich, daß während einer Zeitdauer t von weniger als 150 ms die Höhe der Cu-Kugel 8a nahezu konstant ist, wogegen in der über 150 ms hinausgehenden Zeit die Höhe der Cu-Kugel 8a nicht konstant gehalten wird und erheblich schwankt. Daraus ergibt sich, daß sich die plastische Verformbarkeit der Cu-Kugel 8a mit zunehmender Zeitdauer t verringert und daß auch vom Gesichtspunkt der mechanischen Grenzen der verwendeten Fertigungsvorrichtung eine Zeitdauer von weni­ ger als 150 ms die beste Bedingung darstellt. Ferner wird eine Zeitdauer t von weniger als 120 ms bevorzugt, und mit einer Zeitdauer von 150-100 ms werden sehr gute Ergebnisse erzielt. The measurement results are shown in Fig. 9. From the diagram it can be seen that the height of the Cu ball 8 a is almost constant during a time period t of less than 150 ms, whereas in the time exceeding 150 ms the height of the Cu ball 8 a is not kept constant and considerably fluctuates. It follows that the plastic deformability of the Cu ball 8 a decreases with increasing time t and that from the point of view of the mechanical limits of the manufacturing device used, a time of less than 150 ms is the best condition. Furthermore, a time period t of less than 120 ms is preferred, and very good results are achieved with a time period of 150-100 ms.

Wenn die Höhe der flachgepreßten Cu-Kugel 8a 25 µm oder weniger beträgt, kann die Cu-Al-Legierung ohne jede Beschä­ digung des Halbleiterchips 1 sicher gebildet werden, wäh­ rend bei einer Höhe von mehr als 25 µm eine solche Legie­ rung nicht in befriedigender Weise ohne Beschädigung des Halbleiterchips 1 möglich ist, so daß sich eine Verschlech­ terung der Zuverlässigkeit des Bauelements ergeben kann. Im Fall des Thermokompressions-Kapillarchips 18a von Fig. 10 ist die Höhe h der Cu-Kugel 8a (flachgepreßt) als die kür­ zeste Entfernung zwischen der Vertiefung 8b der Cu-Kugel 8a und dem Al-Elektrodenkontaktfleck 5 definiert. In Fig. 9 zeigt die Kurve A die Ergebnisse, wenn die gebildete Cu- Kugel 8a kleinen Durchmesser hat, während die Kurve B die Ergebnisse zeigt, wenn die gebildete Cu-Kugel 8a großen Durchmesser hat. Allgemein beträgt der Durchmesser des Cu- Drahts 8 ca. 25 µm, und der Durchmesser der Cu-Kugel 8a (flachgepreßt) beträgt 100 µm oder weniger.If the height of the flat-pressed Cu ball 8 a 25 microns or less, the Cu-Al alloy can be safely formed without any damage to the semiconductor chip 1 , while such a alloy not in at a height of more than 25 microns is satisfactorily possible without damage to the semiconductor chip 1 , so that a deterioration in the reliability of the component can result. In the case of the thermocompression capillary chip 18 a of FIG. 10, the height h of the Cu ball 8 a (pressed flat) is defined as the shortest distance between the recess 8 b of the Cu ball 8 a and the Al electrode contact pad 5 . In Fig. 9, curve A shows the results when the Cu ball formed 8 a small diameter, while the curve B shows the results when the formed Cu-ball 8 a large diameter. In general, the diameter of the Cu wire 8 is approximately 25 µm, and the diameter of the Cu ball 8 a (pressed flat) is 100 µm or less.

Es wurden bei 200°C Hochtemperatur-Lebensdauertests durch­ geführt, um die Lebensdauer des Halbleiterbauelements zu ermitteln, und dabei wurde das Weibull-Diagramm nach Fig. 11 erstellt. Daraus ist ersichtlich, daß die Lebensdauer (Kurve C) des Halbleiterbauelements nach der Erfindung ge­ genüber der Lebensdauer (Kurve D) des bekannten Halbleiter­ bauelements wesentlich verbessert ist. Dampfdrucktests bei 121°C und einer relativen Feuchte von 100% wurden durch­ geführt, um die Lebensdauer des Halbleiterbauelements zu ermitteln, und dabei wurde das Weibull-Diagramm nach Fig. 12 erstellt. Daraus ist ersichtlich, daß die Lebensdauer (Kurve E) des Halbleiterbauelements nach der Erfindung ge­ genüber der Lebensdauer (Kurve F) des konventionellen Halb­ leiterbauelements wesentlich verbessert ist. Diese ausge­ zeichneten Ergebnisse werden auch durch die Strukturanalyse dieses Halbleiterchips gestützt. Die Fig. 13A und 13B sind eine Draufsicht bzw. eine seitliche Querschnittsansicht des Al-Elektrodenkontaktflecks nach dem Ausätzen der Cu-Kugel 8a mit Salpetersäure (HNO3). Al ist zwar, wie die Zeich­ nungen zeigen, geringfügig entfernt unter Bildung eines weniger Al aufweisenden Teils 11, aber die unter der Al- Schicht befindliche SiO2-Schicht 13 ist nicht freigelegt. Wenn ferner, wie Fig. 14 zeigt, der thermokompressionsge­ bondete Halbleiterchip 1 in eine Phosphorsäurelösung (H3PO4- Lösung) bei 80-90°C für die Dauer von 20 min getaucht wurde, wurde keine Korrosion der Al-Leiter und kein Riß im Glasüberzug gefunden.High temperature life tests were conducted at 200 ° C to determine the life of the semiconductor device, and thereby the Weibull diagram of Fig. 11 was prepared. It can be seen that the life (curve C) of the semiconductor device according to the invention compared to the life (curve D) of the known semiconductor device is significantly improved. Vapor pressure tests at 121 ° C and a relative humidity of 100% were carried out to determine the life of the semiconductor device, and thereby the Weibull diagram of Fig. 12 was prepared. It can be seen that the life (curve E) of the semiconductor device according to the invention compared to the life (curve F) of the conventional semiconductor device is significantly improved. These excellent results are also supported by the structural analysis of this semiconductor chip. FIGS. 13A and 13B are a plan view and a side cross-sectional view of the Al electrode pad by the etching of the Cu ball 8 a with nitric acid (HNO 3). Al is, as the drawings show, slightly removed to form a part 11 containing less Al, but the SiO 2 layer 13 located under the Al layer is not exposed. Further, as shown in Fig. 14, when the thermocompression-bonded semiconductor chip 1 was immersed in a phosphoric acid solution (H 3 PO 4 solution) at 80-90 ° C for 20 minutes, no corrosion of the Al conductor and no crack occurred found in the glass cover.

Bei dem obigen Ausführungsbeispiel wird zwar als Lotmate­ rial Pb-5-%-Sn-Lot eingesetzt, aber es können in gleicher Weise andere Lote mit Liquidustemperaturen von 370°C oder weniger eingesetzt werden. Beispielsweise kann Lotmaterial aus Pb-Sn (5% oder mehr Sn), Pb-Ag, Pb-In, Sn-Ag, Pb-Ag-Sn, Pb-Ag-In und dergleichen eingesetzt werden. Fer­ ner wird zwar als Metallisierung 16 eine Ti-Ni-Au-Schicht verwendet, aber die Schichtoberfläche kann mit Au oder Ag metallisiert sein, z. B. kann als Metallisierungsschicht eine Ag-Metallisierungsschicht wie Cr-Ag oder dergleichen verwendet werden.In the above embodiment, Pb-5% Sn solder is used as the solder material, but other solders with liquidus temperatures of 370 ° C. or less can be used in the same way. For example, solder material made of Pb-Sn (5% or more Sn), Pb-Ag, Pb-In, Sn-Ag, Pb-Ag-Sn, Pb-Ag-In and the like can be used. Although a Ti-Ni-Au layer is used as the metallization 16 , the layer surface can be metallized with Au or Ag, e.g. For example, an Ag metallization layer such as Cr-Ag or the like can be used as the metallization layer.

Claims (3)

1. Verfahren zur Herstellung eines Halbleiterbauelementes, wobei das Bauelement auf einem Leiterrahmen chipgebondet ist und eine Drahtkontaktierung mittels Kupferbonddraht mit einem Durchmesser von im wesentlichen 25 µm auf einem Al-Elektroden­ anschlußfleck vorgenommen wird und am kontaktierungsseitigen Ende des Bonddrahtes eine Cu-Kugel mittels Flammabriß ausge­ bildet wird, gekennzeichnet durch die folgenden Verfahrensschritte:
  • - Chipbondung innerhalb eines Niedrigtemperaturbereiches von 370°C, wobei die Temperaturobergrenze mit dem Ziel der Vermeidung von Rißbildung durch unterschiedliche Wärmeaus­ dehnung zwischen Glasüberzug und Halbleiterchip ausgewählt wird;
  • - Absenken der Cu-Kugel und schutzgasfreies Kontaktieren derselben mit dem Al-Elektrodenanschlußfleck auf dem Halbleiterchip innerhalb einer Zeitdauer von 100 bis 150 ms von Beginn der Bildung der Cu-Kugel an bis zum Pressen der Cu-Kugel an den Al-Elektrodenanschlußfleck zum Erhalt der Wärmeenergie in der Kugel und der Kaltverfestigungseigen­ schaft,
  • - daß die Höhe der gepreßten Cu-Kugel im Bereich 25 µm liegt,
  • - und daß die Drahtbondtemperatur gleich oder kleiner der vorgegebenen Chipbondtemperatur ist.
1. A method for producing a semiconductor component, wherein the component is chip-bonded on a lead frame and a wire contact is made by means of copper bonding wire with a diameter of essentially 25 μm on an Al electrode connection spot and a Cu ball is removed by flame tearing at the contacting end of the bonding wire is characterized by the following process steps:
  • - Chip bonding within a low temperature range of 370 ° C, the upper temperature limit with the aim of avoiding crack formation by different thermal expansion between glass coating and semiconductor chip is selected;
  • - Lowering of the Cu ball and contacting it without protective gas with the Al electrode connection pad on the semiconductor chip within a period of 100 to 150 ms from the beginning of the formation of the Cu ball to the pressing of the Cu ball on the Al electrode connection pad to obtain the Thermal energy in the ball and the work hardening property,
  • - that the height of the pressed Cu ball is in the range of 25 µm,
  • - And that the wire bond temperature is equal to or less than the predetermined chip bond temperature.
2. Verfahren nach Anspruch 1, gekennzeichnet durch eine Zeitdauer von 120 ms vom Beginn der Bildung der Cu-Kugel an bis zum Pressen der Cu-Kugel an den Al-Elektrodenanschluß­ fleck. 2. The method according to claim 1, marked by a period of 120 ms from the start of the formation of the Cu ball until the Cu ball is pressed onto the Al electrode connection spot.   3. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß die Drahtbondtemperatur im wesentlichen 280°C beträgt.3. The method according to claim 1 or 2, characterized, that the wire bonding temperature is essentially 280 ° C.
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DE2628433B2 (en) * 1976-06-24 1978-09-07 Focke & Pfuhl, 3090 Verden Pack with slider and sleeve
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JPS5873127A (en) * 1981-10-28 1983-05-02 Hitachi Ltd Solder melting connection for ic chip
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DE3641524A1 (en) * 1985-12-10 1987-06-11 Mitsubishi Electric Corp Method of fabricating a semiconductor component
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