DE4021031A1 - SEMICONDUCTOR COMPONENT AND METHOD FOR THE PRODUCTION THEREOF - Google Patents
SEMICONDUCTOR COMPONENT AND METHOD FOR THE PRODUCTION THEREOFInfo
- Publication number
- DE4021031A1 DE4021031A1 DE4021031A DE4021031A DE4021031A1 DE 4021031 A1 DE4021031 A1 DE 4021031A1 DE 4021031 A DE4021031 A DE 4021031A DE 4021031 A DE4021031 A DE 4021031A DE 4021031 A1 DE4021031 A1 DE 4021031A1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor chip
- semiconductor
- ball
- metallization layer
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 78
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 238000000034 method Methods 0.000 title claims description 7
- 239000010949 copper Substances 0.000 claims description 58
- 239000011248 coating agent Substances 0.000 claims description 20
- 238000000576 coating method Methods 0.000 claims description 20
- 239000011521 glass Substances 0.000 claims description 20
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 19
- 229910000679 solder Inorganic materials 0.000 claims description 18
- 229910052802 copper Inorganic materials 0.000 claims description 15
- 229910052782 aluminium Inorganic materials 0.000 claims description 13
- 238000001465 metallisation Methods 0.000 claims description 13
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 12
- 239000004020 conductor Substances 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 229910052709 silver Inorganic materials 0.000 claims description 8
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical group [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 5
- 239000004332 silver Substances 0.000 claims description 5
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 229910017980 Ag—Sn Inorganic materials 0.000 claims description 2
- 229910020174 Pb-In Inorganic materials 0.000 claims description 2
- 229910020836 Sn-Ag Inorganic materials 0.000 claims description 2
- 229910020988 Sn—Ag Inorganic materials 0.000 claims description 2
- 229910052718 tin Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical group [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 2
- 239000000463 material Substances 0.000 description 17
- 238000010438 heat treatment Methods 0.000 description 9
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 8
- 229910004298 SiO 2 Inorganic materials 0.000 description 7
- 239000003822 epoxy resin Substances 0.000 description 7
- 229920000647 polyepoxide Polymers 0.000 description 7
- 229910015365 Au—Si Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000012916 structural analysis Methods 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 4
- 239000004033 plastic Substances 0.000 description 4
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 3
- 229910017604 nitric acid Inorganic materials 0.000 description 3
- 238000005482 strain hardening Methods 0.000 description 3
- 229910017767 Cu—Al Inorganic materials 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000007717 exclusion Effects 0.000 description 2
- 230000009477 glass transition Effects 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- 241001676573 Minium Species 0.000 description 1
- 229910020220 Pb—Sn Inorganic materials 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000002604 ultrasonography Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
- H01L21/603—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving the application of pressure, e.g. thermo-compression bonding
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Description
Die Erfindung betrifft ein Halbleiterbauelement, bei dem ein feiner Kupferdraht (Cu-Draht) als Drahtmaterial und ein Chipbondmaterial mit einer vorgegebenen physikalischen Eigenschaft zum Bonden eines Halbleiterchips auf eine Bond insel verwendet wird. Ferner betrifft die Erfindung ein Verfahren zur Herstellung eines Halbleiterbauelements, wobei eine Kupfer- bzw. Cu-Kugel innerhalb einer vorgege benen Zeit in Kontakt mit einem Aluminium- bzw. Al-Elektro denkontaktfleck gebracht wird und die Höhe der zusammenge preßten Cu-Kugel vorgegeben ist.The invention relates to a semiconductor component in which a fine copper wire (Cu wire) as wire material and a Chip bond material with a given physical Property for bonding a semiconductor chip to a bond island is used. The invention further relates to a Method for producing a semiconductor component, with a copper or Cu ball inside a given time in contact with an aluminum or aluminum electrical system the contact patch is brought and the amount of the merged pressed Cu ball is specified.
Fig. 1 zeigt im Querschnitt eine Seitenansicht eines kon ventionellen Halbleiterbauelements. Dabei ist ein Halblei terchip 1 auf eine Bondinsel 3, die als Leiterrahmen dient, mit einem Epoxidharz 4, das als Chipbondmaterial dient, gebondet. Ein Al-Elektrodenkontaktfleck 5 ist auf der Ober fläche des Halbleiterchips 1 vorgesehen, und die Oberfläche des den Al-Elektrodenkontaktfleck 5 nicht aufweisenden Teils ist mit einem SiO2-Glasüberzug versehen, um eine Kor rosion der Al-Leiter aufgrund von Verunreinigungen im Gieß harz des Chips 1 zu verhindern. Der Al-Elektrodenkontakt fleck 5 und ein Innenanschluß 7 sind mit einem Cu-Draht 8 elektrisch miteinander verbunden. Eine Silberschicht 9 und 2 ist auf die Oberfläche des Innenanschlusses 7 abgeschie den, und sowohl die Bondinsel 3 als auch der Innenanschluß 7 sind unter Verwendung einer Kupferlegierung oder einer Eisen-Nickellegierung gebildet. Fig. 1 shows in cross section a side view of a conventional semiconductor device. Here, a semiconductor terchip 1 is bonded to a bonding island 3 , which serves as a lead frame, with an epoxy resin 4 , which serves as a chip bonding material. An Al electrode pad 5 is provided on the upper surface of the semiconductor chip 1 , and the surface of the portion not having the Al electrode pad 5 is provided with an SiO 2 glass coating to prevent corrosion of the Al conductor due to impurities in the casting resin to prevent the chip 1 . The Al electrode contact spot 5 and an inner connection 7 are electrically connected to one another with a Cu wire 8 . A silver layer 9 and 2 is deposited on the surface of the inner terminal 7 , and both the bonding pad 3 and the inner terminal 7 are formed using a copper alloy or an iron-nickel alloy.
Fig. 2 ist ein Querschnitt durch ein anderes konventionel les Halbleiterbauelement, das ebenso wie in Fig. 1 aufge baut ist, wobei jedoch als Chipbondmaterial ein Au-Si-Lot 10 eingesetzt ist. FIG. 2 is a cross section through another conventional semiconductor component which is constructed in the same way as in FIG. 1, but using an Au-Si solder 10 as the chip bonding material.
Bei den vorstehend beschriebenen konventionellen Halblei terbauelementen ist es allgemein notwendig, ein geeignetes Chipbondmaterial auszuwählen. Ein ungeeignetes Material führt zu einer Verschlechterung des Halbleiterchips durch die Erwärmungstemperatur beim Bondvorgang und durch Über gangsstellenfehler beim Drahtbonden. Die Einzelheiten wer den nachstehend erläutert.In the conventional half lead described above It is generally necessary to use a suitable component Select chip bond material. An unsuitable material leads to deterioration of the semiconductor chip the heating temperature during the bonding process and by over gaps in wire bonding. The details of who explained below.
Wenn das Chipbondmaterial das Epoxidharz 4 (Fig. 1) ist, wird das Epoxidharz 4 bei niedriger Temperatur von 150-250°C ausgehärtet, wodurch der Halbleiterchip 1 nicht verschlechtert wird. Allerdings tritt ein Problem beim Drahtbonden auf.When the chip bonding material is the epoxy resin 4 ( Fig. 1), the epoxy resin 4 is cured at a low temperature of 150-250 ° C, whereby the semiconductor chip 1 is not deteriorated. However, there is a problem with wire bonding.
Die Fig. 3A und 3B sind eine Draufsicht bzw. eine Seiten ansicht im Querschnitt des Al-Elektrodenkontaktflecks 5 des Halbleiterchips 1, der mit dem Epoxidharz 4 auf die Chip bondinsel 3 gebondet ist, wenn der Al-Elektrodenkontakt fleck 5 mittels Salpetersäure (HNO3) ausgeätzt wird, nach dem eine Cu-Kugel auf den Al-Elektrodenkontaktfleck 5 ge bondet wurde. In diesen Zeichnungen ist zu viel Al entfernt unter Bildung eines Al-freien Teils 11, und damit wird ein SiO2-Film 13, der eine Unterschicht eines Al-Films 12 ist, freigelegt. Infolgedessen verschlechtert sich beispiels weise die Zuverlässigkeit einer Hochtemperatur-Lebensdauer prüfung, wie in der JP-OS 1-1 43 332 beschrieben ist. Wenn die zum Entfernen von Al führende Ultraschallenergie ver ringert wird, wird eine Cu-Al-Legierungsschicht nicht so gut ausgebildet, so daß die Zuverlässigkeit einer Hochtem peratur-Lebensdauerprüfung ebenfalls verschlechtert wird. FIGS. 3A and 3B are a plan view and a side view in cross section of the Al electrode pad 5 of the semiconductor chip 1, the bonding pad on the chip with the epoxy resin 4 is bonded 3, when the Al electrode pad 5 by means of nitric acid (HNO 3 ) is etched out after a Cu ball has been bonded to the Al electrode contact pad 5 . In these drawings, too much Al is removed to form an Al-free part 11 , and thus an SiO 2 film 13 , which is an underlayer of an Al film 12, is exposed. As a result, for example, the reliability of a high-temperature life test deteriorates, as described in JP-OS 1-1 43 332. If the ultrasonic energy leading to Al removal is reduced, a Cu-Al alloy layer is not formed so well, so that the reliability of a high temperature life test is also deteriorated.
Als Grund hierfür wird die Tatsache angenommen, daß die Drahtbondtemperatur bei 250-300°C und die Glasübergangs temperatur Tg des Epoxidharzes bei 110-150°C liegt und die Cu-Kugel auf dem Al-Elektrodenkontaktfleck 5 durch Aufbrin gen der Ultraschallschwingungsenergie, die höher als im Fall einer allgemein verwendeten Au-Kugel ist, plastisch verformt wird. Ferner findet eine stärkere Kaltverfestigung der Cu-Kugel als im Fall der Au-Kugel statt.The reason for this is believed to be the fact that the wire bonding temperature is 250-300 ° C and the glass transition temperature Tg of the epoxy resin is 110-150 ° C and the Cu ball on the Al electrode pad 5 by applying the ultrasonic vibration energy, the higher than in the case of a commonly used Au ball, is plastically deformed. Furthermore, there is a stronger strain hardening of the Cu ball than in the case of the Au ball.
Wenn das Chipbondmaterial das Au-Si-Lot 10 (Fig. 2) ist, ist die Bondtemperatur höher als die bei 370°C liegende Liquidustemperatur des Au-Si-Lots. Dadurch entstehen Risse im Glasüberzug 6, und der Halbleiterchip 1 wird verschlech tert; Einzelheiten werden nachstehend erläutert.If the chip bonding material is Au-Si solder 10 ( FIG. 2), the bonding temperature is higher than the liquidus temperature of the Au-Si solder, which is 370 ° C. This causes cracks in the glass coating 6 , and the semiconductor chip 1 is deteriorated; Details are explained below.
Fig. 4A zeigt perspektivisch den Halbleiterchip 1 und die Bondinsel 3, und Fig. 4B ist im Querschnitt eine Seitenan sicht entlang der Linie A-A von Fig. 4A. Fig. 5 ist eine Draufsicht auf den Halbleiterchip 1, der einer Struktur analyse unterzogen wurde. In der Zeichnung ist ein Al-Lei ter 14 vollständig mit dem Glasüberzug 6 versehen. In der Strukturanalyse nach dem Bonden von Proben findet sich ein Riß im Glasüberzug 6 des Halbleiterchips 1, der mit dem Au-Si-Lot 10 auf die Bondinsel 3 gebondet ist und für die Dauer von 20 min in eine Lösung aus Phosphorsäure (H3PO4) bei 80-90°C getaucht wurde, wobei der Al-Leiter 14 unter dem Glasüberzug 6 ausgeätzt wurde. Dann verschlechtert sich im Dampfdrucktest der harzumspritzte Chip nach Verschlech terung des zum Umspritzen eingesetzten Harzes. Der Grund hierfür wird darin gesehen, daß der Riß 15 durch die Kon zentration von Beanspruchungen in einem bestimmten Teil des Glasüberzugs 6 über dem Al-Leiter 14 entsteht, weil die Wärmeausdehnungszahlen des Glasüberzugs 6 und des Halblei terchips 1 verschieden sind (0,65×10-6/°C für den SiO2-Überzug und 3,5×10-6/°C für den Si-Halbleiterchip). Der Grund für die Verwendung von Au-Si-Lot 10 als Chipbond material ist, daß die Drahtbondtemperatur höher als die jenige eines Au-Drahts gemacht werden sollte, um das gegen seitige Diffundieren zwischen dem Cu-Draht und der Al-Elek trode zu unterstützen. FIG. 4A shows the semiconductor chip 1 and the bond pad 3 in perspective, and FIG. 4B is a side view in cross section along the line AA of FIG. 4A. Fig. 5 is a plan view of the semiconductor chip 1 , which has been subjected to a structure analysis. In the drawing, an Al-Lei ter 14 is completely provided with the glass coating 6 . In the structural analysis after the bonding of samples, there is a crack in the glass coating 6 of the semiconductor chip 1 , which is bonded to the bonding island 3 with the Au-Si solder 10 and into a solution of phosphoric acid (H 3 PO 4 ) immersed at 80-90 ° C., the Al conductor 14 being etched out under the glass coating 6 . Then, in the vapor pressure test, the resin-encapsulated chip deteriorates after the resin used for the encapsulation deteriorates. The reason for this is seen in the fact that the crack 15 is caused by the concentration of stresses in a certain part of the glass coating 6 over the Al conductor 14 because the thermal expansion coefficients of the glass coating 6 and the semiconductor chip 1 are different (0.65 × 10 -6 / ° C for the SiO 2 coating and 3.5 × 10 -6 / ° C for the Si semiconductor chip). The reason for using Au-Si solder 10 as the chip bonding material is that the wire bonding temperature should be made higher than that of an Au wire in order to support the mutual diffusion between the Cu wire and the Al electrode .
Bei dem oben beschriebenen Halbleiterbauelement wird bei Verwendung von Epoxidharz als Chipbondmaterial der Halblei terchip nicht ausreichend fest gebondet, weil die Erwär mungstemperatur zum Drahtbonden höher als die Glasüber gangstemperatur des Epoxidharzes ist. Ferner wird die Cu- Kugel auf dem Al-Elektrodenkontaktfleck durch Aufbringen der Ultraschallschwingungsenergie, die höher als im Fall einer Au-Kugel ist, plastisch verformt, weil die Kaltver festigungseigenschaft der Cu-Kugel größer als diejenige der Au-Kugel ist. Dies führt zu einem Ausschluß von Al im Al- Elektrodenkontaktfleck, der darunter befindliche SiO2-Film wird freigelegt, und bei der Hochtemperatur-Lebensdauer prüfung verschlechtert sich die Lebensdauer des Halbleiter bauelements.In the semiconductor device described above, when using epoxy resin as the chip bonding material, the semiconductor terchip is not bonded sufficiently firmly because the heating temperature for wire bonding is higher than the glass transition temperature of the epoxy resin. Furthermore, the Cu ball on the Al electrode pad is plastically deformed by applying the ultrasonic vibration energy, which is higher than in the case of an Au ball, because the work hardening property of the Cu ball is larger than that of the Au ball. This leads to an exclusion of Al in the Al electrode contact spot, the SiO 2 film underneath is exposed, and the high-temperature life test deteriorates the life of the semiconductor component.
Wenn das Au-Si-Lot eingesetzt wird, um eine höhere Erwär mungstemperatur zum Drahtbonden als im Fall eines Au-Drahts vorzugeben, treten Risse im Glasüberzug des Halbleiterchips bei der Erwärmungstemperatur des Chipbondvorgangs auf, und damit verschlechtert sich der harzumspritzte Chip im Dampf drucktest, und auch die Wirtschaftlichkeit ist nicht mehr gegeben. If the Au-Si solder is used, a higher heating temperature for wire bonding than in the case of Au wire cracks occur in the glass coating of the semiconductor chip at the heating temperature of the chip bonding process, and this deteriorates the resin-encapsulated chip in the steam pressure test, and the economy is no longer given.
Aufgabe der Erfindung ist die Beseitigung der vorgenannten Probleme durch Bereitstellung eines Halbleiterbauelements, das Cu-Leiter verwendet und dessen Chipbondmaterial den gesamten Halbleiterchip fest mit einer Bondinsel verbinden kann, wobei eine niedrigere Temperatur anwendbar ist, so daß keine Risse in einem Glasüberzug auftreten. Ferner soll durch die Erfindung ein Verfahren zur Herstellung dieses Halbleiterbauelements angegeben werden, wobei an einem Ende eines Cu-Drahts die Wärmezufuhr abgebrochen wird, Wärme in einer Cu-Kugel gehalten wird, das Aufwachsen eines Oxid films auf der Oberfläche der Cu-Kugel verhindert und deren Härte erhöht wird und Ultraschallschwingungen beim Bonden aufgebracht werden, so daß die Cu- und die Al-Atome in wirksamer Weise in Schwingungen versetzt werden, ohne daß ein Ausschluß von Al stattfindet.The object of the invention is to eliminate the aforementioned Problems by providing a semiconductor device, uses the Cu conductor and its chip bonding material firmly connect the entire semiconductor chip to a bond island can, with a lower temperature applicable, so that there are no cracks in a glass coating. Furthermore should by the invention a method for producing this Semiconductor device specified, being at one end of a Cu wire the heat supply is cut off, heat in a Cu ball is held, the growth of an oxide prevented on the surface of the Cu ball and its Hardness is increased and ultrasonic vibrations during bonding are applied so that the Cu and Al atoms in be vibrated effectively without Al is excluded.
Zur Lösung der genannten Aufgabe sieht die Erfindung ein Halbleiterbauelement vor mit einer als Leiterrahmen dienen den Bondinsel und mit einem auf der Bondinsel vorgesehenen Halbleiterchip, der einen Aluminiumelektrodenanschlußfleck, einen Aluminiumleiter und einen Glasüberzug aufweist; dabei umfaßt das Halbleiterbauelement ein zum Bonden des Halb leiterchips mit der Bondinsel eingesetztes Lot, das eine Liquidustemperatur hat, bei der kein Riß infolge der unter schiedlichen Wärmeausdehnung zwischen dem Glasüberzug und dem Halbleiterchip (Si) auftritt, und einen feinen Kupfer draht, der mit dem Aluminiumelektrodenkontaktfleck durch Drahtbonden verbunden ist.The invention provides for achieving the stated object Semiconductor component before serve with a lead frame the bond island and with one provided on the bond island Semiconductor chip that has an aluminum electrode pad, has an aluminum conductor and a glass coating; there the semiconductor device comprises a for bonding the half conductor chips with the solder pad inserted, the one Has liquidus temperature at which there is no crack due to the under different thermal expansion between the glass coating and the semiconductor chip (Si) occurs, and a fine copper wire that goes through with the aluminum electrode pad Wire bonding is connected.
Ferner wird durch die Erfindung ein Verfahren zur Herstel lung eines Halbleiterbauelements angegeben, das die folgen den Schritte umfaßt: Bilden einer Kupferkugel durch Erwär mungsabriß an einem Ende eines feinen Kupferdrahts, Absen ken der Kupferkugel und Kontaktieren derselben mit einer Aluminiumelektrode auf einem Halbleiterchip innerhalb einer Zeitdauer von 150 ms oder weniger vom Beginn der Bildung der Kupferkugel, und Pressen der Kupferkugel an den Alu miniumelektrodenkontaktfleck, so daß die Höhe der Kupfer kugel 25 µm oder weniger beträgt.Furthermore, the invention provides a method for the manufacture ment of a semiconductor device specified that follow the steps include: forming a copper ball by heating Tear off at one end of a fine copper wire, Absen the copper ball and contact it with a Aluminum electrode on a semiconductor chip inside one 150 ms or less from the start of education the copper ball, and pressing the copper ball onto the aluminum minium electrode pad so that the height of the copper sphere is 25 µm or less.
Die Erfindung wird nachstehend auch hinsichtlich weiterer Merkmale und Vorteile anhand der Beschreibung von Ausfüh rungsbeispielen und unter Bezugnahme auf die beiliegenden Zeichnungen näher erläutert. Die Zeichnungen zeigen inThe invention is also described below with respect to others Features and advantages based on the description of exec examples and with reference to the enclosed Drawings explained in more detail. The drawings show in
Fig. 1 und 2 seitliche Querschnittsansichten konventionel ler Halbleiterbauelemente; Fig. 1 and 2 cross-sectional side views konvent ionel ler semiconductor devices;
Fig. 3A und 3B eine Draufsicht bzw. einen seitliche Quer schnittsansicht des Al-Elektrodenkontaktflecks eines konventionellen Halbleiterbauelements, das einer Strukturanalyse unterzogen wurde; . 3A and 3B are a plan view and a side cross-sectional view of the Al electrode pad of a conventional semiconductor device which has been subjected to structural analysis;
Fig. 4A und 4B eine Perspektivansicht bzw. eine seitliche Querschnittsansicht eines konventionellen Halbleiterbauelements nach dem Chipbonden; FIGS. 4A and 4B are a perspective view and a side cross-sectional view of a conventional semiconductor device after the die-bonding;
Fig. 5 eine Draufsicht auf einen Halbleiterchip, bei dem ein Riß in einem Glasüberzug nach dem Chipbonden und dem Eintauchen in eine Phos phorsäurelösung einer Strukturanalyse unter zogen wurde; Fig. 5 is a plan view of a semiconductor chip in which a crack in a glass coating after chip bonding and immersion in a phosphoric acid solution was subjected to a structural analysis;
Fig. 6 eine seitliche Querschnittsansicht eines Halb leiterbauelements gemäß einem Ausführungsbei spiel der Erfindung; Fig. 6 is a side cross-sectional view of a semiconductor component according to an exemplary embodiment of the invention;
Fig. 7 eine schematische Darstellung der Anordnung bei einem Drahtbondschritt nach Bildung einer Cu-Kugel; Fig. 7 is a schematic representation of the arrangement for a wire bonding step after formation of a Cu-ball;
Fig. 8 und 10 jeweils seitliche Querschnittsansichten, wobei eine Cu-Kugel mit einem Al-Elektrodenkontakt fleck verbunden ist; FIGS. 8 and 10 are lateral cross-sectional views, wherein a Cu ball is connected to an Al electrode contact;
Fig. 9 ein Diagramm, das die Beziehung zwischen der Höhe einer Cu-Kugel und der Zeit zwischen der Bildung der Cu-Kugel und deren Kontakt mit einem Al-Elektrodenkontaktfleck zeigt; 9 is a diagram showing the relationship between the height of a Cu-ball and the time between the formation of the Cu-ball and its contact with an Al electrode pad.
Fig. 11 ein Weibull-Diagramm, das die Ergebnisse der Hochtemperatur-Lebensdauerprüfung eines Halb leiterbauelements nach der Erfindung und eines konventionellen Halbleiterbauelements zeigt; FIG. 11 is a Weibull chart showing the results of high-temperature life test of a semiconductor device according to the invention and of a conventional semiconductor device;
Fig. 12 ein Weibull-Diagramm, das die Ergebnisse eines Dampfdrucktests eines Halbleiterbauelements nach der Erfindung und eines konventionellen Halbleiterbauelements zeigt; Fig. 12 is a Weibull diagram showing the results of a vapor pressure test of a semiconductor device according to the invention and a conventional semiconductor device;
Fig. 13A und 13B jeweils eine Draufsicht und eine seitliche Querschnittsansicht eines Al-Elektrodenkon taktflecks nach dem Ätzen einer darauf befind lichen Cu-Kugel mit Salpetersäure; und 13A and 13B are respectively a plan view and a side cross-sectional view of an Al-Elektrodenkon clock flecks after etching thereon befind union Cu-ball with nitric acid. and
Fig. 14 eine Draufsicht auf einen Halbleiterchip, an dem eine Strukturanalyse eines Risses im Glas überzug beim Chipbonden und Eintauchen in einer Phosphorsäurelösung durchgeführt wurde. Shows a plan view was performed on a semiconductor chip, on which a structural analysis of a crack in the glass coating in the die bonding, and immersing in a phosphoric acid solution. 14,.
Die Erfindung unterscheidet sich vom Stand der Technik erstens dadurch, daß ungeachtet der Änderung eines Leiter materials von Au zu Cu ein zu lösendes Problem beim Stand der Technik nicht deutlich analysiert ist, und zwar war es dort nicht möglich, die Zuverlässigkeit eines Bauelements zu verbessern und die Massenfertigung zu erlauben. Im vor liegenden Fall dagegen wird ein lotartiges Chipbondmaterial so ausgewählt, daß Ultraschallschwingungen in wirksamer Weise auf die Cu-Kugel und den Al-Elektrodenkontaktfleck aufbringbar sind, weil die plastische Verformung der Cu- Kugel verbessert werden muß, die besser kaltverfestigbar ist als die Au-Kugel.The invention differs from the prior art firstly, regardless of the change in a ladder materials from Au to Cu a problem to be solved at the stand technology is not clearly analyzed, and it was not possible there the reliability of a component to improve and allow mass production. In the front lying case, however, is a solder-like chip bond material selected so that ultrasonic vibrations in effective Point to the Cu ball and the Al electrode contact pad can be applied because the plastic deformation of the copper Ball needs to be improved, the more work hardenable is than the Au ball.
Zweitens ist die Liquidustemperatur des Chipbondmaterials, z. B. von Pb-5-%-Sn-Lot, das allgemein vorteilhaft ist, so gewählt, daß sie bei 370°C oder darunter liegt, da die Ausbildung von Rissen im Glasüberzug bei der Erwärmungs temperatur des Halbleiterchips vermieden werden soll.Second, the liquidus temperature of the chip bond material, e.g. B. Pb-5% - Sn-Lot, which is generally advantageous, so chosen to be 370 ° C or below because the Formation of cracks in the glass coating during heating temperature of the semiconductor chip should be avoided.
Schließlich ist die Zeitdauer zwischen der Ausbildung der Cu-Kugel und deren Kontakt mit dem Al-Elektrodenkontakt fleck mit 150 ms oder weniger vorgegeben, denn je länger diese Zeitdauer ist, desto dicker wächst die Oxidschicht auf die Oberfläche der Cu-Kugel auf, wodurch die Kaltver festigungseigenschaft der Cu-Kugel verschlechtert und die Wärmeenergie in der Cu-Kugel selbst vermindert wird. Ferner ist die Höhe der flachgepreßten Cu-Kugel nach dem Preßvor gang möglichst klein, d. h. mit 25 µm oder weniger, vorge geben.After all, the period between training the Cu ball and its contact with the Al electrode contact Spot specified with 150 ms or less, because the longer the longer the oxide layer grows on the surface of the Cu ball, causing the cold ver strengthening property of the Cu ball deteriorated and the Thermal energy in the Cu ball itself is reduced. Further is the height of the flat-pressed copper ball after the pressing gear as small as possible, d. H. with 25 µm or less, pre give.
Die Erfindung wird nachstehend im einzelnen erläutert. Fig. 6 ist eine seitliche Querschnittsansicht eines Ausführungs beispiels, wobei die Bezugszeichen 1-3 und 5-9 denjenigen des konventionellen Halbleiterbauelements entsprechen. Beispielsweise ist eine Ti-Ni-Au-Schicht als Au-Metalli sierungsschicht 16 auf der Rückseite des Halbleiterchips 1 vorgesehen, und Pb-5-%-Sn-Lot befindet sich als Lot 17 zwi schen der Metallisierungsschicht 16 und der abgeschiedenen Silberschicht 2 auf der Bondinsel 3, so daß der Halbleiter chip 1 mit der Bondinsel 3 verbindbar ist.The invention is explained in detail below. Fig. 6 is a side cross-sectional view of an embodiment, wherein the reference numerals 1-3 and 5-9 correspond to those of the conventional semiconductor device. For example, a Ti-Ni-Au layer is provided as the Au metallization layer 16 on the rear side of the semiconductor chip 1 , and Pb-5% - Sn solder is present as solder 17 between the metallization layer 16 and the deposited silver layer 2 the bond pad 3 so that the semiconductor chip 1 can be connected to the bond pad 3 .
Fig. 7 zeigt schematisch die Anordnung bei einem Drahtbond vorgang nach der Bildung einer Cu-Kugel. Dabei wird über dem Halbleiterchip 1 eine Thermokompressionskapillare 18 gehalten, um die Cu-Kugel 8a auf den Al-Elektrodenkontakt fleck 5 zu pressen, und unter der Bondinsel 3 befindet sich ein Heizblock 19 zum Erwärmen der Bondinsel 3. Fig. 7 shows schematically the arrangement in a wire bond process after the formation of a Cu ball. Here, a Thermokompressionskapillare 18 is held above the semiconductor chip 1 to the Cu ball 8a on the Al electrode pad 5 to press and below the bonding pad 3 there is a heat block 19 for heating the bonding pad. 3
Bei diesem Halbleiterbauelement wird die Cu-Kugel 8a ge meinsam mit der Thermokompressionskapillaren 18 nach unten auf den Al-Elektrodenkontaktfleck 5 bewegt, wie Fig. 8 zeigt, eine Kraft von ca. 150 g wird auf den Al-Elektro denkontaktfleck 5 aufgebracht, Ultraschallenergie wird durch die Thermokompressionskapillare 18 zugeführt, und Heizenergie (ca. 280°C) wird vom Heizblock 19 zugeführt.In this semiconductor device, the Cu ball 8 a is moved together with the thermocompression capillaries 18 down to the Al electrode contact pad 5 , as shown in FIG. 8, a force of approximately 150 g is applied to the Al electrode contact pad 5 , ultrasonic energy is supplied through the thermocompression capillary 18 , and heating energy (approx. 280 ° C.) is supplied from the heating block 19 .
Um den quantitativen Wert der plastischen Verformung der Cu-Kugel 8a zu verdeutlichen, sei gesagt, daß die Cu-Kugel 8a mit dem Al-Elektrodenkontaktfleck 5 unter Aufbringen der gleichen Ultraschallenergiemenge durch die Thermokompres sionskapillare 18 verbunden wurde, wobei die Höhe der Cu- Kugel 8a (flachgepreßt) gemessen wurde, während die Zeit dauer t zwischen der Ausbildung der Cu-Kugel 8a und deren Kontakt mit dem Al-Elektrodenkontaktfleck 5 variiert wurde.In order to clarify the quantitative value of the plastic deformation of the Cu ball 8 a, it should be said that the Cu ball 8 a was connected to the Al electrode contact pad 5 by applying the same amount of ultrasound energy through the thermocompression capillary 18 , the height of the Cu - Ball 8 a (pressed flat) was measured, while the time t between the formation of the Cu ball 8 a and its contact with the Al electrode contact pad 5 was varied.
Die Meßergebnisse sind in Fig. 9 gezeigt. Aus dem Diagramm ist ersichtlich, daß während einer Zeitdauer t von weniger als 150 ms die Höhe der Cu-Kugel 8a nahezu konstant ist, wogegen in der über 150 ms hinausgehenden Zeit die Höhe der Cu-Kugel 8a nicht konstantgehalten wird und erheblich schwankt. Daraus ergibt sich, daß die plastische Verformung der Cu-Kugel 8a mit zunehmender Zeitdauer t stabil ist und daß auch vom Gesichtspunkt der mechanischen Grenzen der verwendeten Fertigungsvorrichtung eine Zeitdauer von weni ger als 150 ms die beste Bedingung darstellt. Ferner ist eine Zeitdauer t von weniger als 120 ms bevorzugt, und mit einer Zeitdauer von 150-100 ms werden sehr gute Ergebnisse erzielt. The measurement results are shown in Fig. 9. From the diagram it can be seen that the height of the Cu ball 8 a is almost constant during a time period t of less than 150 ms, whereas in the time exceeding 150 ms the height of the Cu ball 8 a is not kept constant and fluctuates considerably . It follows that the plastic deformation of the Cu ball 8 a is stable with increasing time t and that from the point of view of the mechanical limits of the manufacturing device used, a time period of less than 150 ms is the best condition. Furthermore, a time period t of less than 120 ms is preferred, and very good results are achieved with a time period of 150-100 ms.
Wenn die Höhe der flachgepreßten Cu-Kugel 8a 25 µm oder weniger beträgt, kann die Cu-Al-Legierung ohne jede Beschä digung des Halbleiterchips 1 sicher gebildet werden, wäh rend bei einer Höhe von mehr als 25 µm eine solche Legie rung nicht in befriedigender Weise ohne Beschädigung des Halbleiterchips 1 möglich ist, so daß sich eine Verschlech terung der Zuverlässigkeit des Bauelements ergeben kann. Im Fall des Thermokompressions-Kapillarchips 18 von Fig. 10 ist die Höhe h der Cu-Kugel 8a (flachgepreßt) als die kür zeste Entfernung zwischen der Vertiefung 8b der Cu-Kugel 8a und dem Al-Elektrodenkontaktfleck 5 definiert. In Fig. 9 zeigt die Kurve A die Ergebnisse, wenn die gebildete Cu- Kugel 8a kleinen Durchmesser hat, während die Kurve B die Ergebnisse zeigt, wenn die gebildete Cu-Kugel 8a großen Durchmesser hat. Allgemein beträgt der Durchmesser des Cu- Drahts 8 ca. 25 µm, und der Durchmesser der Cu-Kugel 8a (flachgepreßt) beträgt 100 µm oder weniger.If the height of the flat-pressed Cu ball 8 a 25 microns or less, the Cu-Al alloy can be safely formed without any damage to the semiconductor chip 1 , while such a alloy not in at a height of more than 25 microns is satisfactorily possible without damage to the semiconductor chip 1 , so that a deterioration in the reliability of the component can result. In the case of the thermocompression capillary chip 18 of FIG. 10, the height h of the Cu ball 8 a (pressed flat) is defined as the shortest distance between the depression 8 b of the Cu ball 8 a and the Al electrode contact pad 5 . In FIG. 9, curve A shows the results when the Cu ball 8 a formed has a small diameter, while curve B shows the results when the Cu ball 8 a formed has a large diameter. In general, the diameter of the Cu wire 8 is approximately 25 µm, and the diameter of the Cu ball 8 a (pressed flat) is 100 µm or less.
Es wurden bei 200°C Hochtemperatur-Lebensdauertests durch geführt, um die Lebensdauer des Halbleiterbauelements zu ermitteln, und dabei wurde das Weibull-Diagramm nach Fig. 11 erstellt. Daraus ist ersichtlich, daß die Lebensdauer (Kurve C) des Halbleiterbauelements nach der Erfindung ge genüber der Lebensdauer (Kurve D) des bekannten Halbleiter bauelements wesentlich verbessert ist. Dampfdrucktests bei 121°C und einer relativen Feuchte von 100% wurden durch geführt, um die Lebensdauer des Halbleiterbauelements zu ermitteln, und dabei wurde das Weibull-Diagramm nach Fig. 12 erstellt. Daraus ist ersichtlich, daß die Lebensdauer (Kurve E) des Halbleiterbauelements nach der Erfindung ge genüber der Lebensdauer (Kurve F) des konventionellen Halb leiterbauelements wesentlich verbessert ist. Diese ausge zeichneten Ergebnisse werden auch durch die Strukturanalyse dieses Halbleiterchips gestützt. Die Fig. 13A und 13B sind eine Draufsicht bzw. eine seitliche Querschnittsansicht des Al-Elektrodenkontaktflecks nach dem Ausätzen der Cu-Kugel 8a mit Salpetersäure (HNO3). Al ist zwar, wie die Zeich nungen zeigen, geringfügig entfernt unter Bildung eines weniger Al aufweisenden Teils 11, aber die unter der Al- Schicht befindliche SiO2-Schicht 13 ist nicht freigelegt. Wenn ferner, wie Fig. 14 zeigt, der thermokompressionsge bondete Halbleiterchip 1 in eine Phosphorsäurelösung (H3PO4- Lösung) bei 80-90°C für die Dauer von 20 min getaucht wurde, wurde keine Korrosion der Al-Leiter und kein Riß im Glasüberzug gefunden.High temperature life tests were carried out at 200 ° C to determine the life of the semiconductor device, and thereby the Weibull diagram of Fig. 11 was prepared. It can be seen that the life (curve C) of the semiconductor device according to the invention compared to the life (curve D) of the known semiconductor device is significantly improved. Vapor pressure tests at 121 ° C and a relative humidity of 100% were carried out to determine the life of the semiconductor device, and thereby the Weibull diagram of Fig. 12 was prepared. It can be seen that the life (curve E) of the semiconductor device according to the invention ge compared to the life (curve F) of the conventional semiconductor device is significantly improved. These excellent results are also supported by the structural analysis of this semiconductor chip. FIGS. 13A and 13B are a plan view and a side cross-sectional view of the Al electrode pad by the etching of the Cu ball 8 a with nitric acid (HNO 3). Al is, as the drawings show, slightly removed to form a part 11 containing less Al, but the SiO 2 layer 13 located under the Al layer is not exposed. Further, as shown in Fig. 14, when the thermocompression-bonded semiconductor chip 1 was immersed in a phosphoric acid solution (H 3 PO 4 solution) at 80-90 ° C for 20 minutes, no corrosion of the Al conductor and no crack became found in the glass cover.
Bei dem obigen Ausführungsbeispiel wird zwar als Lotmate rial Pb-5-%-Sn-Lot eingesetzt, aber es können in gleicher Weise andere Lote mit Liquidustemperaturen von 370°C oder weniger eingesetzt werden. Beispielsweise kann Lotmaterial aus Pb-Sn (5% oder mehr Sn), Pb-Ag, Pb-In, Sn-Ag, Pb-Ag-Sn, Pb-Ag-In und dergleichen eingesetzt werden. Fer ner wird zwar als Metallisierung 16 eine Ti-Ni-Au-Schicht verwendet, aber die Schichtoberfläche kann mit Au oder Ag metallisiert sein, z. B. kann als Metallisierungsschicht eine Ag-Metallisierungsschicht wie Cr-Ag oder dergleichen verwendet werden.In the above embodiment, Pb-5% Sn solder is used as the solder material, but other solders with liquidus temperatures of 370 ° C. or less can be used in the same way. For example, solder material made of Pb-Sn (5% or more Sn), Pb-Ag, Pb-In, Sn-Ag, Pb-Ag-Sn, Pb-Ag-In and the like can be used. Although a Ti-Ni-Au layer is used as the metallization 16 , the layer surface can be metallized with Au or Ag, e.g. For example, an Ag metallization layer such as Cr-Ag or the like can be used as the metallization layer.
Die Erfindung eignet sich ferner für einen Transistorchip, der kein Planar-IC ist und weder einen Glasüberzug noch irgendeine Isolierschicht wie etwa einen SiO2-Film auf weist. Ein Halbleiter aus einer von Si verschiedenen Ver bindung wie GaAs oder dergleichen kann als Substrat einge setzt werden. Die Unterschicht des Al-Films des Al-Elektro denkontaktflecks 5 ist nicht auf einen SiO2-Film be schränkt, auch andere Materialien können geeignet sein.The invention is also suitable for a transistor chip that is not a planar IC and has neither a glass coating nor any insulating layer such as an SiO 2 film. A semiconductor made of a compound other than Si such as GaAs or the like can be used as a substrate. The lower layer of the Al film of the Al-electrode contact pad 5 is not limited to an SiO 2 film, other materials may also be suitable.
Wie vorstehend beschrieben, kann durch die Erfindung die Ausbildung von Rissen im Glasüberzug verhindert und der gesamte Halbleiterchip fest mittels Lot auf die Bondinsel gebondet werden, das zwischen der Silberplattierung auf der Bondinsel und der auf der Rückseite des Halbleiterchips gebildeten Au-Metallisierungsschicht liegt. Durch die Er findung kann außerdem die Kaltverfestigungseigenschaft der Cu-Kugel vermindert und damit ein Ausschluß von Al beim Bonden der Cu-Kugel auf den Al-Elektrodenkontaktfleck ver hindert werden. Außerdem wird durch die plastische Verfor mung der Cu-Kugel eine Legierung mit dem Al-Elektrodenkon taktfleck hergestellt. Ferner ist es möglich, ein Entfernen von Al ungeachtet des Aufbringens von Ultraschallenergie auf die Cu-Kugel und den Al-Elektrodenkontaktfleck zu ver meiden. Der größte durch die Erfindung erzielbare Vorteil besteht darin, daß ohne große Änderungen das gleiche Bond verfahren wie bei einem Au-Leiter im Fall des Cu-Leiters angewandt werden kann, wodurch die Betriebszuverlässigkeit des Halbleiterbauelements im Gebrauch realisierbar ist.As described above, the invention can Formation of cracks in the glass coating prevented and the Entire semiconductor chip firmly onto the bond island by means of solder to be bonded between the silver plating on the Bondinsel and the one on the back of the semiconductor chip formed Au metallization layer. Through the he The strain hardening property of the Cu ball reduced and thus an exclusion of Al in the Bond the Cu ball onto the Al electrode contact patch be prevented. In addition, the plastic Verfor an alloy with the Al electrode cone clock mark made. It is also possible to remove of Al regardless of the application of ultrasonic energy ver to the Cu ball and the Al electrode contact spot avoid. The greatest advantage that can be achieved by the invention is that without major changes the same bond proceed like an Au conductor in the case of the Cu conductor can be applied, reducing the operational reliability of the semiconductor device is realizable in use.
Claims (12)
einer als Leiterrahmen dienenden Bondinsel (3); und
einem auf der Bondinsel vorgesehenen Halbleiterchip (1), der einen Aluminiumelektrodenanschlußfleck (5), einen Alu miniumleiter (8) und einen Glasüberzug (6) aufweist;
gekennzeichnet durch
ein zum Bonden des Halbleiterchips (1) mit der Bondinsel (3) eingesetztes Lot, das eine Liquidustemperatur hat, bei der kein Riß infolge der unterschiedlichen Wärmeausdehnung zwischen dem Glasüberzug (6) und dem Halbleiterchip (Si) (1) auftritt; und
einen feinen Kupferdraht (8), der mit dem Aluminiumelek trodenkontaktfleck (5) durch Drahtbonden verbunden ist. 1. Semiconductor device with
a bonding pad ( 3 ) serving as a lead frame; and
a provided on the bond pad semiconductor chip ( 1 ) having an aluminum electrode pad ( 5 ), an aluminum conductor ( 8 ) and a glass coating ( 6 );
marked by
a solder used to bond the semiconductor chip ( 1 ) to the bonding island ( 3 ) and which has a liquidus temperature at which no crack occurs as a result of the different thermal expansion between the glass coating ( 6 ) and the semiconductor chip (Si) ( 1 ); and
a fine copper wire ( 8 ) which is connected to the aluminum electrode pad ( 5 ) by wire bonding.
Bilden einer Kupferkugel durch Flammabriß an einem Ende eines feinen Kupferdrahts;
Absenken der Kupferkugel und Kontaktieren derselben mit einer Aluminiumelektrode auf einem Halbleiterchip innerhalb einer Zeitdauer von 150 ms oder weniger vom Beginn der Bil dung der Kupferkugel; und
Pressen der Kupferkugel an den Aluminiumelektrodenkon taktfleck, so daß die Höhe der Kupferkugel 25 µm oder weniger beträgt.10. A method for producing a semiconductor component, characterized by the following steps:
Forming a copper ball by flame-tearing at one end of a fine copper wire;
Lowering the copper ball and contacting it with an aluminum electrode on a semiconductor chip within a period of 150 ms or less from the start of formation of the copper ball; and
Press the copper ball onto the aluminum electrode contact spot so that the height of the copper ball is 25 µm or less.
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SG155894A SG155894G (en) | 1990-01-10 | 1994-10-21 | Semiconductor device and method of producing the same |
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US6376910B1 (en) * | 1999-06-23 | 2002-04-23 | International Rectifier Corporation | Solder-on back metal for semiconductor die |
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DE3622979A1 (en) * | 1985-07-11 | 1987-01-22 | Nat Semiconductor Corp | METHOD FOR ATTACHING A SEMICONDUCTOR BOARD TO A METAL SUPPORT FRAME |
DE3641524A1 (en) * | 1985-12-10 | 1987-06-11 | Mitsubishi Electric Corp | Method of fabricating a semiconductor component |
DE3641689A1 (en) * | 1985-12-24 | 1987-06-25 | Mitsubishi Electric Corp | Method of fabricating a semiconductor component and a semiconductor chip used therein |
EP0271110A2 (en) * | 1986-12-12 | 1988-06-15 | Kabushiki Kaisha Toshiba | Semiconductor device comprising an electrode pad |
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US4886200A (en) * | 1988-02-08 | 1989-12-12 | Mitsubishi Denki Kabushiki Kaisha | Capillary tip for bonding a wire |
DE3938152A1 (en) * | 1989-01-13 | 1990-07-26 | Mitsubishi Electric Corp | METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT |
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GB1457806A (en) * | 1974-03-04 | 1976-12-08 | Mullard Ltd | Semiconductor device manufacture |
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JPS5321771A (en) * | 1976-08-11 | 1978-02-28 | Sharp Kk | Electronic parts mounting structure |
JPS5873127A (en) * | 1981-10-28 | 1983-05-02 | Hitachi Ltd | Solder melting connection for ic chip |
JPH0748507B2 (en) * | 1987-08-18 | 1995-05-24 | 三菱電機株式会社 | Wire bonding method |
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1990
- 1990-01-10 JP JP2001467A patent/JPH03208355A/en active Pending
- 1990-05-09 GB GB9010385A patent/GB2239829B/en not_active Expired - Fee Related
- 1990-07-02 DE DE4021031A patent/DE4021031C2/en not_active Expired - Fee Related
- 1990-11-09 KR KR1019900018073A patent/KR940003563B1/en not_active IP Right Cessation
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1994
- 1994-10-21 SG SG155894A patent/SG155894G/en unknown
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EP0271110A2 (en) * | 1986-12-12 | 1988-06-15 | Kabushiki Kaisha Toshiba | Semiconductor device comprising an electrode pad |
US4886200A (en) * | 1988-02-08 | 1989-12-12 | Mitsubishi Denki Kabushiki Kaisha | Capillary tip for bonding a wire |
DE3938152A1 (en) * | 1989-01-13 | 1990-07-26 | Mitsubishi Electric Corp | METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT |
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Also Published As
Publication number | Publication date |
---|---|
SG155894G (en) | 1995-03-17 |
KR910015024A (en) | 1991-08-31 |
GB2239829A (en) | 1991-07-17 |
DE4021031C2 (en) | 1995-04-20 |
GB2239829B (en) | 1994-07-06 |
KR940003563B1 (en) | 1994-04-23 |
JPH03208355A (en) | 1991-09-11 |
GB9010385D0 (en) | 1990-06-27 |
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