DE3855482T2 - Electron emitting element and its manufacturing process - Google Patents

Description

BACKGROUND OF THE INVENTION Field of the invention

The invention relates to an electron emission element and a method for producing the same, and in particular to an electron emission element which has a plurality of electrodes each having a conical portion, an insulating layer with openings centered on the conical portions and a collector electrode, at least a portion of which is formed close to the conical portions, and to a method for producing the electron emission element.

Related prior art

As conventional electron emission sources, hot cathode electron emission elements have often been used. Electron emission with hot electrodes results in a large energy loss due to heating and undesirably requires preheating.

To solve these problems, various cold cathode electron emission elements have been proposed. Among these elements, a field effect electron emission element is usable for emitting electrons by electric field emission.

A typical example of the field effect electron emission element is shown in a partial sectional view in Fig. 1, and steps for manufacturing this electron emission element are shown in Figs. 2A to 2D.

As shown in Fig. 1, a tapered electrode 19 made of molybdenum (Mo) or the like is formed on a substrate 21 made of silicon, for example. An insulating layer 20 such as a SiO₂ layer has an opening. This opening is centered on the electrode 19. A lead electrode 18 is formed on the insulating layer 20, a part of which is formed close to the tapered portion.

In the electron emission element with this structure, a voltage is applied between the substrate 21 and the electrode 18, whereby electrons are emitted away from the conical portion with high field strength.

This electron emission element is manufactured in the following steps:

As shown in Fig. 2A, the insulating layer 20 is formed on the substrate 21 made of, for example, Si as an oxide film (e.g., as a SiO2 film).

The Mo layer 18 is deposited by electron beam epitaxy, and an electron beam resist such as PMMA (polymethyl methacrylate) is coated on the Mo layer 18 by spin coating. The resist film is irradiated with an electron beam and formed into a pattern. The resist is partially removed with isopropyl alcohol or the like, whereby the Mo layer 18 is selectively etched and therefore a first opening 22 is formed. After the electron beam resist is completely removed, hydrofluoric acid is used to etch the insulating layer 20, thereby forming a second opening 23.

As shown in Fig. 2B, the substrate 21 is inclined at an angle θ while being rotated about an axis X, and an Al layer 24 is formed on the upper surface of the Mo layer 18. In this case, the aluminum is also deposited on the side surface of the Mo layer 18. By controlling the deposition rate of the aluminum, the diameter of the first opening 22 can be arbitrarily reduced.

As shown in Fig. 2C, Mo is deposited perpendicularly on the substrate 21 by electron beam epitaxy. In this case, the molybdenum is deposited on the Al layer 24 and the substrate 21 as well as on the side surface of the Al layer 24. As the deposition of the Mo layer progresses, the diameter of the first opening 22 can be gradually reduced. When the diameter of the first opening 22 is reduced, the deposition area of the metal (MO) deposited on the substrate 21 is reduced. Therefore, a substantially conical electrode 19 is formed on the substrate 21.

Finally, as shown in Fig. 2D, an electron emission element with the substantially conical electrode 19 is produced by removing the deposited Mo layer 25 and the deposited Al layer 24.

In the conventional electron emission element as described above, the height, angle and diameter of the bottom surface of the electrode are determined by various manufacturing conditions such as the size of the first opening, the thickness of the oxide film and the distance between the substrate and the deposition source.

EP-A-0172089 describes a multiple electron emission element comprising a plurality of electrodes formed on a deposition surface and each having a conical portion, an insulating layer formed on the deposition surface and each having openings centered on the conical portions, and a lead electrode, at least a portion of which is formed close to the conical portions, the lead electrode being formed on the insulating layer.

The manufacturing process for such electrodes, which is similar to the process described above, is described, for example, in the article "Physical properties of thin film field emission cathodes with molybdenum cones" by Spindt et al.

However, when such deposited metal electrodes are used, the dimensions of the electron emission element are critical to achieve stable electron emission.

Therefore, the production of a large number of electron emission elements is difficult because typically changes the conical shape of the electrodes.

It is therefore an object of the invention to provide an improved electron emission element and a method for producing the same, which has a good electron emission efficiency and a high reproducibility with regard to the electron emission properties.

This object is achieved with an electron emission element according to patent claim 1, 8 or 16.

Furthermore, this object is achieved with an electron emission device according to claim 11.

In addition, this object is achieved with a method for producing an electron emission element according to patent claims 25 and 29.

Therefore, due to the single crystal structure of the conical emission region, the electron emission region can be made to coincide with a crystal surface with a predetermined structure, thereby improving the Schottky effect and hence the electron emission efficiency.

Furthermore, the electron emission region can be shaped uniformly and pointedly to increase the reproducibility of the electrode.

Since the electrodes with the respective conical sections on the surface of the deposit of the insulating material, the electrical insulation of the electrodes can be improved, thereby preventing coupling between adjacent electrodes.

In the method of manufacturing the electron emission element described above, the material which cannot form a single crystal by crystallinity or the like is deposited on the bottom surface (deposition surface) of the recess using the heterogeneous micropattern material as the center thereof, thereby enabling the deposition of the single crystal. The range for selecting the materials on the bottom of the recess and for the single crystal can be expanded. The electrode having a tapered portion can be formed at the desired location. The electron emission portions such as the tapered portions can be shaped uniformly and pointedly, thereby enhancing and making the intensity of the electric field uniform. Variations in the triggering operating voltage can be minimized and the electron emission efficiency can be further improved.

In the electron emission element described above, since the electrode having the tapered portion is electrically connected to the conductive material surface through the opening formed in the insulating layer, the electrode having the tapered portion is electrically insulated from the substrate, so that the packing density can be increased and the connection reliability can be improved.

According to the method of manufacturing this electron emission element, the electrode having the crystalline tapered portion is connected to the surface of the conductive material through the opening formed in the insulating layer in such a manner that a crystal is deposited on the exposed portion of the surface of the conductive material through the opening formed in the insulating layer and connected to the electrode having the crystalline tapered portion grown with a single nucleus as its center in the heterogeneous micropattern material. Therefore, electrical connection can be made by a simple process.

Of the conventional cold cathode electron-emitting elements, a surface conduction electron-emitting element is usable in which a large current is supplied to a high-resistance film from which electrons are emitted.

Fig. 3 is a schematic diagram of the surface conduction electron emission element.

As shown in Fig. 3, opposing electrodes 118 and 119 are formed on an insulating substrate 117 made of glass or the like at a predetermined distance from each other. A metal such as molybdenum (Mo) is deposited in the space between the opposing electrodes 118 and 119. The deposition film is heated to a high temperature to thereby cause partial disruption of the deposition film, thereby forming a high-resistance film 120.

In the electron emission element having this structure, when a voltage is applied between the electrodes 118 and 119 to pass a current through the high-resistance film 120 and a high voltage is applied to an electrode (not shown) formed on the high-resistance film 120, electrons are emitted from the high-resistance film 120.

In the electron emission element described above, the surface shape of the high-resistance film is the main factor for determining the electron emission characteristics. In order to increase the electron emission efficiency, it is advantageous if the high-resistance film is discontinuous, island-like or defective (this surface state is hereinafter referred to as a defective surface state). The defective surface state occurs due to local emission of high-voltage field electrons, hot electrons and the like. The defective surface state is conventionally achieved by heating the deposition film to a high temperature and causing local discontinuities in the deposition film.

However, in the electron emission electrode having the high-resistance film prepared in the above-described manner, the high-resistance film is unstable and the dispersions in the operating voltage and the electron emission efficiency are increased. In addition, the electrons are emitted locally so that the current density becomes larger, resulting in a local break in the high-resistance film.

The crystal is defined as an aggregate of individual crystal grains (including essentially one single crystal) grown in a particular heterogeneous material with a single nucleus as its center.

When a single crystal having a single nucleus as its center is grown in each of a plurality of heterogeneous material regions, a plurality of single crystal regions having tapered portions corresponding only to the single crystal are formed at desired regions. By controlling the materials for the deposition surface, the heterogeneous material and the types of the deposition materials, and the deposition conditions, a plurality of single crystal regions each having a desired size can be formed for forming the high-resistance film in the electron emission element.

In this electron emission element, a plurality of single crystal regions having single nuclei as their centers are uniformly formed in a plurality of regions of heterogeneous material, thereby easily controlling protrusions on the surface of the high-resistance film.

If minute pitches of tapered portions are required to improve the dielectric withstand voltage in the cold cathode electron-emitting element shown in Fig. 1 or to manufacture a multiple electron-emitting element, an electrode is preferably formed on the surface of the insulating material.

However, if an electrode is formed on the surface of the insulating material, a conductor layer can be formed on the surface of the insulating material or a through hole must be formed in an insulating layer formed on a conductive substrate to achieve the routing. This technique leads to problems in terms of assembly density and reliability of the connections.

In the electron emission method described above, the charge lost during electron emission is supplied to the electron emission electrodes after the electron emission, and the electron emission electrode can be formed on the insulating film.

In a first embodiment of the electron emission device, the electron emission electrode having a conical portion and the voltage application electrode are formed with the insulating film sandwiched therebetween and are capacitively coupled. A voltage is applied to the voltage application electrode and the irradiated target to enable the emission of the electrons from the electron emission electrode. The charge emerging from the electron emission electrode can be supplied by the charge supply device.

In the first embodiment, the electrons are supplied from the charge supply device to enable the electron emission from the electron emission electrode insulated on the insulating film.

In a second embodiment of the electron emission device, the plurality of Electron emission electrodes each having a conical portion and a plurality of voltage application electrodes are formed and capacitively coupled. For electron emission, a voltage is applied to the voltage application electrodes and the irradiated target. The charge released by this electron emission from the electron emission electrodes is supplied from the charge supply device.

That is, in the second embodiment, the electrons are supplied from the charge supply device to enable electron emission from the plurality of electron emission electrodes insulated on the surface of the insulating film.

When the voltage is applied to the plurality of voltage application electrodes in a time-division multiplex manner to sequentially apply voltage pulses between the voltage application electrodes and the irradiated target, the circuit load in the electron emission control can be reduced.

If, in the electron emission devices described above, a collector electrode is designed in such a way that the field strength at the electron emission electrode is increased, this collector electrode can serve as a charge supply device.

In a third embodiment of the electron emission device, the electron emission electrode is formed on the semiconductor material. The electron emission electrode generated by the discharge Lost charge can be supplied via the semiconductor material.

In a fourth embodiment of the electron emission device, a plurality of electron emission electrodes are formed on the semiconductor material, and the charge emerging from the plurality of electron emission electrodes by the discharge can be supplied via the semiconductor material.

In the cold cathode electron-emitting element shown in Fig. 1, there are dimensional problems and electrical problems for the following reasons: Since a tapered electrode is formed after the insulating layer is etched, it is difficult to keep the deposition surface of the substrate clean and variations occur in the deposition conditions or the like for the electrode materials.

In the above-described method for manufacturing an electron emission element, the electrode having the conical portion serving as an electron emission region is formed on a clean surface by using the single core formed in the heterogeneous micropattern material as the center. Thereafter, the insulating layer is formed and then the electrode is formed thereon, so that an electrode made of a crystal having a small number of defects and having a uniform electron emission region is obtained, whereby the field strength becomes uniform and is increased, thereby preventing deviations in the triggering operating voltage.

In the electron emission element shown in Fig. 1, the operating voltage and the electron emission efficiency change in an undesirable manner due to changes in the properties because a strong field is applied to the conical portion of the electrode, the current density is increased and the conical portion is heated and melted.

In the above-described electron emission element, the electrode having the tapered portion comprises the conductive material having the tapered portion and the heat-resistant conductive film formed on the conductive material. The electron emission portion may be formed of a heat-resistant conductive film to prevent deformation of the tapered portion due to melting by heat. The main part of the electrode having the tapered portion is made of the conductive material having high conductivity, thereby preventing unnecessary heat radiation.

In the electron emission element shown in Fig. 1, the dielectric breakdown voltage must be increased. In the multiple electron emission element, in order to prevent the influence of the electrodes on adjacent conical portions, the electrode with the conical portion is preferably formed on the surface of the insulating layer in order to achieve small pitches.

In the multiple electron emission element, the electron emission of the respective electron emission sources must be controlled in order to emit electrons from a desired location.

In the above-mentioned electron emission element, the electrode having the tapered portion is formed on the conductive material above the insulating layer. (This structure is hereinafter referred to as MIM structure). A voltage (v) is applied between the conductive material and the electrode formed on the surface of the insulating material and having the tapered portion, and the electrons can pass through the insulating layer by the tunnel effect. Therefore, the electrons can be supplied from the conductive material to the electrode having the tapered portion. The amount of electrons supplied to the electrode having the tapered portion can be controlled by the voltage v, thereby controlling the electron emission amount.

As conventional display devices in OA systems such as word processors and personal computers, cathode ray tubes (CRT) are mainly used in view of a clear image and high brightness.

In the cathode ray tube, the electrons emitted from an electron source are deflected for scanning in a magnetic field generated by a deflection coil, and the deflected electrodes collide with a phosphor screen for R, G and B (in the case of the color picture tube) to thereby produce a display. Since the deflection distance corresponds to the size of the screen, the travel path of the electrons becomes longer. For this reason, the distance between the electron source and the phosphor screen becomes undesirably larger and a flat cathode ray tube cannot be manufactured.

As flat display devices, liquid crystal display units, plasma display units, electroluminescence (EL) units and the like have attracted great attention. The liquid crystal element requires a light source (natural light) since it is a light receiving element and tends to be affected by brightness variations of the light source. In addition, it is difficult to achieve a color image display in three or more colors with the liquid crystal itself. The plasma display and EL units are light emitting elements and do not have the problems that arise with the light receiving element. These units are commercially available as monochromatic units. However, due to differences in luminous efficiency values at different wavelengths of the light sources, a multicolor display cannot be achieved satisfactorily and these units are still expensive.

In a flat display device using the electron emission element, the amount of electron emission is controlled by a voltage applied between the lead electrode and the electrode having the tapered portion. The potential of the phosphor unit is set higher than that of the electrode having the tapered portion. The electrons are irradiated onto the phosphor unit to excite it.

The voltage applied to the field-effect electron emission element shown in Fig. 1 is generally required to be 100 V or more. It is difficult to incorporate this element into an integrated circuit. The requirement arose to to reduce the voltage applied to this element.

BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1 is a schematic sectional view of a part of a conventional field-effect electron emission element,

Fig. 2A to 2D are schematic partial sectional views for explaining the steps in the manufacture of the element shown in Fig. 1,

Fig. 3 is a schematic diagram for explaining a surface conduction electron emission element,

Fig. 4A to 4D are schematic partial sectional views for explaining the steps in the manufacture of a multiple electron emission element according to an embodiment of a method according to the invention,

Fig. 5A to 5C are partial perspective views of Fig. 4A, 4C and 4D, respectively.

Fig. 6A to 6E are schematic partial sectional views for explaining the steps in manufacturing a multiple electron emission element according to the invention,

Fig. 7 is a schematic perspective view of a matrix multiple electron emission element,

Fig. 8A and 8B are diagrams for explaining a selective deposition,

Fig. 9 is a graph illustrating changes in the nucleation densities of the deposition surfaces of SiO2 and silicon nitride as a function of time,

Fig. 10A to 10C are diagrams for explaining a method of forming a single crystal,

Fig. lla and llb are perspective views of the substrate according to Fig. 10A and 10C, respectively.

Fig. 12A to 12C are diagrams for explaining another method of forming a single crystal,

Fig. 13 is a graph illustrating the relationship between a flow rate ratio of NH₃ to SiH₄ and the composition ratio of Si to N in a produced silicon nitride film,

Fig.14 is a graph illustrating the relationship between the Si/N composition ratio and the nucleation density,

Fig. 15 is a graph illustrating the relationship between the Si ion doping amount and the nucleation density,

Fig. 16A to 16D are schematic partial sectional views for explaining the steps in the manufacture of an electron emission element according to another method according to the invention,

Fig. 17 is a schematic partial sectional view for explaining a step in manufacturing an electron emission element according to the method of Figs. 16A to 16D,

Fig. 18 is a schematic perspective view for explaining the wiring connection of this electron emission element,

Fig. 19A to 19F are schematic partial sectional views for explaining the steps in manufacturing an electron emission element according to another method of the present invention,

Fig. 20 is a schematic partial sectional view for describing an electron emission element according to the invention,

Fig. 21 is an enlarged partial view of a partial area A of a high-resistance film according to Fig. 20,

Figs. 22A to 22C are diagrams for explaining the steps in forming a single crystal according to a single crystal forming method,

Fig. 23A and 23B are perspective views of a substrate according to Fig. 22A and 22C, respectively.

Figs. 24A to 24C are diagrams for explaining the steps in forming a single crystal according to another single crystal forming method,

Fig. 25 is a schematic diagram of a first electron emission device used for another method according to the invention,

Fig. 26 is an equivalent circuit diagram of the first electron emission device according to the present invention,

Fig. 27 is a schematic diagram of a second electron emission device used for the method of Fig. 25,

Fig. 28 is a timing chart for explaining the second electron emission device according to the present invention,

Fig. 29 is a schematic diagram of a third electron emission device used for the method of Fig. 25,

Fig. 30 is an equivalent circuit diagram of the third electron emission device in the electron emission,

Fig. 31 is a timing chart for explaining the operation of the third electron emission device according to the invention,

Figs. 32A to 32F are schematic partial sectional views for explaining the steps in manufacturing an electron emission element according to another method of the present invention,

Fig. 33 is a schematic partial sectional view for explaining a step in the manufacture an electron emission element according to the method of Fig. 32A to 32F,

Fig. 34 is a schematic partial sectional view for explaining an electron emission element according to the invention,

Fig. 35 is a schematic perspective view for explaining the wiring connection of this electron emission element,

Fig. 36A is a schematic diagram of an electron emission element according to the invention,

Fig. 36B is an enlarged partial view of a portion a in Fig. 36A,

Fig. 9. 37 is a timing chart for explaining the function of this electron emission element,

Fig. 38 is an equivalent circuit diagram of an electron emission region in a multi-electron emission element according to the present invention,

Fig.39A and 39B are timing diagrams of voltages applied to electrodes arranged in a matrix,

Fig. 40 is a schematic sectional view of a display device according to the invention,

Fig. 41A is an enlarged partial view of an electron emission region of Fig. 40,

Fig. 418 is a plan view of the electron emission region of Fig. 41A,

Fig. 42 is a diagram illustrating the composition of the electron emission region,

Fig. 43 is a schematic diagram for explaining electron emission control by a matrix of connecting lines and collecting electrodes,

Fig. 44 is a diagram for explaining the function of the display device shown in Fig. 40,

Fig. 45 is a schematic partial sectional view of another display device according to the invention,

Fig. 46 is an energy band diagram of a metal 1-semiconductor junction,

Fig. 47 is a diagram of the energy band at the surface of a semiconductor according to the invention,

Fig. 48 is a schematic partial sectional view for describing an electron emission element according to the invention,

Fig. 49 is a diagram for explaining the function of the element shown in Fig. 48,

Fig. 50A is an energy band diagram at an equilibrium state of the element according to Fig. 48 and

Fig. 50B is an energy band diagram when operating the element of Fig. 48.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

With reference to the accompanying drawings, preferred embodiments of the invention are described.

Fig. 4A to 4D are schematic partial sectional views for explaining the steps in manufacturing a multiple electron emission element according to a method of the invention, and Fig. 5A to 5C are partial perspective views of Fig. 4A, 4C and 4D, respectively.

As shown in Fig. 4A, an oxide substrate 1 made of an insulating material such as SiO₂ is patterned by photoetching or the like to form a plurality of cylindrical recesses 202 each having a diameter of about 0.5 to 100 µm. Grooves are formed between the recesses 202 of respective rows as shown in Fig. 4A.

As shown in Fig. 48, nucleation bases 203 made of Si or Si₃N₄ are formed on the bottom surfaces (deposition surfaces) of the recesses 202, respectively.

As shown in Fig. 4C, individual nuclei formed in the nucleation bases 203 are used as centers for growing a single crystal of Mo, W or Si to thereby form conical electrodes 204 each having a desired size and a conical portion. As shown in Fig. 5B, the electrodes 204 aligned in each row are connected to each other by a conductive layer 206 formed through the corresponding groove formed in the oxide substrate 201. A method of forming the single crystal will be described in detail below. In this embodiment, the bottom surfaces of the recesses 202 of the oxide substrate 201 serve as deposition surfaces, and the side wall portions of the recesses 202 are made of an insulating material. The insulating material may be formed on the deposition surface in another process using the same material as that of the deposition surface or a different material therefrom.

Finally, as shown in Figs. 4D and 5C, a metal plate 205 serving as a lead electrode, in which a plurality of openings are formed by etching, is bonded to the oxide substrate 201 such that the centers of the openings are respectively aligned with the centers of the recesses 202, thereby completing a multi-electron emission element.

In the above-described multiple electron emission element according to Fig. 5C, a voltage is applied between the metal plate 205 and the selected conductive layer 206 such that the potential at the metal plate 205 is higher than at the selected conductive layer 206, a strong electric field is generated by the conical portions of the corresponding electrodes 204 and electrons are emitted from them.

In the above-described multi-electron emission element, when the metal plate 205 is divided into strips to form a matrix together with the electrode wiring layers 206, a matrix multi-electron emission element can be manufactured.

Fig. 7 is a schematic perspective view of a matrix multiple electron emission element

As shown in Fig. 7, metal plates 2051 to 2054 and electrode conductive layers 2061 to 2064 are arranged in the form of a matrix. When a voltage is applied between selected metal plates 2051 to 2054 and selected electrode conductive layers 2061 to 2064, a point-shaped, a line-shaped or a planar electron emission source can be obtained.

In the method of manufacturing this element, the electrode 204 having the tapered portion is formed on the oxide substrate 201. However, to manufacture the same electron emission element as the one described above, an oxide film 201a may be formed on an underlying substrate. In the embodiment described above, the metal plate 205 as a lead electrode is bonded to the substrate. However, the lead electrode may be formed by depositing a metal layer such as a Mo layer.

6A to 6E are schematic partial sectional views for explaining the steps in manufacturing a multiple electron emission element according to another method of the present invention.

As shown in Fig. 6A, an oxide film 201a such as a SiO2 film is formed on a base substrate 207 such as a Si substrate, in which recesses 202 are formed in the same manner as in Fig. 4A.

According to Figs. 6B and 6C, in the same manner as Figs. 4A and 4B, core formation bases 203 and electrodes 204 having tapered portions and having desired dimensions are formed.

According to Fig. 6D, a resist is filled into the recesses 202 and a metal layer 208 is formed on the resist and the oxide substrate 201. A photoresist 209 is coated on the metal layer 208, which is exposed and etched to form openings 210.

Finally, as shown in Fig. 6E, to complete a multi-electron emission element, the metal layer 208 is etched to form openings and the resist pattern is removed.

When the metal layer 208 is divided into strips to form a matrix electrode array in the same manner as the metal plates 2051 to 2054 shown in Fig. 7, a matrix multi-electron emission element can be manufactured.

In the embodiment described above, the electrode 204 having the tapered portion is determined by the conditions such as the oxide substrate 201 (the oxide film 201a) forming the deposition surface, the nucleation bases 203, the deposition material and the deposition conditions. The size of the tapered portion can be set independently of the sizes of the recesses 202 and the openings 210, thereby preventing dimensional deviations caused by deviations in the sizes of the recesses 202 and the openings 210. The position of the electrode 204 having the tapered portion can by the position of the corresponding nucleation base 203. The electrode 204 can be formed at a desired position with high accuracy. As a result, a plurality of electron emission holes of the multiple electron emission element can be formed uniformly at fine pitches.

Since the single crystal can be easily formed with the nucleation base as its center (described below), this enables a wide selection of the material without considering the crystallinity or the like between the deposition material and the deposition surface. For example, unlike the conventional case where it is difficult to grow a single crystal on an insulating substrate such as an amorphous substrate, a single crystal can be formed on the insulating substrate and a large area of the element can be achieved with certainty. Therefore, the method of the present invention is very effective for manufacturing a multiple electron emission element. In addition, the tapered portions as electron emission regions can be formed uniformly and sharply to achieve a high field strength. Therefore, deviations in the triggering operating voltages can be prevented and the electron emission efficiency can be further improved.

As shown in Fig. 6, the deposition surface may be formed on an underlying substrate of a desired material.

For example, a deposition surface on a substrate with a high heat radiation efficiency and the reliability of the circuit can be greatly improved.

According to the method described above, it is easy to manufacture an electrode having a tapered portion by using a single crystal. The conductivity of the electrode having the tapered portion can be improved. The electron emission portion as the tapered portion can be made to match the crystal face of a predetermined structure to improve the Schottky effect and the electron emission efficiency. At the same time, a plurality of electrodes each having a tapered portion can be formed on the deposition surface of the insulating material, thereby improving electrical insulation. Therefore, coupling between the adjacent electrodes can be prevented.

A method for growing a single crystal on a deposition surface is described below.

A method for selectively depositing a film on the deposition surface is described below. Selective deposition is a method of selectively forming a thin film on a substrate using differences in factors between materials that determine nucleation. These factors are surface energy, deposition coefficients, segregation coefficients, surface diffusion rates, and the like, all of which are related to the thin film forming process.

Fig. 8A and 8B are diagrams for explaining the selective deposition.

As shown in Fig. 8A, a thin film 212 having different factors from those of a substrate 211 is formed on the substrate 211 at a desired portion. As shown in Fig. 8B, when deposition of a thin film of an appropriate material is carried out under appropriate deposition conditions, a thin film 213 is formed only on the thin film 212 but not on other portions of the substrate 211. By utilizing this phenomenon, the thin film 213 can be grown with self-alignment. Unlike the conventional process, the photolithography process using a resist can be omitted.

The materials for the selective deposition are SiO₂ for forming the substrate 211, Si, GaAs or silicon nitride for forming the thin film 212 and Si, W, GaAs or InP for forming the thin film 213.

Figure 9 is a graph illustrating changes in nucleation densities and deposition areas of SiO2 and silicon nitride as a function of time.

As can be seen from this graph, the nucleation density on SiO2 is saturated below 10³ cm⁻² immediately after deposition and remains essentially unchanged after 20 minutes.

However, on silicon nitride (Si₃N₄), the nucleation density temporarily saturates at about 4 x 10⁵ cm⁻² and does not change within 10 minutes. Subsequently, however, the Nucleation density increased steeply. In this measurement, the films were deposited by chemical vapor deposition at a pressure of 175 Torr and a temperature of 1000°C in an atmosphere in which SiCl₄ gas was diluted with H₂ gas. In addition, SiH₄, SiH₂Cl₂, SiHCl₃ or SiF₄ gas may be used as the reaction gas and the pressure, temperature and the like may be controlled to achieve the above-described effect. This deposition may be carried out by vacuum deposition.

In this case, a nucleus can be easily formed on SiO₂. By adding HCL gas to the reaction gas, the nucleation on SiO₂ can be further suppressed to prevent the generation of SiO₂ on Si.

The phenomenon described above depends on the differences between the absorption coefficients, the segregation coefficients and the surface diffusion coefficients of Si and those of SiO2 and silicon nitride. Si atoms react with SiO2 to form silicon monoxide (SiO) with a high vapor pressure. SiO2 itself is etched by silicon monoxide. Such an etching phenomenon does not occur on silicon nitride (T. Yonehara, S. Yoshioka and S. Miyazawa, "Journal of Applied Physics 53", 6839, 1982).

When SiO₂ and silicon nitride are selected as the materials for the deposition surface and silicon is selected as the deposition material, a sufficiently high nucleation density difference can be obtained as shown in the graph in Fig. 9. SiO₂ is preferable as the material for the deposition surface. However, even when using of SiOx a satisfactory nucleation density difference can be achieved.

The materials are not limited to those described above. As can be seen from Fig. 9, the sufficient nucleation density difference is 102 times the nucleation density or more. For the satisfactory formation of deposition films, materials exemplified below can be used.

Another method to achieve this nucleation density difference is to form a zone containing an excess amount of Si and N by locally ion implanting Si and N into SiO2.

By using the selective deposition process described above and preparing a pattern of a sufficiently fine heterogeneous material having a sufficiently higher nucleation density than the material of the deposition surface to allow only the growth of the single crystal, a single crystal can be grown at a location where the pattern of the fine heterogeneous material is located.

Since the selective growth of the single crystal is determined by the electron state at the deposition surface and in particular a free bond state, a host material need not be a material with a low nucleation density (e.g. SiO2), but it can be formed on any material or a substrate, thereby forming only the deposition surface.

Figs. 10A to 10C are diagrams illustrating a method of forming a single crystal, and Figs. 11a and 11b are perspective views of the substrate of Figs. 10A and 10C, respectively.

10A and 11A, a thin film 215 having a low nucleation density is formed on a substrate 214 for selective deposition, and a heterogeneous material having a high nucleation density is deposited on the thin film 215. These films are formed into a pattern 216 of the heterogeneous material by photolithography. The size and crystal structure of the substrate 214 can be arbitrarily selected. A substrate containing active elements can also be used. The pattern 216 of the heterogeneous material also includes a denatured region containing an excess amount of Si and N, which is obtained by ion implantation of Si and N into the thin film 215.

According to suitable deposition conditions, a single nucleus of a thin film material is formed only in the heterogeneous material pattern 216. That is, the heterogeneous material pattern 216 must be a micropattern fine enough to allow the growth of only a single nucleus. The dimensions of the heterogeneous material pattern 216 are less than several µm, depending on the types of materials. The nucleus maintains the single crystal structure and grows as a single crystal island 217. To achieve the island 217, conditions for preventing nucleation must be established on the thin film 215.

The single crystal island 217 continues to grow with the pattern 216 from the heterogeneous material as the center, while maintaining the single crystal structure. As shown in Fig. 11C, a single crystal cone 217a is obtained.

Since the thin film 215 is formed on the substrate 214 as a material for the deposition surface, the substrate 214 as a support target can be formed by any material. In addition, even if the substrate 214 contains active elements and the like, a single crystal can be easily formed on the substrate 214.

In the above-described embodiment, the material for the deposition surface is selected as the thin film 215. However, a substrate made of a material with a low nucleation density that enables selective deposition may be used without modification, and a single crystal may be formed in the manner described above.

Figs. 12A to 12C are illustrations for explaining another method of forming a single crystal.

As shown in Figs. 12A to 12C, a micropattern 216 of a heterogeneous material is formed on a substrate 215 of a material having a sufficiently low nucleation density to permit selective deposition. A single crystal can be formed in the same manner as in Fig. 9.

(Example)

A practical method for forming a single crystal is described below.

As a deposition surface material for a thin film 215, SiO₂ is used. In this case, a quartz substrate may be used. Alternatively, a SiO₂ film may be formed on a substrate made of a metal, a semiconductor, a magnetic material, a piezoelectric material, or an insulating material by sputtering, chemical vapor deposition, or vacuum deposition. As a deposition surface material, SiO₂ is preferable. However, SiOx may be used, where x is variable.

A layer of silicon nitride (Si₃N₄) or polycrystalline silicon as a heterogeneous material is deposited on the SiO₂ layer 215 by low-pressure epitaxy. The layer of silicon nitride or polycrystalline silicon is patterned using a conventional photolithography process or a lithographic process using X-rays, electron beams or ion beams to thereby obtain the micropattern 216 of the heterogeneous material with dimensions of a few µm or less, preferably approximately 1 µm or less.

Subsequently, Si is selectively grown on the substrate 214 by using a gas mixture of HCl or H2 and SiH2Cl2, SiCl4, SiHCl3, SiF4 or SiH4. In this case, the substrate temperature is 700 to 1100°C and the pressure is about 100 Torr.

Within a period of time between 10 minutes and 20 minutes, the single crystal 217 of Si with the micropattern 216 grows from the heterogeneous material such as silicon nitride or polycrystalline silicon as its center. By setting optimal growth conditions, the dimensions of the Si single crystal 217 can be increased from the dimensions of the heterogeneous material to several tens of µm of the single crystal 217a.

(Composition of silicon nitride)

To obtain a sufficiently high nucleation density difference between the deposition surface material and the heterogeneous material as described above, the material is not limited to Si3N4. The composition of silicon nitride can be changed.

In plasma chemical vapor deposition (CVD), in which SiH4 gas and NH3 gas are decomposed in a high frequency plasma to obtain a silicon nitride film at a low temperature, the flow rate ratio of NH3 gas to SiH4 gas is changed to greatly change the composition ratio of Si to N contained in a silicon nitride film to be deposited.

Fig. 13 is a graph showing the relationship between the Si/N composition ratio and the NH3/SiH4 flow rate ratio.

The deposition conditions for the graph in Fig. 13 were as follows: the high frequency output power was 175 W, the substrate temperature was 380°C, and the SiH₄ gas flow rate was fixed at 300 cc/min while the NH₃ gas flow rate was varied. When the When the gas flow ratio NH₃/SiH₄ was changed from 4 to 10, the composition ratio Si/N in the silicon nitride film was changed from 1.1 to 0.58 according to Auger electrospectroscopy.

The composition of the silicon nitride film formed under the conditions that SiH2Cl2 and NH3 gases were used at a low pressure of 0.3 Torr and a temperature of about 800 °C was equal to that of Si3N4 (Si/N 0.75) as a stoichiometric ratio.

A silicon nitride film prepared by heating Si in ammonia or N2 at a temperature of approximately 1200°C (by thermal nitrification) has a composition similar to a stoichiometric ratio since the film is formed at a thermal equilibrium state.

When the Si core is grown using silicon nitride as the deposition surface material, which has a higher nucleation density than Si, a difference in nucleation density occurs due to their composition ratio.

Fig. 14 is a graph showing the relationship between the Si/N composition ratio and the nucleation density. As can be seen from this graph, when the composition of the silicon nitride film is changed to a large extent, the nucleation density of Si grown on the silicon nitride film is changed. In this case, the nucleation conditions are set by increasing the pressure of the SiCl₄ gas to 175 Torr. is reduced and the SiCl₄ reacts with the H₂ at 1000ºC to form Si.

The phenomenon in which the nucleation density changes by the silicon nitride composition greatly affects the extent of the pattern of silicon nitride as the pattern of heterogeneous material which can be formed sufficiently finely enough to allow the growth of the single nucleus. That is, unless the silicon nitride having a composition for high nucleation density is provided with a fine pattern, a single nucleus cannot be formed.

The nucleation density and the optimal size of the silicon nitride pattern for selectively forming the single nucleus must be selected. Under deposition conditions to achieve a nucleation density of, for example, 10⁵ cm⁻², the selective formation of a single nucleus is enabled by the silicon nitride size of 4 µm or less.

(Creating heterogeneous material by ion implantation)

On the surface of the layer of SiO2 as a deposition surface material with a low nucleation density, in order to achieve a large nucleation difference, ions of Si, N, P, B, F, Ar, He, C, As, Ga, Ge or the like may be locally implanted to form a denatured region on the SiO2 deposition surface. This denatured region can serve as a deposition surface material with a high nucleation density.

For example, a resist is applied to the surface of the SiO2 layer, exposed with a desired mask pattern, developed and dissolved to partially expose the surface of the SiO2 layer.

Subsequently, SiF4 gas is used as the source gas and Si ions are implanted into the SiO2 with a doping of 1 x 10¹⁶ to 1 x 10¹⁶ cm⁻² at an accelerating voltage of 10 keV. The projection area is 11.4 nm. The concentration of Si reaches approximately 1022 cm⁻³ on the surface of the SiO2 layer. The area doped with the ions is amorphous.

To form a denatured region, ions can be implanted using a resist as a mask. By using the focused ion beam technique, a focused Si ion beam can be directed to the surface of the SiO2 layer without using a resist mask. To form a denatured region containing an excessive amount of Si on the SiO2 surface, the resist pattern is removed after ion implantation is completed. Then, Si is epitaxially grown on the SiO2 deposition surface having the denatured region.

Fig. 15 is a graph showing the injection amount of Si ions and the nucleation density.

It can be seen from Fig. 15 that when the doping amount of Si+ is increased, the nucleation density increases accordingly.

By forming the sufficiently fine denatured region, it can serve as a heterogeneous material that allows the growth of a single nucleus. As a result, a single crystal can be grown in the manner described above.

Forming a sufficiently fine denatured area, namely forming a micropattern, can be achieved by a resist pattern or with a focused ion beam spot.

(Si deposition processes excluding chemical vapor deposition)

In addition to chemical vapor deposition for forming a single crystal by utilizing Si nucleation, another method can be used in which Si is evaporated by an electron gun in vacuum ((10-6 Torr)) and deposited on a heated substrate. Specifically, in molecular beam epitaxy (MBE) for depositing Si in a high vacuum (< 10-9 Torr), the Si ion beam reacts with the SiO2 at a substrate temperature of 900°C and no Si nucleus is formed on the SiO2 (T. Yonehara, S. Yoshioka and S. Miyazawa, "Journal of Applied Physics 53", 10, p. 6839, 1983).

By utilizing this phenomenon, single Si crystal nuclei were perfectly and selectively formed in silicon nitride micropatterns scattered on the SiO2, and single crystal Si was grown. In this case, the deposition conditions were as follows: the vacuum was 10-8 Torr or less, the Si beam intensity was 9.7 x 1014 atoms/cm2s, and the substrate temperature was 900°C to 1000°C.

In this case, a reaction SiO₂ + Si T 2 SiO formed a reaction product as SiO with a very high vapor pressure. The Si itself was etched by the Si through this evaporation.

However, no etching occurs on silicon nitride and nucleation and deposition occur.

To achieve the same effect as that described above, tantalum oxide (Ta2O5), silicon nitride oxide (SiON) or the like can be used in addition to silicon nitride as a deposition surface material having a high nucleation density. These materials can be finely shaped and serve as a heterogeneous material, so that a single crystal can be grown with the heterogeneous material as a center.

(Growing tungsten single crystals)

Tungsten is used instead of Si.

Tungsten nucleation does not occur on SiO2, but the tungsten can be deposited as a polycrystalline film on Si, WSi2, PtSi, Al or the like. However, according to the method for producing a single crystal of the present invention, the single crystal can be easily grown.

Specifically, Si, WSi2, PtSi or Al is vacuum deposited on glass, quartz or a thermally oxidized film containing SiO2 as the main component and patterned by photolithography to obtain a micropattern with a size of several µm or less.

Subsequently, the resulting structure is placed in a reaction furnace heated to 250 to 500°C. A gas mixture of WF6 and H2 is introduced into the furnace at a pressure of approximately 0.1 to 10 Torr. In this case, the flow rate of WF6 is 75 cc/min and the flow rate of H2 is 10 cc/min.

According to the reaction formula WF₆ + 3 H₂ T W + 6 HF, tungsten is generated. In this case, tungsten hardly reacts with SiO₂ and no strong bonds are formed between them. Therefore, no nucleation and hence no film deposition occurs.

A tungsten core is formed on Si, WSi₂, PtSi or Al. In this case, only single tungsten cores are formed. On the SiO₂, such a core continues to grow in the transverse direction to a single crystal region, since the tungsten is not subject to core growth and cannot be grown as a polycrystal.

Combinations of the deposition surface materials, the heterogeneous materials and the deposition materials are not limited to those shown in the foregoing embodiments. Any combination may be used if a sufficiently high nucleation density difference can be achieved. According to the present invention, a single crystal can be formed with a compound semiconductor such as GaAs or InP subjected to the selective deposition.

In the multiple electron emission element according to the embodiment described in detail above, the plurality of The electrodes each having a tapered portion are formed on the deposition surface made of a single crystal. The conductivity of the electrode having the tapered portion can be improved. The electron emission region as the tapered portion is made to match the crystal surface having a predetermined structure, thereby improving the Schottky effect and the electron emission efficiency. In addition, the plurality of electrodes each having a tapered portion are formed on the deposition surface made of an insulating material, so that the electrical insulation can be improved and coupling between the adjacent electrodes can be prevented.

According to the method for manufacturing the above-described multiple electron emission element, the single crystal can be deposited on a material which conventionally cannot allow the single crystal to be grown thereon due to crystallinity or the like. The range for selecting the single crystal material can be greatly expanded and a large area of a single crystal can be obtained. In addition, the electron emission regions can be formed uniformly and sharply to achieve a higher field strength. Variations in the triggering drive voltage can be prevented and the electron emission efficiency can be further improved.

In addition, the position of the electrode with the conical portion can be determined by the position of the fine pattern of the heterogeneous material and can be arbitrarily determined. In addition, the shapes of the plurality of electrodes can be determined by the The size of the electrode having the conical portion can be easily controlled and dimensional deviations can be minimized. As a result, the plurality of electron emission sources of the multiple electron emission elements can be uniformly formed at fine pitches.

According to the method described above, the deposition surface can be formed on a base substrate made of a desired material, to thereby improve the reliability of the element.

Figs. 16A to 16D are schematic partial sectional views for explaining the steps in manufacturing an electron emission element according to another method of the present invention.

As shown in Fig. 16A, an oxide substrate 301 made of SiO2 as an amorphous insulating material is subjected to photo-etching to form a recess 302.

As shown in Fig. 16B, on the bottom surface of the recess 302 (namely, a deposition surface) on a nucleation base 303 made of Si, Si₃N₄ or the like, a single crystal of Mo, W, Si or the like having a single nucleus as its center is grown. An electrode 304 having a tapered portion of a desired size is formed. A method of forming the single crystal will be described below. In this embodiment, the bottom surface of the recess 302 of the oxide substrate 301 serves as deposition surface and the side wall surface of the recess 302 serves as an insulating part. The insulating part can be formed on the deposition surface in a separate process with the same material as that of the deposition surface or with a different material therefrom.

As shown in Fig. 16C, a resist is filled into the recess 302, and a metal layer 305 such as a Mo layer is formed on the resist and the oxide substrate 301. In addition, a photoresist 306 is applied to the metal layer 305, and exposed and etched in this photoetching process, thereby forming an opening 307.

Finally, as shown in Fig. 16D, an opening is formed in the metal layer 305 by etching and a metal layer 305 serving as a lead electrode is formed. The resist pattern is removed, thus completing an electron emission element.

In this method, the electrode having the tapered portion is formed on the oxide substrate 301. However, to manufacture an electron emission element in the manner described above, an oxide film may be formed on a base substrate.

Fig. 17 is a schematic partial sectional view of an emission element manufactured by the method according to Figs. 16A to 16D.

As shown in Fig. 17, an oxide film 301a is formed on a base substrate 308 made of Si and a recess 302 is formed therein, thereby forming the electron emission element on the underlying Si substrate. The following steps are the same as those shown in Figs. 16B to 16D and their description is omitted.

Fig. 18 is a schematic perspective view for explaining a conductor pattern of the electron emission element shown in Figs. 16A to 17.

As shown in Fig. 18, in the electron emission elements manufactured as shown in Figs. 16A to 17, a connection terminal is formed such that the electrode 304 having the tapered portion is formed on the bottom surface of the recess 302, a groove is formed in the oxide substrate or oxide film 301, and a conductor layer 309 is formed in the groove. The connection terminal is connected to the electrode 304 having the tapered portion. A voltage is applied from a power source 310 between the conductor layer 309 and the metal layer 305 to cause electron emission. In this embodiment, the metal layer such as a Mo layer is formed as a lead electrode during the process. However, a metal plate having an opening may be bonded to the oxide substrate or oxide film 301 after the groove is formed.

In the method described in Figs. 16A to 17, the electrode 304 having the tapered portion is determined by conditions such as the oxide substrate (oxide film) 301 as a deposition surface, the nucleation base 303, the material for deposition, and the deposition conditions. The electrode having the tapered portion can be formed regardless of the sizes of the recess 302 and the opening 307. Therefore, deviations in the electrode dimensions can be prevented. The position of the electrode 304 having the tapered portion is determined by the position of the core formation base 303. Therefore, the electrode 304 having the tapered portion can be formed at a desired location.

Since the single crystal can be formed with the nucleation base 303 as its center (the details of which will be described below), a wide choice of material is possible without considering the crystallinity or the like between the deposition material and the deposition surface. For example, unlike the conventional case, a single crystal can be formed on an amorphous substrate and complete electrical insulation is also possible. A large-area single crystal is ensured. In addition, the electron emission regions can be formed as conical portions uniformly and sharply to achieve a higher field strength. Deviations in the triggering operating voltage can be prevented and the electron emission efficiency can be further improved.

As shown in Fig. 17, the deposition surface may be formed on an underlying substrate made of a desired material. For example, the deposition surface may be formed on a substrate having a high heat radiation efficiency and therefore the reliability of the element may be improved.

According to the method described above, the electrode with the conical portion can be manufactured in a simple manner and the conductivity of the electrode with the conical portion can be improved. The Electron emission region as a conical portion can be made to match the crystal face with a predetermined structure. The Schottky effect and the electron emission efficiency can be improved.

A method for growing a single crystal on the deposition surface is described below.

First, selective deposition for selectively depositing a film on the deposition surface is described. Selective deposition is a method for selectively forming a thin film on a substrate by utilizing differences in factors of the materials. These factors include surface energy, deposition coefficients, segregation coefficients, and surface diffusion rates and determine the formation of the crystal nucleus during the thin film forming process.

As described above, in this electron emission element, the electrode 1 having a tapered portion thereon and formed on the deposition surface can be made of a single crystal. The conductivity of the electrode having the tapered portion can be improved. In addition, the electron emission region as the tapered portion can be made to match the crystal surface having a predetermined structure, thereby improving the Schottky effect and the electron emission efficiency.

According to the method for manufacturing this electron emission element, unlike the conventional case, a single crystal can be attached to a substrate which does not allow the single crystal to be formed thereon due to crystallinity or the like. Therefore, the range for selecting the single crystal material can be expanded.

By properly selecting the material for the substrate, the single crystal can be completely electrically isolated from the substrate. A large area of the single crystal can be reliably obtained. The electron emission regions can be formed uniformly and sharply to achieve a higher field strength. Therefore, deviations in the triggering operating voltage can be suppressed and the electron emission efficiency can be further improved.

Since the position of the electrode having the tapered portion can be determined by the position of the fine pattern of the heterogeneous material, the electrode having the tapered portion can be formed precisely at a desired location. The shape of the electrode having the tapered portion can be determined by conditions such as the materials of the constituent targets and the deposition conditions. The size of the electrode can be easily controlled. Dimensional deviations of the electrode can be prevented. As a result, a plurality of electron emission sources of the multiple electron emission element can be uniformly formed at fine pitches.

According to the method described above, the deposition surface can be formed on a supporting substrate made of a desired material. For example, the deposition surface can be formed on a substrate having a high Heat radiation efficiency can be increased and the reliability of the element can be improved.

Figs. 19A to 19F are schematic partial sectional views for explaining the steps in manufacturing an electron emission element according to another method of the present invention.

As shown in Fig. 19A, an insulating layer 402 made of an insulating material such as SiO2 is formed on a substrate 401 made of a conductive material (including a semiconductor) such as Si.

According to Fig. 19B, a recess 403 is formed in the insulating layer 402 by photoetching.

According to Fig. 19C, an opening 404 is formed in the bottom surface of the recess 403 in the insulating layer 402.

As shown in Fig. 19D, a nucleation base 405 made of a heterogeneous material such as Si or Si3N4 is formed on the bottom surface of the recess 403 in the form of a micropattern.

As shown in Fig. 19E, with a single nucleus formed on the nucleation base 405 as a center, a single crystal 406 such as a Mo, W or Si single crystal is formed. A method of forming this single crystal will be described below. When the single crystal 406 grows, a single crystal 407 is simultaneously grown on the portion of the conductive material exposed in the opening 404.

According to Fig. 19F, the single crystal 406 is grown and bonded to the single crystal 407, thereby forming an electrode 408 with a conical portion.

The deposition coefficients of single crystal atoms of the material for the single crystal 406, the material for the nucleation base 405, the conductive material of the substrate 401 and the material of the insulating layer 402 are given by K, L, M and N. The following condition must be satisfied:

K > L > M > N

When the conductive material of the substrate 401 is a material satisfying the condition L > M, the single crystal 406 having the nucleation base 405 and then the single crystal 407 are grown away from the opening 404. The single crystal 406 can grow with a conical shape peculiar to the single crystal. After the single crystal 406 is bonded to the single crystal 407, the single crystal 406 continues to grow while maintaining the shape of the conical portion.

However, when the condition of K > M > L > N is given and the conductive material of the substrate 401 is a material satisfying the condition of L > M, the single crystal in the opening 404 grows first. Therefore, it is difficult to form the single crystal 406 with a conical portion while centering on the single nucleus formed in the nucleation base 405. In this case, the growth of the single crystal 407 must be suppressed. For example, the opening 404 must be a hole with a very small diameter and the thickness of the insulating layer must be increased, thereby reducing the number of single crystal atoms which the surface of the exposed conductive material. Alternatively, the opening 404 must be filled with a resist until the single crystal 406 reaches a predetermined size. Thereafter, the single crystal 407 is grown.

Finally, an electrode layer such as a Mo layer is formed on the insulating layer 402 and is patterned by photolithography to form an opening 410 above the tapered portion of the electrode 408, thereby forming an electrode layer 409 serving as a lead electrode, thereby completing the electron emission element.

The crystal formed on the surface of the conductive material is described, for example, as a single crystal. However, this embodiment is also applicable to a polycrystal.

In the electron emission element manufactured by the above-described method, the electrode having the conical portion is connected to the surface of the conductive material through the opening formed in the insulating layer. Therefore, the conductor density and thus the packing density of the element can be increased and the reliability of the element can be improved.

According to this method in this embodiment described above, the electrode with the conical portion is connected to the surface of the conductive material as follows: The crystal is deposited in the opening formed in the insulating layer on the exposed surface of the conductive material. The electrode with the conical portion made of the crystal deposited on the single core grown centered in the fine pattern formed from heterogeneous material is bonded to the surface of the conductive material. In this case, an additional bonding process can be omitted and a simple electrical connection can be facilitated.

The sufficiently fine heterogeneous material pattern has a sufficiently higher nucleation density than the material of the insulating layer and allows growth only on the single nucleus formed on the insulating layer. The single crystal grows centered on the single nucleus formed in the heterogeneous material pattern. According to this method, the electrode 408 having the conical portion is determined by conditions such as the insulating layer 402 forming the deposition surface, the nucleation base 405, the deposition material, and the deposition conditions. The electrode 408 can be formed regardless of the sizes of the recess 403 and the opening 410 of the electrode layer 409. Size variations of the electrode 408 can be suppressed. The position of the electrode 408 having the tapered portion is determined by the position of the nucleation base 405, and therefore the position of the electrode 408 can be arbitrarily set with high accuracy. As a result, the plurality of electron emission outlets of the multiple electron emission element can be uniformly set at fine pitches.

The conical sections as electron emission areas can be shaped uniformly and sharply to achieve a high field strength. This can suppress deviations in the triggering operating voltage and The efficiency of electron emission can be further improved.

Unlike the conventional case, the single crystal can be deposited on the insulating layer which usually does not allow the single crystal to be formed thereon due to crystallinity or the like. The electrical insulation can be greatly enhanced and a large area of the single crystal can be ensured. The conductivity of the electrode having the tapered portion can be improved and the tapered portion as the electron emission portion can be made to coincide with the crystal surface having a predetermined structure, thereby improving the Schottky effect and the electron emission efficiency.

A method for forming this single crystal on the insulating layer is described below.

Selective deposition is described below for selectively forming a film on a deposition surface. Selective deposition is a method for selectively forming a thin film on a substrate by utilizing differences in factors of materials. These factors are surface energy, deposition coefficients, segregation coefficients and surface diffusion rates and determine nucleation during thin film formation.

In the electron emission element according to the foregoing description, the electrode having the conical portion is electrically connected to the surface of the conductive material. The electrode with the conical portion can be electrically insulated from the substrate and the line density and connection reliability can be improved.

According to the methods for manufacturing the electron emission element described above, the electrode having the conical single crystal portion can be electrically connected to the surface of the conductive material as follows: The single crystal is deposited on the surface of the conductive material exposed in the opening formed in the insulating layer and is grown centered on the single core formed in the fine pattern of heterogeneous material. Therefore, the electrical connection between the electrode having the conical portion and the surface of the conductive material can be established by a simple process.

Fig. 20 is a schematic partial sectional view for describing an electron emission element according to the present invention.

Fig. 21 is an enlarged sectional view of a portion A of a high-resistance film of Fig. 20.

As shown in Fig. 20 and 21, a plurality of nucleation bases 506 made of a heterogeneous material such as Si or Si₃N₄ are formed on an oxide substrate 501 made of an insulating material such as SiO₂. Single crystal zones made of Mo, W, Si or the like. Thus, a plurality of high-resistance films 503 having tapered portions 507 are formed from a single crystal in a desired size. The tapered portions 507 of the high-resistance films 503 each serve as electron emission regions. Unlike in Fig. 21, the nucleation bases 506 need not be formed at equal intervals and may be formed randomly. However, if the bases 506 are formed at equal intervals, the projections of the high-resistance films 503 may be substantially uniform. A method of forming the single crystal regions will be described below. Electrodes 502a and 502b are formed at both ends of the high-resistance films 503. An insulating layer 504 is formed on the electrodes 502 and the oxide substrate 501 so that an opening is formed at the position corresponding to the high-resistance films 503. A discharge electrode 505 is applied to the insulating layer.

A resist is filled in the electron emission outlet above the respective high-resistance films 503, and a metal layer such as a Mo layer is formed on the resist pattern and the insulating film. An opening corresponding to the respective high-resistance films 503 is formed in the metal layer by photoetching. Then, the resist pattern is removed to complete the electron emission element.

In the method of manufacturing this element, the plurality of high-resistance films 503 each having the tapered portion 507 are formed on the oxide substrate 501. However, an oxide film may be formed on a base substrate and the high-resistance film 503 is applied to it

In this embodiment, the lead electrode 505 is formed during the formation of the metal layer such as the Mo layer. However, after the formation of the insulating layer 504, a metal plate having an opening corresponding to the respective conical portion 507 may be bonded.

In the electron emission element according to this embodiment, the conditions for forming the single crystal of the high-resistance film are determined by the conditions of the oxide substrate 501 forming the deposition surface, the nucleation base 506, the material for depositing the single crystal, and the deposition conditions. Identical conditions are ensured for the individual nuclei grown in the respective nucleation bases 506. Therefore, dimensional deviations of the high-resistance film can be prevented. The position of each tapered portion is determined by the position of the corresponding nucleation base 506. Therefore, the tapered portion can be formed at a desired location with high accuracy.

The single crystal region can be grown centering on the corresponding nucleation base 506 (which will be described in detail below). A wide selection of the material is allowed without considering the crystallinity or the like between the deposition material and the deposition surface. For example, a single crystal can be formed on an amorphous substrate which hardly allows the single crystal to be grown thereon. A large area of the single crystal can be reliably obtained.

In addition, the film can be made to have a tapered shape peculiar to the single crystal. The electron emission regions can be made uniform and sharp to obtain a higher field strength. Thus, deviations in the triggering operating voltage can be suppressed and the electron emission efficiency can be improved. The tapered portion as the electron emission region can be made to match the crystal surface with a predetermined structure to improve the Schottky effect and the electron emission efficiency.

This element can be manufactured in the conventional semiconductor manufacturing process and a high packing density can be achieved with simple manufacturing steps.

If the collector electrode is formed on the high-resistance film, the field strength can be increased and the electron emission efficiency can be improved.

A method for forming a single crystal on the deposition surface is described below.

Selective deposition is explained below for selectively forming a film on a deposition surface. Selective deposition is a method for selectively forming a thin film on a substrate by utilizing differences between factors of materials. These factors are surface energy, deposition coefficients, segregation coefficients and Surface diffusion rates and determine nucleation during thin film forming.

Figs. 22A to 22C are illustrations for explaining a method of forming a single crystal, and Figs. 23A and 23B are a perspective view of the substrate of Figs. 22A and 22C, respectively.

22A and 23A, a thin film of a heterogeneous material having a higher nucleation density than the substrate is deposited on an amorphous insulating substrate 511 and patterned to obtain regions 512 in the micropattern of the heterogeneous material spaced apart by a distance 1. The regions 512 of the heterogeneous material each include a denatured region containing an excessive amount of Si and N and formed by implanting Si and N ions into the amorphous insulating substrate 511.

According to the appropriate deposition conditions, individual nuclei of a thin film material are formed only in the heterogeneous material zones 512. Each heterogeneous material zone 512 must be formed with a micropattern fine enough to allow the formation of only a single nucleus. The pattern size of the heterogeneous material zone 512 varies depending on the types of materials, but falls within the range of several µm. The crystal nucleus is grown while maintaining the single crystal structure and single crystal islands 513 are formed as shown in Fig. 22B. To form the islands 513, the deposition conditions must be determined such that that no nucleation reactions occur on the amorphous insulating substrate 511.

The crystal orientation of each island 513 along a direction perpendicular to the substrate surface is determined such that the energy at an interface between the material of the substrate 511 and the thin film material is minimal, since the crystal face makes the surface or interface energy anisotropic. However, as described above, the crystal orientation within the surface of the amorphous substrate is not fixed.

The single crystal islands 513 are grown centering on the corresponding zones 512 of the heterogeneous material while maintaining the single crystal structure. As shown in Fig. 22C, the adjacent single crystal islands 513 are brought into contact with each other. Since the crystal orientation in the substrate surface is not fixed, a crystal interface 515 is formed at the location between the zones 512 of the heterogeneous material.

The single crystal islands 513 grow three-dimensionally and the crystal surface with a low growth rate appears as a facet, whereby single crystal zones 514 are formed, each with a conical sub-area. The size of each single crystal zone 514 is determined by the distance 1 between the zones 512 of the heterogeneous material. By appropriately determining the formation pattern of the zones 512 of the heterogeneous material, the position of the interface can be controlled. Therefore, single crystal zones with a predetermined size and aligned in the desired manner.

Figs. 24A to 24C are illustrations for explaining another method for forming a single crystal.

As shown in Figs. 24A to 24C, a thin film 511 is formed on a desired substrate 516 from a material having a lower nucleation density than the substrate to enable selective deposition. On the substrate 516, the zones 512 of the heterogeneous material are formed spaced apart by a distance 1. In the same manner as in Figs. 22A to 22C, the single crystal zones 514 are formed.

As described in detail above, in the electron emission element according to this embodiment, the conditions for forming the single crystal of the high-resistance film are determined by conditions such as the substrate or the insulating film as a deposition surface, the heterogeneous material, the material for depositing the single crystal, and the deposition conditions. The tapered portions can be formed under identical conditions centering on the corresponding single crystal nuclei grown in the heterogeneous material regions. Thus, deviations in the sizes of the tapered portions can be prevented. The position of the tapered portion can be determined by the position of the heterogeneous material region. Therefore, the tapered portion can be formed at a desired location with high accuracy.

Since the single crystal region can be easily formed centering on the corresponding region of the heterogeneous material, a wide range for selecting the material is enabled without considering the crystallinity or the like between the deposition material and the deposition surface. A single crystal can be formed on an amorphous substrate where the formation of the single crystal is rarely possible. A large area of the single crystal can be reliably obtained.

In addition, the single crystal region can be formed with a conical shape peculiar to the single crystal. The electron emission region can be formed uniformly and sharply. Thus, deviations in the triggering operating voltage can be suppressed and the electron emission efficiency can be improved. The conical portion as the electron emission region can be made to coincide with the crystal facet having a predetermined structure, thereby improving the Schottky effect and the electron emission efficiency.

Since the electron emission element can be manufactured in a conventional semiconductor manufacturing process, a high packing density can be achieved by a simple manufacturing process.

If a lead electrode is formed on the high-resistance film, the field strength can be increased and the electron emission efficiency can be improved.

In this embodiment, the deposition surface can be formed on a base substrate made of a desired material. For example, the deposition surface can be formed on a substrate having a high heat radiation efficiency and the reliability of the element can be improved.

Fig. 25 is a schematic representation of a first electron emission device according to another further method of the invention.

As shown in Fig. 25, a nucleation base 603 made of Si or Si3N4 is formed on a deposition surface of an oxide substrate 602 made of an amorphous material such as SiO2. A single crystal made of Mo, W, Si or the like is grown centered on a single core formed in the nucleation base 603, thereby forming an electron emission electrode 604 having a tapered portion in a desired size. In general, it is difficult to form a single crystal on an insulating material, but this formation can be achieved by a method described below.

A voltage application electrode 601 is formed on the lower surface of the oxide substrate 602 made of an insulating material. The voltage application electrode 601 is opposed to the electron emission electrode 604.

Above the electron emission electrode 604, a discharge electrode 607 is formed, which increases the field strength at the conical portion and serves as a charge supply device. The discharge electrode 607 is formed in such a way that an insulating layer with a thickness corresponding to the electron emission region of the electron emission electrode 604 is applied and a metal plate with a corresponding opening is attached to the insulating layer.

A target 605 is placed above the collector electrode 607 and is to be irradiated with the electrons emitted by the emission electrode. A current source 606 is connected between the target 605 and the voltage application electrode 601 in such a way that the potential at the target 605 is higher than that of the electrode 601. The switching on and off of the current source 606 is controlled by a switching device 611.

Current sources 608 and 609 are connected in parallel between the lead electrode 607 and the voltage application electrode 601. The current source 608 is connected such that the potential of the lead electrode 607 is higher than that of the voltage application electrode 601. The current source 609 is connected such that the potential of the voltage application electrode 601 is higher than that of the lead electrode 607. The current sources 608 and 609 are switched with a switching device 610.

The operation of the electron emission device with this arrangement is described below.

The switching device 611 is used to switch on the power source 606 for applying a voltage between the target 605 and the voltage application electrode 601. The switching device 610 is used to Power source 608 is switched on to apply a voltage between the lead electrode 607 and the voltage application electrode 601. This generates potential differences between the electron emission electrode 604, the target 605 and the lead electrode 607. Electrons are emitted from the electron emission electrode 604 (electron emission). In this case, the electron emission region is mainly a conical portion of the electron emission electrode 604, which has a high field strength. Due to this electron emission, positive charges accumulate on the electron emission electrode 604 and the field strength is reduced. The amount of electron emission is reduced and ultimately electrons are no longer emitted.

The switching device 610 is used to switch on the power source 609 to apply a counter voltage (discharge voltage) between the discharge electrode 607 and the voltage application electrode 601. At the same time, the switching device 611 switches the voltage applied to the target 605 to 0 V. Electrons are emitted from the discharge electrode 607 to the electron emission electrode 604. The emitted electrons combine with the positive charges collected on the electron emission electrode 604 to cancel the positive charge. Therefore, the electron emission electrode 604 can emit electrons again (discharge process).

To release electrons, this electron emission and discharge process is repeated.

Fig. 26 is an equivalent circuit diagram of the device shown in Fig. 25 during electron emission.

A resistor 612 shown in Fig. 26 is equivalent to the resistance between the target 605 and the electron emission electrode 604. A resistor 613 is equivalent to the resistance of the electron emission electrode 604. A capacitance 614 is equivalent to the capacitance of the electron emission electrode 604, the oxide substrate 602, and the voltage application electrode 601. A current source 615 is equivalent to the current source 606 for applying a voltage between the voltage application electrode 601 and the target 605 and to the current source 608 for applying a voltage between the voltage application electrode 601 and the lead electrode 607.

The level of the voltage applied between the target and the electron emission electrode 604 during the electron emission is calculated in relation to the voltage applied from the current source 615.

If the emission current density is 10A/cm², the voltage from the power source 615 is 100 V and a cross section of the electron emission area of the electron emission electrode 604 is 1 µm², the following resistance value RA of the resistor 612 results:

RA = 10⁹ (Ω)

When a specific resistance is equal to 10 Ω cm, the average length 1 of the electron emission electrode 604 is equal to 1 μm and whose cross-section S is 1 µm², the resistance value RS of the resistor 613 is as follows:

RS = 1/S = 10&sup4;(&Omega;)

Under the conditions that the thickness d of the oxide substrate 602 is 100 nm, the electrode area S is 10 µm² and the specific dielectric constant εs is 4, a capacitance value C of the capacitor 614 is as follows:

C = εs ε0 S/d = 3.6 x 10⊃min;¹⊃8;

At an operating frequency of 1000 MHz, the impedance Z of the capacitance 614 is as follows:

z = 5 x 10&sup7;(&Omega;)

Under these conditions, the ratio of the voltage applied between the target 605 and the electron emission electrode 604 to the voltage supplied from the power source 615 is as follows:

Z / RA + RS + Z < 1/10

The voltage applied between the target 605 and the electron emission electrode 604, that is, the voltage for enabling electron emission, is not too much influenced by the capacitance.

In the first electron emission device described above, the electrons from the charge supply device and can be discharged from the electron emission electrode which is arranged independently from the insulating surface. Therefore, the insulation breakdown voltage can be greatly increased. The conductive layer does not need to be formed along the surface of the insulating material or a lead does not need to be made by making a through hole in the insulating layer on the conductive substrate. Therefore, the packing density can be greatly increased.

The electron emission electrode 604 need not be made of a single crystal, but may be made of a polycrystal if a tapered portion can be formed. However, if the electron emission electrode 604 is made of a single crystal, the electrode may have a tapered shape peculiar to the single crystal. The electron emission portion is formed uniformly and sharply. No tapering process need be used, and a higher field strength can be achieved with uniformity. This can prevent deviations in the triggering operating voltage and improve the electron emission efficiency. In this method, a zone of heterogeneous material formed into a fine pattern, which has a sufficiently higher nucleation density than the material of the deposition surface and which allows only the single nucleus to grow, is deposited on the deposition surface, and the crystal is grown centering on the single nucleus grown in the zone of heterogeneous material. This method can also be applied to other methods when a polycrystal or the like is used.

When the method is applied to grow the crystal centered on the single nucleus grown in the heterogeneous material zone, the following advantages can be achieved:

(1) The shape of the electron emission electrode having a tapered portion is determined by the conditions such as the deposition area, the heterogeneous material, the deposition material and the deposition conditions. The size of the tapered portion can be easily controlled. Therefore, a tapered portion of a desired size can be formed and deviations in its size can be prevented.

(2) Since the position of the electron emission electrode having the tapered portion can be determined by the position of the heterogeneous material zone, the electrode can be formed at a desired position with high accuracy. In addition, in the multiple electron emission element, the plurality of electron emission outlets can be uniformly arranged at fine pitches.

(3) Unlike the conventional case, a single crystal can be formed on an amorphous insulating substrate and an electron emission element with a high dielectric breakdown voltage can be provided.

(4) The element can be produced by the conventional semiconductor manufacturing process and can be produced through a simple process with a high level of integration.

A second electron emission device to which the above method is applied will be described below.

Fig. 27 is a schematic diagram of the second electron emission device. The same reference numerals as in Fig. 25 denote the same parts in Fig. 27.

As shown in Fig. 27, nucleation bases 6031 to 6033 made of Si, Si3N4 or the like are formed on a deposition surface of an oxide substrate 602 made of an amorphous material such as SiO2. With the individual nuclei formed in the nucleation bases 6031 to 6033 as the center, single crystal regions made of Mo, W, Si or the like are grown. Thus, electron emission electrodes 6041 to 6043 each having a desired size and a tapered portion (the number of electron emission electrodes is not limited to "3") are formed.

Voltage application electrodes 6011 to 6013 are formed on the lower surface of the oxide substrate 602 made of the insulating material, opposite to the electron emission electrodes 6041 to 6043. A discharge electrode 607 is provided above the electron emission electrodes 6041 to 6043, which increases the field strength at the conical portions and serves as a charge supply device. A target 605 to be irradiated with the electrons emitted from the electron emission electrodes 6041 to 6043 is provided above the discharge electrode 607. A power source 606 is connected between the target 605 and the voltage application electrodes 6011 to 6013 via a switching device 611, a pulse generator 606 and a selector switch device 617 such that the potential at the target 605 is higher than that at the voltage application electrodes. The voltage applied to the target 605 is controlled by the switching device 611.

The current sources 608 and 609 are connected in parallel to each other via a switching device 610, the pulse generator 616 and the selection switching device 617 between the lead electrode 607 and the voltage application electrodes 6011 to 6013. The current source 608 is connected such that the potential of the voltage application electrodes 6011 to 6013 is lower than that of the deflection electrode 607. The current source 609 is connected such that the potential of the voltage application electrodes 6011 to 6013 is higher than that of the deflection electrode 607. The current sources 608 and 609 are switched by the switching device 610.

During the electron emission process, the selector switch 617 sequentially turns on the pulses generated by the pulse generator and sequentially supplies the pulses to the voltage application electrodes 601₁ to 601₃. During the discharge process, a discharge voltage is applied from a reset unit 620 to the voltage application electrodes 601₁ to 601₃ connected in common thereto.

During discharging, the voltage applying electrodes 601₁ to 601₃ are connected to each other by the reset unit 620. During Upon electron emission, the reset unit 620 applies a bias voltage to the turned-off voltage application electrodes, thereby preventing crosstalk coupling between the adjacent electrodes.

A control unit 618 supplies control signals to the reset unit 620, the selector switch device 617, the pulse generator 616, the switching device 611 and the switching device 610 and controls the switching times and the pulse generation times. The control signals output from the control unit 618 are controlled by control information stored in a memory 619.

The operation of the second electron-emitting device having the above arrangement will be described below.

Fig. 28 is a timing chart for explaining the operation of the second electron emission device.

A period t2 in Fig. 28 is an electron emission period. During this period, the power source 606 is turned on by the switching device 611 to apply a voltage V3 to the target 605. The voltage application electrodes 6011 to 6013 are sequentially set to 0 V by the selection switching device 617. As described above, a bias voltage V4 is applied to the turned-off voltage application electrodes by the reset unit 620. The power source 608 is turned on by the switching device 610 to apply a voltage V1 to the output electrode 607.

It is assumed that the selected electrode, namely the electrode that is turned on, is the voltage application electrode 601₁. The voltage V3 is applied between the voltage application electrode 601₁ and the target 605, and the voltage V1 is applied between the lead electrode 607 and the electrode 601₁. An electric field that is strong enough for electron emission is established between the electron emission electrode 604₁ and the target 605. As a result, the electrons are emitted from the electron emission electrode 604₁.

In this case, the bias voltage V4 is applied to the non-selected or turned off voltage application electrodes 6012 and 6013. Thus, an electric field is established between the electron emission electrodes 6042 and 6043 and the target 605, which is not strong enough for electron emission, so that no electrons are emitted.

In this way, the voltages are successively applied to the voltage application electrodes 601₂ and 601₃, and the electrons are successively emitted from the electron emission electrodes 604₂ and 604₃. If more than three voltage application electrodes, namely voltage application electrodes 601n with n > 3, are provided, the voltage pulses with the same waveform can be successively applied to the voltage application electrodes following the electrode 601₃ during the time period t2.

As described above, positive electrons accumulate at the electron emission electrodes 604₁ to 604₃ due to electron emission. During the corresponding electron emission periods, the field strengths are weakened and the electron emission amounts are reduced. As a result, electrons are no longer emitted.

A period of time t1 is a discharge period of time. The voltage application electrodes 601₁ to 601₃ are connected to each other and set to 0 V by the reset unit 620. The power source 609 is turned on to apply a voltage of -V2 to the lead electrode 607 by the selector switch 617 and the switching device 610. The target 605 is set to 0 V by the switching device 611. In this case, a high voltage V2 is applied between the lead electrode 607 and the voltage application electrodes 601₁ to 601₃ such that the potential of the electrodes 601₁ to 601₃ is higher than that of the electrode 607. Between the electron emission electrodes 604₁ and 605₃, a high voltage V2 is applied. to 604₃ and the lead electrode 607, an electric field is established that is strong enough for electron emission. Electrons are emitted from the lead electrode 607. The emitted electrons combine with the positive charges accumulated in the electron emission electrodes 604₁ to 604₃ to cancel the positive charge. Therefore, the electron emission electrodes 604₁ to 604₃ can emit electrons again.

Then, in the next electron emission period, electron emission occurs. In this way, the electron emission and discharge processes are repeated alternately to release the electrons.

In the second electron emission device described in detail above, the electrons are supplied from the charge supply device to enable the emission of electrons from the electron emission electrodes which are formed without connection on the insulating surface. Therefore, the dielectric breakdown voltage can be increased considerably. The electrical insulation between the adjacent electrodes can be improved considerably. This embodiment is therefore suitable for an electron emission device having a plurality of electron emission sources which are uniformly formed at fine pitches. In addition, there is no need to form a lead layer along the surface of the insulating material or to form a through hole in an insulating layer deposited on a conductive substrate, thereby significantly increasing the packing density of the device.

In this embodiment, in order to apply voltage components between the voltage application electrodes and the target, the voltage pulses are applied to the plurality of voltage application electrodes in time division, thereby causing the electron emission operations. In this case, the circuit arrangement with a large number of electron emission electrodes can be simplified. For example, when a voltage is applied to the switching device 611 in synchronism with the selection timing for the voltage application electrodes 601₁ to 601₃ shown in Fig. 27, the electrons can be emitted from the selected electron emission electrode. The Selection signals do not need to be fed to the voltage application electrodes

As shown, in the first and second electron emission devices, if the lead electrode is designed to increase the field strength at the electron emission electrode and also serves as a charge supply device, no separate charge supply device needs to be provided, thereby simplifying the circuit arrangement.

A third electron emission device used in a method according to the invention is described below.

Fig. 29 is a schematic diagram of the third electron emission device. The same reference numerals as in the first electron emission device of Fig. 25 denote the same parts in the third electron emission device, and a detailed description of the parts is omitted.

The configuration of the third electron emission device is substantially the same as that of the first electron emission device. The discharge electrode as a charge supply device, the power sources 608 and 609 and the switching device 610 are omitted (however, the efficiency of electron emission can be improved if the discharge electrode 607 is arranged to receive a positive voltage). A substrate 621 is not a completely insulating substrate but a semiconductor substrate which allows a leakage current. When the electrons are emitted during electron emission, are emitted, the emitted charge component is supplied from the voltage application electrode 601 through the substrate 621 made of the semiconductor material to the opposite electron emission electrode.

The semiconductive material may be a metal such as Pd or a semiconductor material such as In₂O₃, ZnO or SnO₂. The substrate 621 may be made of a semiconductive material alone. However, in view of rapid charge supply, it is preferable to form a thin substrate. In general, a conductive film is deposited on an insulating substrate. When the above-mentioned materials are formed into films, their sheet resistances are as follows: about 102 to 10⁷ Ω/ for Pd, about 102 to 10⁷ Ω/ for In₂O₃, about 102 to 10⁷ Z/ for ZnO and about 102 to 10⁷ Z/ for SnO₂.

The manufacturing conditions for depositing SnO₂ on a glass substrate by reactive sputtering are as follows:

(1) Atomizer SPF-312H (Nichiden Anelba K.K.)

(2) Manufacturing conditions Target: SnO₂ (99.9%) (Furuuchi Kagaku K.K.) Sputtering gas: O₂ (100%) High frequency power: 400 W Sputtering pressure: 5 x 10⊃min;3 Torr Substrate temperature: 200ºC Deposition time: 20 minutes

(3) Annealing condition 300ºC, 1 hour (N₂ atmosphere)

Under these conditions, a SiO2 film with a thickness of approximately 50 to 100 nm can be formed on a glass substrate.

Fig. 30 is an equivalent circuit diagram of this electron emission device during electron emission. The same reference numerals as in Fig. 26 denote the same parts in Fig. 30 and the detailed description thereof is omitted.

According to Fig. 30, a voltage is applied between the voltage application electrode 601 and the target 6Q5 with an equivalent source 615, since the drain electrode 607, the current sources 608 and 609 and the switching device 610 are omitted. An equivalent resistor 622 represents the resistance of the semiconductor material to the leakage current and is connected in parallel with the capacitance 614.

Fig. 31 is a timing chart for explaining the operation of the third electron emission device described above.

As shown in Fig. 31, when a pulse voltage is applied from the equivalent source 615 between the voltage application electrode 601 and the target 605 during a period t3, the potential of the electron emission electrode 605 is increased. When the electrons are emitted from the electrode 604, its potential is further increased. This potential is increased until the potential difference between the target 605 and the electron emission electrode 604 is "0". Therefore, the potential is maintained at a predetermined value. At this time, the voltage on the two sides of the capacitor 614 is increased with a time constant which determined by the resistance values of resistors 612, 613 and 622 and the capacitance value of capacitor 614.

When the potential difference between the target 605 and the electron emission electrode 604 is reduced and the electron emission stops, the equivalent source 615 is kept off for a period of time t4. At this time, the off target 605 is electrically separated from the electron emission electrode 604 and no current flows between them. That is, the resistance value of the equivalent resistor 612 is essentially infinite. Since, as described above, the substrate 621 is made of a semiconductive material, the charge on the capacitance is discharged through the equivalent resistor 622.

The time periods t3 and t4 are appropriately set to correspond to the time required for charging and discharging so that the electron emission can be continuously induced.

A fourth electron emission device used for the method of the present invention is substantially the same as the second electron emission device shown in Fig. 27 except that the lead electrode 607 as a charge supply device, the power sources 608 and 609 and the switching device 610 are omitted (however, the electron emission efficiency can be improved if the lead electrode 607 is formed to receive the positive voltage) and the substrate is made of a semiconductor material, and a detailed description of the device is omitted.

If a voltage having the same waveform as that shown in the timing chart in Fig. 28 is applied to the target 605 and the voltage applying electrodes 601₁ to 601₃ during electron emission, electron emission can be continuously caused. The discharging operation of this device is the same as that of the third electron emission device and the detailed description thereof is omitted. In this case, a time sufficient for discharging the charges from the respective electrodes is required during a period t3.

A method for forming a single crystal on a deposition surface is described below.

Selective deposition is described below for selectively depositing a film on the deposition surface. Selective deposition is a method for selectively forming a thin film on a substrate by utilizing differences in factors of materials. These factors are surface energy, deposition coefficients, segregation coefficients and surface diffusion rates and determine nucleation during the thin film formation process.

According to the electron emission method described above, the charge discharged from the electron emission electrode during electron emission is replenished after the electron emission. The electron emission electrode can therefore be formed on the insulating layer and the dielectric breakdown voltage of the device can be increased. There is no need to form a conductive layer along the surface of the insulating layer or to form a via hole in an insulating layer on a conductive substrate. Therefore, the packing density of the device can be greatly increased.

In the first electron emission device, the electrons are supplied after the electron emission from the charge supply device, and the insulated electron emission electrode formed on the insulating surface can continuously discharge the electrons. Therefore, the dielectric breakdown voltage can be increased considerably. The amount of charge to be supplied to the electron emission electrode can be arbitrarily set, and the time required for discharge can also be arbitrarily selected.

In the second electron emission device, after the electron emission process, the electrons are supplied from the charge supply device, and the electrons can be continuously discharged from the plurality of insulated electron emission electrodes on the insulating surface. The dielectric breakdown voltage can be increased considerably. The electrical insulation between the adjacent electrodes can be improved. This device is suitable as an electron emission device having a plurality of electron emission sources uniformly formed at fine pitches. In addition, the amount of charge supplied to the electron emission electrodes can be arbitrarily set and the time required for discharge can also be arbitrarily selected.

Furthermore, the voltage is applied to the plurality of voltage application electrodes for applying voltage between the voltage application electrodes and the target in a time-division multiplexed manner, thereby causing electron emission. In this case, a circuit arrangement with a larger number of electron emission electrodes can be simplified, the number of components can be reduced, and the packing density can be increased.

In the first and second electron emission devices, when the lead electrode is designed to increase the field strength at the electron emission electrode and serves as a charge supply device, a separate charge supply device does not need to be formed, thereby simplifying the circuit arrangement.

In the third electron emission device, the electron emission electrode is formed on a semiconductor material, and the charge flowed out of the electron emission electrode during electron emission can be supplied through the semiconductor material. The dielectric breakdown voltage can be increased. In addition, a special charge supply device does not need to be formed and the design of the device can be simplified.

In the fourth electron emission device, the plurality of electron emission electrodes are formed on a semiconductor material. The charge flowing out of the plurality of electron emission electrodes during electron emission can be supplied via the semiconductor material. The dielectric breakdown voltage can be increased. The electrical insulation between the adjacent The structure of the electrodes can be improved. This device can be suitably used as an electron emission device having a plurality of electron emission sources uniformly formed at fine pitches. A separate charge supply device need not be provided and the structure of the device can be simplified.

32A to 32F are schematic partial sectional views for explaining the steps in manufacturing an electron emission element according to another further method of the present invention.

As shown in Fig. 32A, a nucleation base 702 made of a heterogeneous material such as Si or Si3N4 is deposited on a deposition surface of a substrate 701 made of an amorphous insulating material such as SiO2.

As shown in Fig. 32B, a single crystal of Mo, W, Si or the like is grown with a single core formed in the nucleation base 702 as a center. Thereby, an electrode 703 of a desired size having a tapered portion is formed. Hereinafter, the crystal formed on the deposition surface is described as a single crystal. However, the crystal formed on the deposition surface is not limited to the single crystal but may be expanded to a polycrystal. The method of forming the single crystal is described in detail below. An insulating material such as a polyimide resin film or an acrylate film is deposited on the electrode 703 having the tapered portion and on the substrate 701.

As shown in Fig. 32C, an electrode layer 705 such as a Mo layer is formed on the insulating layer 704. A photoresist 706 is applied to the electrode layer 705 and exposed to form an opening directly above the conical portion of the electrode 703.

As shown in Fig. 32D, the electrode layer 705 is etched to form an opening 707.

As shown in Fig. 32E, the insulating layer 704 is selectively etched through the opening 707 to form an opening 708 such that at least the conical portion of the electrode 703 is exposed.

Finally, as shown in Fig. 32F, the photoresist 706 is removed to complete the electron emission element.

In this method, the electrode 703 having the tapered portion is formed on the SiO₂ substrate 701. However, to manufacture an electron emission element in the manner described above, a film 701a of amorphous SiO₂ may be deposited on an underlying substrate.

Fig. 33 is a schematic partial sectional view illustrating a step in manufacturing another electron emission element according to the method of Figs. 32A to 32F.

According to Fig. 33, an amorphous film 701a is formed on a Si base substrate 709. The nucleation base 702 is deposited on the amorphous film 701a, thereby forming the electron emission element on the underlying Si substrate. The subsequent steps are the same as those of Figs. 32B to 32F, and a detailed description thereof is omitted.

According to the description regarding the method of manufacturing the electron emission devices shown in Figs. 32A to 33, an electrode having a conical portion serving as an electron emission region is centered on a single core formed in a micropatterned region of heterogeneous material and formed on a clean surface. An insulating layer and a lead electrode are successively formed thereon to obtain the electrode having the conical portion made of a single crystal substantially free of crystal defects. The conical portions serving as electron emission regions can be uniformly formed to achieve an increase in field strength. Variations in the triggering operating voltage can be minimized.

As shown in Fig. 33, the deposition surface may be formed on an underlying substrate made of a desired material. For example, the deposition surface may be formed on a substrate having a high heat radiation efficiency, thereby improving the reliability of the device.

On the deposition surface, a zone of a heterogeneous material formed into a sufficiently fine pattern is formed, which has a sufficiently higher nucleation density than the material of the deposition surface and allows the growth of only a single nucleus. The crystal is grown with the single nucleus grown in the zone of the heterogeneous material as the center. In this method, the electrode 703 having the conical portion is determined by conditions such as the insulating layer 704 forming the deposition surface, the nucleation base 702, the deposition material and the deposition conditions. The size of the electrode 703 is determined independently of the size of the opening 707. Dimensional deviations of the electrodes 703 can be prevented. The position of the electrode 703 can be determined by the position of the nucleation base 702. Thus, the electrode 703 can be formed at a desired location with high accuracy. As a result, the plurality of electron emission outlets of the multiple electron emission element can be uniformly formed at fine pitches.

The electrode having the tapered portion can be simply formed by the single crystal. The conductivity of the electrode having the tapered portion can be improved, and the tapered portion as an electron emission region can be made to match the crystal facet having a predetermined structure, thereby improving the Schottky effect and the electron emission efficiency.

A method for growing the single crystal on the deposition surface is described below.

Selective deposition for selectively depositing a film on a deposition surface is described below. Selective deposition is a method for selectively depositing a thin film on a substrate by utilizing differences in factors of the materials. The factors are surface energy, deposition coefficients, segregation coefficients, surface diffusion rates, and the like, and determine the formation of the core in the thin film forming process.

According to the method described in detail above, an electrode having a tapered portion serving as an electron emission region is centered on a single core formed in a heterogeneous material formed into a micropattern and formed on a clean surface. Subsequently, an insulating layer and a lead electrode are formed thereon to obtain the electrode having the tapered portion made of a crystal substantially free of crystal defects. The shapes of the tapered portions serving as electron emission regions can be formed uniformly to achieve an increase in field strength. Variations in the triggering operating voltage can be minimized.

Furthermore, the deposition surface may be formed on an underlying layer of a desired material. For example, the deposition layer may be formed on a substrate having a high heat radiation efficiency and the Reliability of the device can be considerably improved.

Fig. 34 is a schematic partial sectional view of an electron emission element according to another method of the invention.

As shown in Fig. 34, an insulating layer 802 made of an amorphous insulating material such as SiO2 is formed on a substrate 801 made of Si or the like. The insulating layer 802 is subjected to photoetching to form a recess 807. In this embodiment, a bottom surface 807a of the recess 807 serves as a deposition surface and the side wall surface is made of the insulating material, and these are formed in a single process. However, the insulating material may be applied to the deposition surface in a separate step. The material of the insulating part may be the same as that of the deposition surface or may be made of a different material.

On the bottom surface 807a (deposition surface) of the recess 807, a nucleation base 803 made of a heterogeneous material such as Si or Si₃N₄ is formed. With the single nucleus formed in the nucleation base 803 as the center, a single crystal such as a Si single crystal is grown. A conductive member 804 having a tapered portion is formed, and a heat-resistant conductive film 805 is deposited on the conductive member 804 to thereby produce an electrode 808 having a tapered portion. The material for the conductive member 804 is not limited to a particular material as long as a predetermined current can flow therethrough. Thus, the conductive member 804 can be Material may be a semiconductor or a conductor. A method of forming the single crystal of the conductive part is described below.

The heat-resistant conductive film 805 is made of W, LaB6 or the like and is deposited on the conductive member 804 by any manufacturing method. For example, to form a film on a conductive member made of a Si single crystal, chemical vapor deposition (CVD) is carried out to cause the following chemical reaction on the Si single crystal:

Si + WF₆T W + SiF₄

so that a W film is formed on the Si single crystal film.

Near the tapered portion of the electrode 808, a lead electrode 806 is formed over the insulating layer 802. The lead electrode 806 can be formed as follows: The recess 807 is filled with a resist, and a metal layer such as a Mo layer is formed on the resist layer and the insulating layer 802. The metal layer is subjected to photoetching to form an opening near the tapered portion of the electrode 808. Finally, the resist film is removed.

In this embodiment, the material of the deposition surface is not limited to the insulating material. A semiconductor material or a conductive material may also be used. However, when using an insulating material, the dielectric breakdown voltage can be increased. In this embodiment, the insulating layer 802 is applied to the substrate 801 to form the deposition surface. However, the surface of an insulating substrate can also serve as the deposition surface.

Fig. 35 is a schematic perspective view for explaining the lead connection of the electron emission element according to this embodiment

According to Fig. 35, the connection of this electron emission element can be carried out as follows: After the electrode 808 having the tapered portion is formed on the bottom surface 807a of the recess 807, a groove is formed in the insulating layer 802. A conductive layer 809 is formed in the groove and connected to the electrode 808 having the tapered portion. A voltage is applied between the conductive layer 809 and the lead electrode 806 such that the potential of the lead electrode 806 is higher than that of the conductive layer 809 and the electron emission can be induced. In the above-described configuration, the lead electrode 806 is formed such that the metal layer such as the Mo layer is etched in the process. However, a metal plate having an opening may be bonded to the insulating layer 802 after the groove is formed.

In the electron emission element described above, the electrode with the conical portion consists of the conductive part with the conical portion and the heat-resistant conductive film formed thereon. Electron emission region is formed by the conductive film having high heat resistance to prevent deformation of the tapered portion caused by melting due to heating. In addition, most of the electrode having the tapered portion is composed of the conductive portion having high conductivity, thereby preventing unnecessary heat generation.

The conductive member is preferably made of a single crystal in view of its conductivity. However, the material for the conductive member is not limited to the single crystal, but may be a polycrystal or the like. The method for forming the conductive member is not limited to the above-described method for growing the single crystal. Although the method shown in Fig. 1 can be used, the single crystal growth method for forming a heterogeneous material shaped into a micropattern having a sufficiently higher nucleation density than that of the deposition surface to allow formation of only a single crystal nucleus and for growing the crystal with the single nucleus as the center has the following advantages:

(1) The shape of the electrode with the tapered portion is determined by the deposition area, the heterogeneous material, the material of the conductive part and the deposition conditions. The electrode with the tapered portion can be formed regardless of the sizes of the openings in the insulating part and the collector electrode. Therefore, an electrode with a tapered portion can be formed in a desired size and deviations in its size can be prevented.

(2) Since the position of the electrode having the tapered portion can be determined by the position of the heterogeneous material zone, the electrode having the tapered portion can be formed at a desired position with high accuracy. A multi-electron emission element can be designed such that its plurality of electron emission outlets can be uniformly set at fine pitches.

(3) The electrode with the tapered portion has a tapered shape peculiar to the single crystal, and the electron emission regions can be formed uniformly and sharply. Therefore, an additional tapering process does not need to be applied, and the field intensity can be uniform and high. Variation in the triggering operating voltage can be prevented, and the electron emission efficiency can be improved.

(4) Unlike the conventional case, the single crystal can be easily formed on the amorphous insulating substrate, thereby obtaining an electron emission element with a high dielectric breakdown voltage.

(5) Since the electron emission element can be formed in the conventional semiconductor manufacturing process, a high packing density can be achieved with the simple process.

A method for growing the single crystal on the deposition surface is described below.

First, selective deposition is described for selectively depositing a film on a deposition surface. Selective deposition is a method for selectively depositing a thin film on a substrate by utilizing differences in factors of materials. The factors are surface energy, deposition coefficients, absorption coefficients, surface diffusion rates, and the like, and determine the formation of the crystal nucleus in the thin film forming process.

Fig. 36A is a schematic diagram of an electron emission device to which another method of the present invention is applied, and Fig. 36B is an enlarged view of a portion a in Fig. 35A.

Fig. 37 is a timing chart for explaining the operation of the electron emission device shown in Figs. 36A and 36B.

As shown in Fig. 36A, a voltage application electrode 902 made of a metal (e.g., Al, Ta, Mo, or W) or a semiconductor (e.g., Si) is deposited on a substrate 901. An insulating layer 903 made of an insulator such as Al₂O₃, Ta₂O₅, or SiO₂ and having a thickness of 5 to 15 nm is deposited on the voltage application electrode 902. As shown in Fig. 36B, a nucleus formation base 909 made of a material different from that of the insulating layer 903 is formed on the insulating layer 903 at the position opposite to the electrode 902. With the single nucleus formed in the nucleus formation base 909 as the center, a single crystal such as a Si single crystal is formed to form a To obtain an electron emission electrode 907 having a size of approximately 5 to 1000 nm and a substantially conical portion.

A metal layer 904 made of Al, Au or Pt is deposited on the insulating layer 903 and connected to the electron emission electrode 907. The material of the electrode 907 is not limited to the single crystal, but may be a polycrystal instead. However, by using the single crystal, the conductivity and electron emission efficiency of the electrode 907 can be improved. In general, it is difficult to form a single crystal on the surface of insulating material. However, according to the method for forming the single crystal described above, the single crystal can be easily formed on the insulating layer.

Note that a method of forming the electron emission electrode 907 will be described below.

An insulating layer 905 made of SiO2, Si3N4 or polyimide resin is deposited on the metal layer 904 and has an opening centered on the electrode 907. A drain electrode 906 having an electron emission outlet is deposited on the insulating layer 905.

If a certain voltage is applied between the electrode 902 and the metal layer 904, the electrode 902 can be conductively connected to the electrode 907 by a tunnel effect. In this case, a voltage is applied from a current source 911 to the collector electrode 906 in such a way that the potential of the electrode 906 is high. From a current source 910 A voltage is applied to a target 908 such that the potential of the target 908 is high. As a result, electrons are emitted away from the conical portion of the electrode 907.

In the electron emission device having the above-described configuration, the voltage applied to the electrode 902 and the voltage applied to the metal layer 904 are controlled so that the electrons are emitted at a desired timing.

As shown in Fig. 36A, a pulse generator 913 is connected to the electrode 902 and a pulse generator 912 is connected to the metal layer 904. As shown in Fig. 37, a negative voltage V1 is applied to the electrode 902 and a voltage V is applied to the metal layer during a time period t1. The potential difference (V1 - 0) must be set to a value which exceeds a predetermined value at which the electrons pass through the insulating layer 903 by the tunnel effect and are emitted away from the conical portion of the electron emission electrode 907. During a time period t2, a negative voltage V2 (> V1) is applied to the electrode 902 and a negative voltage V3 is applied to the metal layer 904. When the potential difference (V3 - V2) is set to a value lower than the predetermined value, the tunnel flow of electrons is prevented and the conduction between the electrodes 902 and 907 is interrupted. When the negative voltage V1 is applied to the metal layer 904 and the potential difference (V3 - V1) is set to a value smaller than the predetermined value, the tunnel flow is prevented. the electrical separation between electrodes 902 and 907 is maintained.

The above-described electron emission control by the pulse voltages can be suitably applied to a matrix multiple electron emission device having a plurality of electron emission sources.

Fig. 38 is an equivalent circuit diagram of an electron emission region in the multi-electron emission device according to the present invention.

Figs. 39A and 39B are timing charts for explaining the timing of voltages applied to the electrodes arranged in a matrix form.

Diodes 914₁ to 914₃ shown in Fig. 38 have an MIM structure comprising electrodes 902, insulating layer 903 and electron emission electrodes 907, respectively. When a certain voltage is applied to set the selected metal layer at a high potential by arbitrarily selecting the electrodes 902₁ to 902₃ and the metal layers 904₁ to 904₃, the diodes are turned on at the desired locations. As shown in Figs. 39A and 39B, a voltage Vi is applied to the electrode 902₁ and a voltage 0 V is applied to the metal layers 904₁ to 904₃ sequentially during a period t4. As a result, the diodes 914₁₁, 914₁₂ and 914₃ are turned on sequentially. and 914₁₃₃ are switched on. During time periods t5 and t6, the diodes are switched on one after the other in the sequence from the diode 914₂₁ to the diode 914₃₃. The discharge electrode 906 shown in Fig. 36 is for the (not 1 to 907₃₃ are provided together with electron emission electrodes 907₁₁ to 907₃₃ (shown) which are connected to the metal layers 904₁ to 904₃. When a voltage is applied between the lead electrode 906 and the target 908 such that the potential of the electrodes 907₁₁ to 907₃₃ is higher than that on the target 908, electrons are emitted from the conical portions of the electrodes 907₁₁ to 907₃₃ connected to the diodes 914₁₁ to 914₃₃.

A method of forming the electron emission electrode 907 will be described below.

The single crystal growth method for producing a heterogeneous material shaped into a micropattern having a sufficiently higher nucleation density than the deposition area to enable formation of only the single crystal nucleus and for growing the crystal with the single nucleus as its center has the following advantages:

(1) The shape of the electrode with the tapered portion is determined by the deposition area, the heterogeneous material, the material of the conductive target and the deposition conditions. The electrode with the tapered portion can be formed regardless of the sizes of the openings of the insulating member and the collector electrode. Therefore, an electrode with a tapered portion can be formed in a desired size and deviations in its size can be prevented.

(2) Since the position of the electrode with the conical part is determined by the position of the zone of heterogeneous material, the electrode having the tapered portion can be formed at a desired location with high accuracy. A multiple electron emission element can be formed such that its plurality of electron emission outlets are uniformly set at fine pitches.

(3) The electrode with the tapered portion has a tapered shape peculiar to the single crystal, and the electron emission regions are formed uniformly and sharply. Therefore, no additional tapering process needs to be applied, and the field strength can be made uniform and high. Differences in the triggering operating voltage can be prevented and the electron emission efficiency can be improved.

(4) Unlike the conventional case, the single crystal can be easily formed on an amorphous insulating substrate, thereby resulting in an electron emission element with a high dielectric breakdown voltage.

(5) Since the electron emission element can be formed by the conventional semiconductor manufacturing process, a high packing density can be achieved by the simple process.

A method for growing the single crystal on the deposition surface is described below.

Selective deposition is described below for the selective application of a film to a deposition surface. Selective deposition is a process for the selective Applying a thin film to a substrate by utilizing differences in factors of materials. The factors are surface energy, deposition coefficients, segregation coefficients, surface diffusion rates and the like and determine the formation of the crystal nucleus in the thin film forming process

Fig. 40 is a schematic partial sectional view for describing a display device according to the invention.

Fig. 41A is an enlarged view of an electron emission region of the display device shown in Fig. 40, and Fig. 41B is a plan view of the electron emission region.

40 and 41A, on an oxide substrate 1001 made of an amorphous insulating material such as SiO₂, which forms a deposition surface, a plurality of nucleation bases 1002 made of a heterogeneous material such as Si₃N₄ are formed. The nucleation bases 1002 are spaced apart from each other by equal distances. With the single nucleus formed in each nucleation base 1002 as a center, a single crystal such as a Mo, W or Si single crystal is grown. Thus, electrodes 1007 each having a tapered portion of a desired size can be formed. The tapered portion of each electrode 1007 serves as an electron emission region. The deposition surface outside the heterogeneous material surface serves as a surface where no crystal nucleus is formed. Therefore, the growth of the single crystal in a region outside the nucleation base 1002 centered surface can be prevented. A method of forming the single crystal is described below.

An insulating layer 1005 made of SiO₂ or the like is deposited and has an opening centered on each electrode 1007, and a bowl-shaped recess centered on the electrode 1007 is formed in the insulating layer 1005. A metal layer such as a Mo layer is formed in the recess to form a lead electrode 1003. An insulating layer 1006 made of SiO₂ or the like is deposited on the lead electrode 1003. A pair of electrodes 1004₁ and 1004₃ and a pair of electrodes 1004₂ and 1004₄ are formed on the insulating layer 1006 as shown in Fig. 41B.

Above the electrodes 1007, a phosphor unit 1008 is formed which includes unit areas 1009 each consisting of a matrix of three rows and three columns, each column or row consisting of phosphors for red R, green G and blue B. Adjacent unit areas are spaced apart from each other by a predetermined gap. The unit areas 1009 are formed according to the pitches of the electrodes 1007 so as to be opposite to the electrodes 1007, respectively.

In this embodiment, the lead electrode 1003 is formed in the process of forming the metal layer such as the Mo layer. However, a metal plate having openings may be bonded to the insulating layer 1005 after the insulating layer 1005 is deposited.

The function of the display device with this design is described below.

Fig. 42 shows the structure of the electron emission portion of the display device shown in Fig. 40. For simplicity of illustration, the electrodes 1004₁ and 1004₃ and the electrodes 1004₂ and 1004₄ are omitted.

Fig. 43 is a schematic diagram for explaining the electron emission function of leads and collector electrodes arranged in the form of a matrix.

Fig. 44 is a diagram for explaining the function of the display device shown in Fig. 40.

The connecting lines shown in Fig. 43 for the electron emission areas can be manufactured in such a way that the respective electrode 1007 with the conical section is formed on the deposition surface, a groove is formed in the insulating layer and a conductor layer 10010 is formed in the groove, which corresponds to the connecting line according to Fig. 43. The conductor layer 10010 is connected to the collector electrode 1003. A voltage is applied from a voltage source V3 between the conductor layer 10010 and the collector electrode 1003 in such a way that the potential at the collector electrode 1003 is Hz" higher than that at the conductor layer 10010 and that electrons are emitted from the conical section of the electrode 1007.

The control of electron emission between the conductive layer 10010 and the lead electrode 1003 is carried out in such a way that 0 V is sequentially applied to the lead wires 10010₁ to 10010₄, transistors are connected to the lead electrodes 1003₁ to 1003₄, respectively, and voltage signals are input to a desired lead electrode at a desired timing, whereby electrons are emitted from the electrode 1007 at any one.

When a voltage is applied between the selected electrode 1007 and the phosphor unit 1008 such that the potential at the phosphor unit 1008 is higher than that at the selected electrode 1007, the emitted electrons pass between the electrodes 1004₁ and 1004₃ and the electrodes 1004₂ and 1004₄ and are irradiated onto the corresponding unit area 1009 of the phosphor unit 1008. At this time, when a certain voltage from a voltage source V2 is applied between the electrodes 1004₁ and 1004₃, the electrons can be deflected in the Y direction as shown in Fig. 44. When a certain voltage from a voltage source V1 is applied between the electrodes 1004₂ and 1004₄ is applied, the electrons are deflected in the X-direction as shown in Fig. 44.

In the display device having the above-described configuration, the amount of emitted electrons is controlled by controlling the voltage applied to the conductive layer 10010 and the lead electrode 1003. By the voltages applied to the electrodes 1004₁ and 1004₃ and the electrodes 1004₂ and 1004₄, the electrons can be guided to a desired location of each Fluorescent surface of unit area 1009.

In this embodiment, the electrode having the tapered portion need not be made of a single crystal, but may be made of a non-monocrystalline material such as a polycrystal. However, if the electrode having the tapered portion is made of a single crystal, the shapes of the electron emission regions can be made uniform and sharp. No additional sharpening process needs to be applied, and the field strength can be increased uniformly.

Deviations in the triggering operating voltage can be prevented, and the conductivity and the electron emission efficiency can be improved. The single crystal growth method for forming the micropatterned heterogeneous material having a sufficiently higher nucleation density than the deposition area to enable formation of only the single crystal nucleus and for growing the crystal with the single nucleus as its center has the following advantages:

(1) The shape of the electrode with the tapered portion is determined by the deposition area, the heterogeneous material, the material of the conductive portion and the deposition conditions. An electrode with a tapered portion can be formed in a desired size and deviations in its size can be prevented.

(2) Since the position of the electrode having the tapered portion is determined by the position of the heterogeneous material zone, the electrode having the tapered portion can be formed at a desired position with high accuracy. A multiple electron emission element can be formed such that its plurality of electron emission outlets are uniformly set at fine pitches.

(3) Unlike the conventional case, the single crystal can be easily formed on the amorphous insulating substrate, thereby providing an electron emission element having a high dielectric breakdown voltage. In addition, since the amorphous insulating substrate is relatively inexpensive and can be formed into a large area, a large-area display device can be easily manufactured.

(4) Since the electron emission element can be manufactured by the conventional semiconductor manufacturing process, a high packing density can be achieved by the simple process.

A further embodiment of the invention is described below.

In this embodiment, in order to obtain a low-voltage display device, a conical portion of an electrode is made of at least one semiconductor crystal formed by nucleus growth and a material having a low work function, thereby improving the efficiency of electron emission.

The semiconductor crystal can be a p-type semiconductor crystal and/or an n-type semiconductor crystal. In the following description, a p-type semiconductor crystal and a material with a low work function are used for emitting electrons.

The principle of the electron emission process is described below.

Fig. 46 is an energy band diagram of a metal-semiconductor junction.

Fig. 47 is an energy band diagram at the surface of the p-type semiconductor.

As shown in Fig. 46, in order to achieve an NEA state in which a vacuum level Evac is lower than the energy level of a conduction band Ec of the p-type semiconductor, a material for reducing a work function Φm must be applied to the surface of the semiconductor. A typical example of such a material is an alkali metal, and in particular, Cs, Cs-O or the like. When the state in which the work function Φ1/8m is small at the surface of the semiconductor and further the NEA state is achieved, the electrons injected into the p-type semiconductor can be easily emitted, thereby achieving an electron emission element having a high electron emission efficiency.

The junction between the p-type semiconductor and the material with the low work function is reverse biased to set the vacuum level Evac to a level that is lower than that of the conduction band Ec of the p-type semiconductor.

As a result, a larger energy difference AE than the conventional energy difference can be easily achieved. Even if the vacuum level Evac is higher than the energy level E& of the conduction band of the p-type semiconductor at the equilibrium state, the NEA state can be easily achieved by using a chemically stable material which has a relatively high work function Φm but is defined as a low work function material.

The above-described electron emission structure is used to achieve a low voltage element and thereby improve the electron emission efficiency in a device similar to a field effect electron emission element.

According to the description in "Philips J. Res." 39, pp. 59 and 60, 1984, it is possible to fabricate an electron emission element using an n-type semiconductor crystal and a material with a low work function.

The single crystal growth method for forming a heterogeneous material shaped into a micropattern having a sufficiently higher nucleation density than the deposition area to enable formation of only the single crystal nucleus and for growing the crystal with the single nucleus as the center has the following advantages:

(1) The single crystal nucleus of the heterogeneous material is formed only at the nucleation surface and no nucleus is formed at the deposition surface area, which serves as a surface where the nucleus is not formed. Therefore, the conical part of the electrode consists only of a single crystal. The facet peculiar to the single crystal can be used as the conical part of the electron emission area.

(2) The shape of the electrode having the tapered portion is determined by the manufacturing conditions such as the deposition area, the area of the heterogeneous material, the material of the electrode and the deposition conditions. Therefore, an electrode having a desired size can be formed and its deviations can be prevented.

(3) The position of the electrode with the conical portion is determined by the position of the surface of the heterogeneous material. The electrode with the conical portion can be formed at a desired location with high accuracy.

(4) Unlike the conventional method, a single crystal can be easily formed on an amorphous insulating surface.

(5) The electron emission element can be formed according to the conventional semiconductor manufacturing process, and the simple process can increase its packing density.

Referring to Figs. 49 to 50B, an electron emission element according to another method of the present invention will be described in detail.

Fig. 48 is a schematic partial sectional view of this electron emission element. Fig. 49 is a

Illustration to explain the function of the electron emission element.

48 and 49, a nucleation base 1102 made of a heterogeneous material such as Si₃N₄ is deposited on an oxide substrate 1101 made of an amorphous insulating material such as SiO₂ and forming a deposition surface. A single crystal such as a Si single crystal is grown with a single crystal nucleus formed in each nucleation base 1102 as a center, and an n-type impurity is doped therein. An n-type semiconductor region 1109 is formed. A p-type semiconductor region 11010 is formed on the n-type semiconductor region 1109 by doping a p-type impurity. The p-type semiconductor region 11010 has a facet peculiar to the single crystal. A 10 nm thick region 11011 made of a low work function material such as CsSi or the like is deposited on the p-type semiconductor region 11010 to form an electrode 11013 having a tapered portion serving as an electron emission region. A preferred low work function material has a work function of 2.5 eV or less and may be, for example, Li, Na, K, Rb, Sr, Cs, Ba, Eu, Yb or Fr. When stabilizing the region 11011 made of the low work function material is considered, an alkali metal silicide such as CsSi or RbSi may be used. A method of forming the single crystal is described below.

The n-type semiconductor region 1109 of the electrode 11013 is connected to a conductive layer 1103 formed on the oxide substrate 1191. An insulating layer 1104 made of SiO₂ or the like is deposited on the conductive layer 1103. and which has an opening centered on the formed electrode 11013. A conductive layer 1105 connected to the p-type semiconductor region 11010 is formed on the insulating layer 1104. An insulating layer 1106 is applied to the conductive layer 1105. A conductive region 1108 connected to the region 11011 made of the material with the low work function is formed on the insulating layer 1106. An insulating layer 1107 is formed on the insulating layer 1106 outside the conductive region 1108, onto which a discharge electrode 11012 is applied.

In the element having this structure, a voltage V2 is applied between the n-type semiconductor region 1109 and the p-type semiconductor region 11010 such that the potential of the p-type semiconductor region is higher than that of the n-type semiconductor region. A counter-bias voltage Vi is applied between the p-type semiconductor region 11010 and the region 11011 of the low work function material. A voltage V3 is applied between the p-type semiconductor region 11010 and the drain electrode 11012 such that the potential of the drain electrode 11012 is higher than that of the p-type semiconductor region 11010. Under these conditions, electrons can be released from the surface of the region 11011 of the low work function material. This function is described below.

Fig. 50A is an energy band diagram at an equilibrium state and Fig. 50B is an energy band diagram at an operation of the element.

If, as shown in Fig. 49, the forward bias voltage V2 is applied to the pn junction and between the When the reverse bias voltage Vi is applied to the p-type semiconductor region 11010 and the low work function material region 11011, the energy band changes as shown in Fig. 50B to reach the NEA state in which the vacuum level Evac is lower by AE than that of the conduction band Ec of the p-type semiconductor region 11010. For this reason, the electrons injected from the n-type semiconductor region 1109 into the p-type semiconductor region 11010 are emitted away from the surface of the low work function material region 11011, and therefore, a high electron emission efficiency can be achieved with a larger energy difference ΔE than in the conventional case.

For increasing the energy difference ΔE by reverse bias, the metal material is not limited to Cs or Cs-O, which has a low work function. Rather, the material can be selected from a wide range of materials including alkali metals and alkali earth metals. A more stable material can be selected.

In this embodiment, a positive voltage is applied to the collector electrode 11012, so that a reduction in the work function occurs due to the Schottky effect. Therefore, the emission of a larger amount of electrons can be achieved.

The single crystal growth method for forming the n- and p-type semiconductor region by forming a micropatterned heterogeneous material having a sufficiently higher nucleation density than the deposition area to allow the formation of only the single crystal nucleus, and by growing of the crystal with the single nucleus as the center has the following advantages:

(1) The shape of the electrode with the tapered portion is determined by the deposition surface, the heterogeneous material, the material of the conductive portion and the deposition conditions. The electrode with the tapered portion can be formed regardless of the size of the opening of the collector electrode. Therefore, an electrode with a tapered portion of a desired size can be formed and deviations in its size can be prevented.

(2) Since the position of the electrode with the tapered portion can be determined by the position of the heterogeneous material zone, the electrode with the tapered portion can be formed at a desired position with high accuracy. A plurality of electron emission outlets of the electron emission regions can be uniformly set at fine pitches.

(3) Since the p-type semiconductor region has a tapered shape peculiar to the single crystal and the electron emission region can be formed uniformly and sharply, no additional tapering process needs to be applied. The field intensity can become uniform and high, deviations in the triggering operating voltage can be prevented, and the conductivity of the electrode having the tapered portion can be improved. Therefore, the electron emission efficiency can be improved.

(4) Different from the conventional case, the single crystal can be easily formed on the amorphous insulating substrate, thereby obtaining an electron emission element with a high dielectric breakdown voltage.

(5) Since the electron emission element can be formed by the conventional semiconductor manufacturing process, a high packing density can be achieved by the simple process.

A method for growing the single crystal on the deposition surface is described below.

Selective deposition is described for selectively depositing a film on a deposition surface. Selective deposition is a method for selectively forming a thin film on a substrate by utilizing differences in factors of the materials. The factors are surface energy, deposition coefficients, segregation coefficients, surface diffusion rates, and the like, and determine the formation of the crystal nucleus in the thin film forming process.

Claims (31)

1. Electron emission element, which a) an insulating layer (201) provided with a plurality of recesses (202), and b) has a discharge electrode (205) formed on the insulating layer (201), characterized by c) a plurality of single crystal electrodes (204) having a conical portion and attached to the bottom surface of the recesses (202). 2. Electron emission element according to claim 1, characterized in that a single electrode (204) is formed in a single recess (202). 3. Electron emission element according to claim 1 or 2, characterized in that the insulating layer (201a) is formed on a desired underlying layer (207). 4. Electron emission element according to claim 1 or 3, characterized in that the single crystal electrodes (204) are arranged to form electrode rows and electrode conductor layers (206₁, 206₃) are designed to connect the electrodes (204) of the electrode rows respectively to form a matrix shape. 5. Electron emission element according to claim 3, characterized in that the underlying layer (207) consists of an amorphous material. 6. An electron emission element according to claim 3, characterized in that the underlying layer (401) is made of a conductive material and that an electrode (408) is centered with the conical portion of the single crystal electrode (406) on a single crystal nucleus (405) grown in a heterogeneous material formed on the insulating layer (402), the heterogeneous material having a nucleation density sufficiently higher than that of the conductive material and being micropatterned to allow the growth of only the single crystal nucleus (405), the conductive material being connected to the electrode (408) through an opening (407) formed in the insulating layer (402). 7. Electron emission element according to claim 1, characterized in that the single crystal electrode with the conical portion is a conductive part (804) and that a heat-resistant conductive film (805) is formed on the conductive part (804). 8. An electron emission element having high-resistance films (503) formed on an insulating layer (501) and electrodes (502) formed at both ends of the high-resistance films (503), characterized in that a plurality of zones (506) of a heterogeneous material having a crystal nucleus formation density sufficiently higher than that of a material of the insulating layer (501) and micropatterned to permit the growth of single crystal nuclei alone are formed on the insulating layer (501), and that the high-resistance films (503) are each formed of single crystal zones (514) having a plurality of conical portions (507) centered on the single crystal nuclei grown in the zones (506) of the heterogeneous material. 9. Electron emission element according to claim 8, characterized in that a collector electrode (505) is formed above the high-resistance films (503). 10. Electron emission element according to claim 8 or 9, characterized in that the insulating layer (511) is formed on a desired underlayer (516). 11. Electron emission device with a plurality of electron emission electrodes (604) each with a conical partial area, characterized by a plurality of voltage application electrodes (601) formed opposite to the plurality of electron emission electrodes (604) via an insulating layer (602), a collecting electrode (605) to be irradiated with the electrons emitted from the plurality of electron emission electrodes (604), a charge supply device for supplying charge to the plurality of electron emission electrodes (604) and a device (606, 611) for applying a voltage between the plurality of voltage application electrodes (601) and the collecting electrode (605), wherein each of the plurality of electron emission electrodes (604) is made of a single crystal. 12. An electron emission device according to claim 11, characterized in that the electron emission element comprises a single electron emission electrode (604). 13. Electron emission device according to claim 11 or 12, characterized in that the charge supply device has a collector electrode (607). 14. Electron emission device according to claim 11 or 12, characterized in that the insulating layer (602) consists of a semiconductor material (621). 15. Electron emission device according to claim 11 or 13, characterized in that the device (606, 611) for applying the voltage between the plurality of voltage application electrodes (601) and the catcher electrode (605) includes a device (617) for applying a voltage to the plurality of voltage application electrodes (601) and a voltage between the plurality of voltage application electrodes (601) and thecatcher electrode (605) in time division multiplex. 16. An electron emission element comprising a plurality of electron emission electrodes (703; 1007) having a conical portion and formed on a deposition surface of a substrate (701; 1001), an insulating layer (704; 1005) formed on the deposition surface and having openings (708) centered on the conical portions, respectively, and a discharge electrode (705; 1003) formed on the insulating layer (704; 1005) and having openings (707) above the conical portions, characterized in that the electron emission electrodes (703; 1007) each consist of a single crystal. 17. An electron emission element according to claim 16, characterized in that the single crystal is centered on a single crystal nucleus grown in a heterogeneous material (702; 1002) formed on the deposition surface, the heterogeneous material having a crystal nucleation density sufficiently higher than that of a material of the deposition surface and being micropatterned to allow the growth of only the single crystal nucleus. 18. Electron emission element according to claim 16, characterized in that the substrate (701; 1001) consists of an amorphous insulating material. 19. An electron emission device comprising an electron emission element according to any one of claims 16 to 18, characterized by a device for applying a voltage between the lead electrode (1003) and the electron emission electrode (1007), a second insulating layer (1006) formed on the lead electrode (1003) and a deflection electrode (1004) formed on the second insulating layer (1006). 20. An electron emission device according to claim 19, characterized by conduction electrodes (10010₁-10010₄) each connecting a row of electron emission electrodes (1007) and conduction electrodes (1003₁-1003₄) constituting the lead electrode formed on the insulating layer (1005) to form a matrix shape. 21. A display device with an electron emission device according to claim 19 or 20, characterized by a phosphor unit (1008) which is formed opposite to the electron emission electrode (1007), wherein the phosphor unit (1008) is excited by the electrons emitted from the electrode (1007). 22. Display device according to claim 21, characterized in that a plurality of phosphor regions (1009) are formed in a movement distance range of electrons deflected by the deflection electrode (1004), the movement distance range being located within the phosphor unit (1008). 23. Electron emission element according to one of claims 16 to 18, characterized in that the conical portion of the electrode (11013) consists of a semiconductor single crystal formed by crystal nucleus growth and/or a material with a low work function. 24. Electron emission element according to one of claims 16 to 18, characterized in that the conical portion contains a p-type semiconductor region (11010) and a material that has a low work function and is connected to the p-type semiconductor region (11010) to form a boundary layer, and a counter-bias is applied to the interface to utilize a negative electron affinity (NEA) state to emit electrons from a surface of the material with the low work function, the electrons being emitted from the p-type semiconductor substrate (11010). 25. A method for producing an electron emission element according to claim 1, comprising the steps of forming a plurality of recesses (202) in an insulating layer (201), forming a plurality of electron emission electrodes (204) each having a conical portion on the bottom surfaces of the recesses (202), and forming a lead electrode (205) on the insulating layer (201), a portion of which is formed close to at least the conical portions, characterized by a step of forming the plurality of electron emission electrodes (204) in such a way that single crystal zones are grown which are centered on single crystal nuclei in zones (203) of heterogeneous material which has a nucleation density sufficiently higher than that of the insulating material on the bottom surfaces of the recesses (202). and allows the growth of the single crystal nuclei alone. 26. The method of claim 25, characterized in that the insulating layer (201) is formed on a desired underlayer (207). 27. Method according to claim 25 or 26, characterized in that the plurality of recesses (202) are arranged to form rows of recesses, grooves are formed between the recesses (202) forming the respective recess rows, respective electrode conductor layers (206₁-206₃) are formed in the grooves, each of the electrode line layers (206₁-206₃) is adapted for connecting the electrodes (204) of each of the electrode rows together, and a plurality of lead electrodes (205₁-205₄) forming the lead electrode are connected to the electrode line layers (206₁-206₃) in a matrix form. 28. Method according to claim 25, characterized by steps in which an opening (404) is formed in the bottom surfaces of the recesses (403) for partially exposing a substrate surface, wherein the substrate surface consists of a conductive material, and a crystal (407) is grown on the area of the surface made of the conductive material exposed in the opening (404) and the surface made of the conductive material is connected to the conical portion with the electrode (408). 29. A method for producing an electron emission element according to claim 16, comprising the steps of forming an electron emission electrode (703) having a conical portion on a deposition surface of a substrate (701), forming an insulating layer (704) having an opening (708) centered on the conical portion and a discharge electrode (705) is formed on the insulating layer (704) close to the conical portion, characterized by a step in which the electron emission electrode (703) with the conical portion is formed by a single crystal zone centered on a single crystal nucleus in a heterogeneous material (702) applied to the deposition surface, the heterogeneous material (702) having a nucleation density sufficiently higher than that of a material of the substrate (701) and being micropatterned to allow the growth of the single crystal nucleus alone. 30. A method according to claim 29, characterized in that the deposition surface is formed on a desired base layer (709). 31. Method according to claim 29, characterized by steps in which an electrode layer (705) is formed on the insulating layer (704), an opening (707) is formed in the electrode layer (705) at a location corresponding to the conical portion and the insulating layer (704) is selectively etched through the opening (707) in order to expose at least the conical partial region.