DE3788492D1 - Vorrichtung und Verfahren zur Verbesserung des Cachezugriffdurchflusses in Pipelineprozessoren. - Google Patents

Vorrichtung und Verfahren zur Verbesserung des Cachezugriffdurchflusses in Pipelineprozessoren.

Info

Publication number
DE3788492D1
DE3788492D1 DE87308954T DE3788492T DE3788492D1 DE 3788492 D1 DE3788492 D1 DE 3788492D1 DE 87308954 T DE87308954 T DE 87308954T DE 3788492 T DE3788492 T DE 3788492T DE 3788492 D1 DE3788492 D1 DE 3788492D1
Authority
DE
Germany
Prior art keywords
cache access
access flow
pipeline processors
improving cache
improving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE87308954T
Other languages
English (en)
Other versions
DE3788492T2 (de
Inventor
Michael D Taylor
Robert M Maier
Michael J Begley
Allan J Zmyslowski
Jeffrey A Thomas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu IT Holdings Inc
Original Assignee
Amdahl Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Amdahl Corp filed Critical Amdahl Corp
Publication of DE3788492D1 publication Critical patent/DE3788492D1/de
Application granted granted Critical
Publication of DE3788492T2 publication Critical patent/DE3788492T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
DE87308954T 1986-10-17 1987-10-09 Vorrichtung und Verfahren zur Verbesserung des Cachezugriffdurchflusses in Pipelineprozessoren. Expired - Fee Related DE3788492T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/920,805 US4888689A (en) 1986-10-17 1986-10-17 Apparatus and method for improving cache access throughput in pipelined processors

Publications (2)

Publication Number Publication Date
DE3788492D1 true DE3788492D1 (de) 1994-01-27
DE3788492T2 DE3788492T2 (de) 1994-04-07

Family

ID=25444441

Family Applications (1)

Application Number Title Priority Date Filing Date
DE87308954T Expired - Fee Related DE3788492T2 (de) 1986-10-17 1987-10-09 Vorrichtung und Verfahren zur Verbesserung des Cachezugriffdurchflusses in Pipelineprozessoren.

Country Status (3)

Country Link
US (1) US4888689A (de)
EP (1) EP0264235B1 (de)
DE (1) DE3788492T2 (de)

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US5179678A (en) * 1987-09-08 1993-01-12 Nec Corporation Address/control signal input circuit for a cache controller which clamps the address/control signals to predetermined logic level clamp signal is received
US5822578A (en) * 1987-12-22 1998-10-13 Sun Microsystems, Inc. System for inserting instructions into processor instruction stream in order to perform interrupt processing
GB8817912D0 (en) * 1988-07-27 1988-09-01 Int Computers Ltd Data processing apparatus
CA2019299C (en) * 1989-06-22 2002-01-15 Steven Frank Multiprocessor system with multiple instruction sources
GB2234613B (en) * 1989-08-03 1993-07-07 Sun Microsystems Inc Method and apparatus for switching context of state elements in a microprocessor
US5170476A (en) * 1990-01-22 1992-12-08 Motorola, Inc. Data processor having a deferred cache load
EP0442116A3 (en) * 1990-02-13 1993-03-03 Hewlett-Packard Company Pipeline method and apparatus
AU7486591A (en) * 1990-03-15 1991-10-10 Sun Microsystems, Inc. Apparatus and method for providing a stall cache
US5280592A (en) * 1992-01-03 1994-01-18 Amdahl Corporation Domain interlock
US5381539A (en) * 1992-06-04 1995-01-10 Emc Corporation System and method for dynamically controlling cache management
US5442767A (en) * 1992-10-23 1995-08-15 International Business Machines Corporation Address prediction to avoid address generation interlocks in computer systems
JPH0756815A (ja) * 1993-07-28 1995-03-03 Internatl Business Mach Corp <Ibm> キャッシュ動作方法及びキャッシュ
JPH0887411A (ja) * 1994-09-19 1996-04-02 Fujitsu Ltd パイプライン演算方法およびパイプライン演算装置
US6012135A (en) * 1994-12-01 2000-01-04 Cray Research, Inc. Computer having multiple address ports, each having logical address translation with base and limit memory management
US5586291A (en) * 1994-12-23 1996-12-17 Emc Corporation Disk controller with volatile and non-volatile cache memories
US5905881A (en) * 1995-11-30 1999-05-18 Unisys Corporation Delayed state writes for an instruction processor
US5867699A (en) * 1996-07-25 1999-02-02 Unisys Corporation Instruction flow control for an instruction processor
US5796972A (en) * 1997-01-14 1998-08-18 Unisys Corporation Method and apparatus for performing microcode paging during instruction execution in an instruction processor
US6418478B1 (en) * 1997-10-30 2002-07-09 Commvault Systems, Inc. Pipelined high speed data transfer mechanism
US7581077B2 (en) 1997-10-30 2009-08-25 Commvault Systems, Inc. Method and system for transferring data in a storage operation
AU2003272456A1 (en) 2002-09-16 2004-04-30 Commvault Systems, Inc. System and method for optimizing storage operations
US7315923B2 (en) 2003-11-13 2008-01-01 Commvault Systems, Inc. System and method for combining data streams in pipelined storage operations in a storage network
US7765534B2 (en) 2004-04-30 2010-07-27 International Business Machines Corporation Compiler with cache utilization optimizations
WO2006012302A2 (en) * 2004-06-28 2006-02-02 Exagen Diagnostics, Inc. Methods for rna fluorescence in situ hybridization
US9904481B2 (en) 2015-01-23 2018-02-27 Commvault Systems, Inc. Scalable auxiliary copy processing in a storage management system using media agent resources
US9898213B2 (en) 2015-01-23 2018-02-20 Commvault Systems, Inc. Scalable auxiliary copy processing using media agent resources
US11010261B2 (en) 2017-03-31 2021-05-18 Commvault Systems, Inc. Dynamically allocating streams during restoration of data

Family Cites Families (23)

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Publication number Priority date Publication date Assignee Title
GB1443777A (en) * 1973-07-19 1976-07-28 Int Computers Ltd Data processing apparatus
CA1059639A (en) * 1975-03-26 1979-07-31 Garvin W. Patterson Instruction look ahead having prefetch concurrency and pipe line features
US4200927A (en) * 1978-01-03 1980-04-29 International Business Machines Corporation Multi-instruction stream branch processing mechanism
US4287561A (en) * 1978-03-16 1981-09-01 International Business Machines Corporation Address formulation interlock mechanism
US4189768A (en) * 1978-03-16 1980-02-19 International Business Machines Corporation Operand fetch control improvement
US4187770A (en) * 1978-05-30 1980-02-12 Coffield Harold M Potato chip cooking apparatus
JPS5687282A (en) * 1979-12-14 1981-07-15 Nec Corp Data processor
US4392200A (en) * 1980-01-28 1983-07-05 Digital Equipment Corporation Cached multiprocessor system with pipeline timing
JPS5927935B2 (ja) * 1980-02-29 1984-07-09 株式会社日立製作所 情報処理装置
JPS58106636A (ja) * 1981-12-18 1983-06-25 Hitachi Ltd パイプライン演算装置
JPS58189738A (ja) * 1982-04-30 1983-11-05 Hitachi Ltd デ−タ処理システム
US4583165A (en) * 1982-06-30 1986-04-15 International Business Machines Corporation Apparatus and method for controlling storage access in a multilevel storage system
US4740112A (en) * 1982-08-27 1988-04-26 Electro-Plasma, Inc. Powder feed control system
US4594659A (en) * 1982-10-13 1986-06-10 Honeywell Information Systems Inc. Method and apparatus for prefetching instructions for a central execution pipeline unit
US4594655A (en) * 1983-03-14 1986-06-10 International Business Machines Corporation (k)-Instructions-at-a-time pipelined processor for parallel execution of inherently sequential instructions
US4608633A (en) * 1983-04-01 1986-08-26 Honeywell Information Systems Inc. Method for decreasing execution time of numeric instructions
WO1985000453A1 (en) * 1983-07-11 1985-01-31 Prime Computer, Inc. Data processing system
US4685058A (en) * 1983-08-29 1987-08-04 Amdahl Corporation Two-stage pipelined execution unit and control stores
JPS60120439A (ja) * 1983-12-05 1985-06-27 Nec Corp 演算処理装置
JPS60123936A (ja) * 1983-12-07 1985-07-02 Fujitsu Ltd バッフア記憶制御方式
JPS61160142A (ja) * 1984-12-29 1986-07-19 Hitachi Ltd デ−タ処理装置
JPH0743648B2 (ja) * 1985-11-15 1995-05-15 株式会社日立製作所 情報処理装置
US4722046A (en) * 1986-08-27 1988-01-26 Amdahl Corporation Cache storage priority

Also Published As

Publication number Publication date
EP0264235B1 (de) 1993-12-15
EP0264235A2 (de) 1988-04-20
EP0264235A3 (en) 1990-01-31
DE3788492T2 (de) 1994-04-07
US4888689A (en) 1989-12-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee